2 * Various assembly language/system dependent hacks that are required
3 * so that we can minimize the amount of platform specific code.
7 * Define this if the system uses RELOCA.
9 #define ELF_USES_RELOCA
12 * Initialization sequence for a GOT.
14 #define INIT_GOT(GOT_BASE,MODULE) _dl_init_got(GOT_BASE,MODULE)
16 /* Stuff for the PLT. */
17 #define PLT_INITIAL_ENTRY_WORDS 18
18 #define PLT_LONGBRANCH_ENTRY_WORDS 0
19 #define PLT_TRAMPOLINE_ENTRY_WORDS 6
20 #define PLT_DOUBLE_SIZE (1<<13)
21 #define PLT_ENTRY_START_WORDS(entry_number) \
22 (PLT_INITIAL_ENTRY_WORDS + (entry_number)*2 \
23 + ((entry_number) > PLT_DOUBLE_SIZE \
24 ? ((entry_number) - PLT_DOUBLE_SIZE)*2 \
26 #define PLT_DATA_START_WORDS(num_entries) PLT_ENTRY_START_WORDS(num_entries)
28 /* Macros to build PowerPC opcode words. */
29 #define OPCODE_ADDI(rd,ra,simm) \
30 (0x38000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
31 #define OPCODE_ADDIS(rd,ra,simm) \
32 (0x3c000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
33 #define OPCODE_ADD(rd,ra,rb) \
34 (0x7c000214 | (rd) << 21 | (ra) << 16 | (rb) << 11)
35 #define OPCODE_B(target) (0x48000000 | ((target) & 0x03fffffc))
36 #define OPCODE_BA(target) (0x48000002 | ((target) & 0x03fffffc))
37 #define OPCODE_BCTR() 0x4e800420
38 #define OPCODE_LWZ(rd,d,ra) \
39 (0x80000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
40 #define OPCODE_LWZU(rd,d,ra) \
41 (0x84000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
42 #define OPCODE_MTCTR(rd) (0x7C0903A6 | (rd) << 21)
43 #define OPCODE_RLWINM(ra,rs,sh,mb,me) \
44 (0x54000000 | (rs) << 21 | (ra) << 16 | (sh) << 11 | (mb) << 6 | (me) << 1)
46 #define OPCODE_LI(rd,simm) OPCODE_ADDI(rd,0,simm)
47 #define OPCODE_ADDIS_HI(rd,ra,value) \
48 OPCODE_ADDIS(rd,ra,((value) + 0x8000) >> 16)
49 #define OPCODE_LIS_HI(rd,value) OPCODE_ADDIS_HI(rd,0,value)
50 #define OPCODE_SLWI(ra,rs,sh) OPCODE_RLWINM(ra,rs,sh,0,31-sh)
53 #define PPC_DCBST(where) __asm__ __volatile__ ("dcbst 0,%0" : : "r"(where) : "memory")
54 #define PPC_SYNC __asm__ __volatile__ ("sync" : : : "memory")
55 #define PPC_ISYNC __asm__ __volatile__ ("sync; isync" : : : "memory")
56 #define PPC_ICBI(where) __asm__ __volatile__ ("icbi 0,%0" : : "r"(where) : "memory")
57 #define PPC_DIE __asm__ __volatile__ ("tweq 0,0")
59 /* Here we define the magic numbers that this dynamic loader should accept */
63 /* Used for error messages */
64 #define ELF_TARGET "powerpc"
67 extern unsigned long _dl_linux_resolver(struct elf_resolve * tpnt, int reloc_entry);
68 void _dl_init_got(unsigned long *lpnt,struct elf_resolve *tpnt);
70 /* ELF_RTYPE_CLASS_PLT iff TYPE describes relocation of a PLT entry, so
71 PLT entries should not be allowed to define the value.
72 ELF_RTYPE_CLASS_NOCOPY iff TYPE should not be allowed to resolve to one
73 of the main executable's symbols, as for a COPY reloc. */
74 /* We never want to use a PLT entry as the destination of a
75 reloc, when what is being relocated is a branch. This is
76 partly for efficiency, but mostly so we avoid loops. */
77 #define elf_machine_type_class(type) \
78 ((((type) == R_PPC_JMP_SLOT \
79 || (type) == R_PPC_REL24 \
80 || (type) == R_PPC_ADDR24) * ELF_RTYPE_CLASS_PLT) \
81 | (((type) == R_PPC_COPY) * ELF_RTYPE_CLASS_COPY))
83 /* The SVR4 ABI specifies that the JMPREL relocs must be inside the
85 #define ELF_MACHINE_PLTREL_OVERLAP 1
87 /* Return the value of the GOT pointer. */
88 static __always_inline Elf32_Addr * __attribute__ ((const))
92 #ifdef HAVE_ASM_PPC_REL16
93 __asm__ (" bcl 20,31,1f\n"
95 " addis %0,%0,_GLOBAL_OFFSET_TABLE_-1b@ha\n"
96 " addi %0,%0,_GLOBAL_OFFSET_TABLE_-1b@l\n"
97 : "=b" (got) : : "lr");
99 __asm__ (" bl _GLOBAL_OFFSET_TABLE_-4@local"
105 /* Return the link-time address of _DYNAMIC, stored as
106 the first value in the GOT. */
107 static __always_inline Elf32_Addr __attribute__ ((const))
108 elf_machine_dynamic (void)
113 /* Return the run-time load address of the shared object. */
114 static __always_inline Elf32_Addr __attribute__ ((const))
115 elf_machine_load_address (void)
117 Elf32_Addr *branchaddr;
118 Elf32_Addr runtime_dynamic;
120 /* This is much harder than you'd expect. Possibly I'm missing something.
123 Apparently, "bcl 20,31,$+4" is what should be used to load LR
124 with the address of the next instruction.
125 I think this is so that machines that do bl/blr pairing don't
128 __asm__ ("bcl 20,31,0f ;"
133 : "=b" (addr) : : "r0", "lr");
135 doesn't work, because the linker doesn't have to (and in fact doesn't)
136 update the @ha and @l references; the loader (which runs after this
139 Instead, we use the following trick:
141 The linker puts the _link-time_ address of _DYNAMIC at the first
142 word in the GOT. We could branch to that address, if we wanted,
143 by using an @local reloc; the linker works this out, so it's safe
144 to use now. We can't, of course, actually branch there, because
145 we'd cause an illegal instruction exception; so we need to compute
146 the address ourselves. That gives us the following code: */
148 /* Get address of the 'b _DYNAMIC@local'... */
149 __asm__ ("bcl 20,31,0f;"
154 /* So now work out the difference between where the branch actually points,
155 and the offset of that location in memory from the start of the file. */
156 runtime_dynamic = ((Elf32_Addr) branchaddr
157 + ((Elf32_Sword) (*branchaddr << 6 & 0xffffff00) >> 6));
159 return runtime_dynamic - elf_machine_dynamic ();
162 static __always_inline void
163 elf_machine_relative (Elf32_Addr load_off, const Elf32_Addr rel_addr,
164 Elf32_Word relative_count)
166 Elf32_Rela * rpnt = (void *)rel_addr;
168 do { /* PowerPC handles pre increment/decrement better */
169 Elf32_Addr *const reloc_addr = (void *) (load_off + (++rpnt)->r_offset);
171 *reloc_addr = load_off + rpnt->r_addend;
172 } while (--relative_count);
176 #define DT_PPC_GOT_IDX (DT_NUM + OS_NUM)
178 #define ARCH_DYNAMIC_INFO(dpnt, dynamic, debug_addr) \
180 if (dpnt->d_tag == DT_PPC_GOT) \
181 dynamic[DT_PPC_GOT_IDX] = dpnt->d_un.d_ptr; \