8 class Dirq_pic_pin : public Irq_pin
11 explicit Dirq_pic_pin(unsigned irq) { payload()[0] = irq; }
12 unsigned irq() const { return payload()[0]; }
14 static void init() FIASCO_INIT;
17 //---------------------------------------------------------------------------
26 Dirq_pic_pin::setup_hw_pin(Irq_base *irq, unsigned irqnum)
28 if (irqnum >= Pic::nr_irqs())
31 new (irq->pin()) Dirq_pic_pin(irqnum);
38 Dirq_pic_pin::unbind_irq()
42 Irq_chip::hw_chip->free(Irq::self(this), irq());
43 replace<Sw_irq_pin>();
48 Dirq_pic_pin::do_mask()
50 assert (cpu_lock.test());
51 Pic::disable_locked(irq());
57 Dirq_pic_pin::do_mask_and_ack()
59 assert (cpu_lock.test());
61 Pic::disable_locked(irq());
62 Pic::acknowledge_locked(irq());
69 Pic::acknowledge_locked(irq());
74 Dirq_pic_pin::do_set_mode(unsigned)
79 Dirq_pic_pin::do_unmask()
81 assert (cpu_lock.test());
82 Pic::enable_locked(irq(), 0xa); //prio);
86 if (EXPECT_FALSE(!Irq::self(this)->owner()))
88 if (Irq::self(this)->owner() == (Receiver*)-1)
89 prio = ~0UL; // highes prio for JDB IRQs
91 prio = Irq::self(this)->owner()->sched()->prio();
98 Dirq_pic_pin::set_cpu(unsigned)
103 Dirq_pic_pin::check_debug_irq()
105 return !Vkey::check_(irq());
108 //---------------------------------------------------------------------------
109 IMPLEMENTATION [debug]:
113 Dirq_pic_pin::pin_type() const
114 { return "HW IRQ (DIRQ)"; }