2 * (c) 2008-2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>,
3 * Henning Schild <hschild@os.inf.tu-dresden.de>
4 * economic rights: Technische Universität Dresden (Germany)
6 * This file is part of TUD:OS and distributed under the terms of the
7 * GNU General Public License 2.
8 * Please see the COPYING-GPL-2 file for details.
10 #include <l4/sys/factory.h>
11 #include <l4/sys/task.h>
12 #include <l4/sys/kdebug.h>
13 #include <l4/sys/vm.h>
14 #include <l4/sys/thread.h>
15 #include <l4/sys/vcpu.h>
17 #include <l4/sys/irq.h>
19 #include <l4/util/util.h>
20 #include <l4/util/cpu.h>
21 #include <l4/re/env.h>
22 #include <l4/re/c/util/cap_alloc.h>
23 #include <l4/vcpu/vcpu.h>
32 #define STACKSIZE (8<<10)
34 static char stack[STACKSIZE];
35 static char hdl_stack[STACKSIZE];
36 static unsigned long idt[32 * 2] __attribute__((aligned(4096)));
37 static unsigned long gdt[32 * 2] __attribute__((aligned(4096)));
40 void handle_vmexit(void);
41 static l4_vcpu_state_t *vcpu;
42 static l4_vm_svm_vmcb_t *vmcb_s;
44 static void init_vmcb(l4_vm_svm_vmcb_t *vmcb_s) {
46 vmcb_s->control_area.np_enable = 1;
47 vmcb_s->control_area.guest_asid_tlb_ctl = 1;
49 vmcb_s->state_save_area.es.selector = 0;
50 vmcb_s->state_save_area.es.attrib = 0;
51 vmcb_s->state_save_area.es.limit = 0;
52 vmcb_s->state_save_area.es.base = 0ULL;
54 // vmcb[256 + 0] = 0; // es; attrib sel
56 vmcb_s->state_save_area.cs.selector = 0x8;
57 vmcb_s->state_save_area.cs.attrib = 0xc9b;
58 vmcb_s->state_save_area.cs.limit = 0xffffffff;
59 vmcb_s->state_save_area.cs.base = 0ULL;
61 vmcb_s->state_save_area.ss.selector = 0x10;
62 vmcb_s->state_save_area.ss.attrib = 0xc93;
63 vmcb_s->state_save_area.ss.limit = 0xffffffff;
64 vmcb_s->state_save_area.ss.base = 0ULL;
66 vmcb_s->state_save_area.ds.selector = 0x23;
67 vmcb_s->state_save_area.ds.attrib = 0xcf3;
68 vmcb_s->state_save_area.ds.limit = 0xffffffff;
69 vmcb_s->state_save_area.ds.base = 0ULL;
71 vmcb_s->state_save_area.fs.selector = 0;
72 vmcb_s->state_save_area.fs.attrib = 0xcf3;
73 vmcb_s->state_save_area.fs.limit = 0xffffffff;
74 vmcb_s->state_save_area.fs.base = 0ULL;
76 vmcb_s->state_save_area.gs.selector = 0;
77 vmcb_s->state_save_area.gs.attrib = 0xcf3;
78 vmcb_s->state_save_area.gs.limit = 0xffffffff;
79 vmcb_s->state_save_area.gs.base = 0ULL;
81 vmcb_s->state_save_area.gdtr.selector = 0;
82 vmcb_s->state_save_area.gdtr.attrib = 0;
83 vmcb_s->state_save_area.gdtr.limit = 0x3f;
84 vmcb_s->state_save_area.gdtr.base = (unsigned long) gdt;
86 vmcb_s->state_save_area.ldtr.selector = 0;
87 vmcb_s->state_save_area.ldtr.attrib = 0;
88 vmcb_s->state_save_area.ldtr.limit = 0;
89 vmcb_s->state_save_area.ldtr.base = 0;
91 vmcb_s->state_save_area.idtr.selector = 0;
92 vmcb_s->state_save_area.idtr.attrib = 0;
93 vmcb_s->state_save_area.idtr.limit = 0xff;
94 vmcb_s->state_save_area.idtr.base = (unsigned long) idt;
96 vmcb_s->state_save_area.tr.selector = 0x28;
97 vmcb_s->state_save_area.tr.attrib = 0x8b;
98 vmcb_s->state_save_area.tr.limit = 0x67;
99 vmcb_s->state_save_area.tr.base = 0;
101 vmcb_s->state_save_area.g_pat = 0x7040600010406ULL;
104 static int check_svm(void) {
105 l4_umword_t ax, bx, cx, dx;
107 if (!l4util_cpu_has_cpuid())
110 l4util_cpu_cpuid(0x80000001, &ax, &bx, &cx, &dx);
113 printf("CPU does not support SVM.\n");
117 l4util_cpu_cpuid(0x8000000a, &ax, &bx, &cx, &dx);
119 printf("SVM revision: %lx\n", ax & 0xf);
120 printf("Number of ASIDs: %lx\n", bx);
125 static int check_svm_npt(void) {
126 l4_umword_t ax, bx, cx, dx;
128 l4util_cpu_cpuid(0x8000000a, &ax, &bx, &cx, &dx);
130 printf("NPT available: %s\n", dx & 1 ? "yes" : "no");
135 static int vmexit = 0;
137 static int cnt_triggered, cnt_received;
139 static void handler(void) {
144 // exception and ipc handling here
146 printf("received interrupt %d | %d %d\n", (int)vcpu->i.label,
147 cnt_triggered, cnt_received);
152 void vm_resume(void) {
155 // if ((vmcb_s->state_save_area.rip >= marker)) {
156 // //printf("set tf for rip=%llx\n", vmcb_s->state_save_area.rip);
157 // vmcb_s->state_save_area.rflags |= 0x100; // set tf
160 vmcb_s->control_area.intercept_exceptions |= 0xa; // intercept #1 & #3
161 vmcb_s->control_area.intercept_exceptions |= 0xffffffff;
162 vmcb_s->control_area.intercept_instruction1 |= 0x20; // intercept int1
164 //vmcb_s->control_area.exitcode = 0x100 << i;
165 vmcb_s->control_area.exitcode = 0;
167 tag = l4_thread_vcpu_resume_commit(L4_INVALID_CAP,
168 l4_thread_vcpu_resume_start());
170 printf("vm-resume failed: %s (%ld)\n", l4sys_errtostr(l4_error(tag)),
173 // if l4_thread_vcpu_resume_commit returns without error
174 // tell the handler that a vmexit occurred
176 // and rewind the stack before we return into the handler
177 // simulating an upcall
185 : : "r"(vcpu->entry_sp), "r"(handler) );
189 void handle_vmexit(void) {
190 static unsigned int i = 0;
192 printf("iteration=%d, exit code=%llx", i,
193 vmcb_s->control_area.exitcode);
195 if (vmcb_s->control_area.exitcode == 0x43)
196 // int3 is treated as fault, not trap
197 vmcb_s->state_save_area.rip += 1;
199 if (vmcb_s->control_area.exitcode == 0x46) {
200 // if (vmcb_s->state_save_area.rip >= test_end)
202 vmcb_s->state_save_area.rip += 2;
205 if (vmcb_s->control_area.exitcode == 0x400) {
206 printf("host-level page fault; error code=%llx, gpa=%llx\n",
207 vmcb_s->control_area.exitinfo1, vmcb_s->control_area.exitinfo2);
210 if (vmcb_s->control_area.exitcode == 0x4e) {
211 printf("page fault; error code=%llx, pfa=%llx\n",
212 vmcb_s->control_area.exitinfo1, vmcb_s->control_area.exitinfo2);
215 if (vmcb_s->control_area.exitcode == 0x81) {
217 vmcb_s->state_save_area.rip += 3;
220 if (vmcb_s->control_area.exitcode == 0x4d) {
221 printf("cs=%08x attrib=%x, limit=%x, base=%llx\n",
222 vmcb_s->state_save_area.cs.selector,
223 vmcb_s->state_save_area.cs.attrib,
224 vmcb_s->state_save_area.cs.limit,
225 vmcb_s->state_save_area.cs.base);
226 printf("ss=%08x attrib=%x, limit=%x, base=%llx\n",
227 vmcb_s->state_save_area.ss.selector,
228 vmcb_s->state_save_area.ss.attrib,
229 vmcb_s->state_save_area.ss.limit,
230 vmcb_s->state_save_area.ss.base);
231 printf("np_enabled=%lld\n", vmcb_s->control_area.np_enable);
232 printf("cr0=%llx cr4=%llx\n", vmcb_s->state_save_area.cr0,
233 vmcb_s->state_save_area.cr4);
234 printf("interrupt_ctl=%llx\n", vmcb_s->control_area.interrupt_ctl);
235 printf("rip=%llx, rsp=%llx, cpl=%d\n", vmcb_s->state_save_area.rip,
236 vmcb_s->state_save_area.rsp, vmcb_s->state_save_area.cpl);
237 printf("exitinfo1=%llx\n", vmcb_s->control_area.exitinfo1);
241 static l4_addr_t get_state_mem(void)
245 static l4_addr_t ext_state;
250 if ((r = l4vcpu_ext_alloc(&vcpu, &ext_state, L4_BASE_TASK_CAP,
252 printf("Adding state mem failed: %ld\n", r);
258 vcpu->state = L4_VCPU_F_FPU_ENABLED;
259 vcpu->saved_state = L4_VCPU_F_USER_MODE | L4_VCPU_F_FPU_ENABLED | L4_VCPU_F_IRQ;
261 vcpu->entry_ip = (l4_umword_t)handler;
262 l4_umword_t * stack = (l4_umword_t*)(hdl_stack + STACKSIZE);
265 vcpu->entry_sp = (l4_umword_t)stack;
268 tag = l4_thread_vcpu_control_ext(L4_INVALID_CAP, (l4_addr_t) vcpu);
270 printf("Could not enable ext vCPU\n");
278 static void run_test(int np_available) {
281 l4_cap_idx_t vm_task = l4re_util_cap_alloc();
283 l4_umword_t ip; //, marker, test_end;
284 l4_addr_t vmcx = get_state_mem();
286 printf("run test, np_available=%d\n", np_available);
288 if (l4_is_invalid_cap(vm_task)) {
289 printf("No more caps.\n");
293 tag = l4_factory_create_vm(l4re_env()->factory, vm_task);
295 printf("Failed to create new task\n");
299 vmcb_s = (l4_vm_svm_vmcb_t *) vmcx;
301 vcpu->user_task = vm_task;
310 printf("clearing exit codes\n");
312 // asm volatile(" jmp 1f; \n"
324 // " movl %%eax, %%ecx \n"
325 // " addl %%edx, %%ecx \n"
329 // "1: movl $2b, %0 \n"
330 // " movl $3b, %1 \n"
331 // " movl $4b, %2 \n"
332 // : "=r" (ip), "=r" (marker), "=r" (test_end));
334 asm volatile(" jmp 1f; \n"
344 vmcb_s->state_save_area.cpl = 0;
345 vmcb_s->state_save_area.efer = 0x1000; // svme set
347 vmcb_s->state_save_area.cr4 = 0x690;
348 vmcb_s->state_save_area.cr3 = 0;
349 // PG[31] = 0, WP[16] = 1, NE[5] = 1, ET[4] = 1
350 // TS[3] = 1, MP[1] = 1, PE[0] = 1
351 vmcb_s->state_save_area.cr0 = 0x1003b;
354 vmcb_s->state_save_area.cr0 |= 0x80000000; // PG = 1
355 vmcb_s->control_area.np_enable &= ~1;
358 vmcb_s->state_save_area.dr7 = 0x300;
359 vmcb_s->state_save_area.dr6 = 0;
361 asm volatile("pushf \n"
365 vmcb_s->state_save_area.rflags = eflags;
366 vmcb_s->state_save_area.rip = ip;
367 vmcb_s->state_save_area.rsp = (l4_umword_t) stack + STACKSIZE;
370 for (ofs = 0; ofs < STACKSIZE; ofs += L4_PAGESIZE) {
372 unsigned char c = stack[ofs];
375 asm volatile("nop" : "=a"(dummy) : "0" (c));
377 tag = l4_task_map(vm_task, L4RE_THIS_TASK_CAP, l4_fpage(
378 (((l4_umword_t)(stack)) + ofs) & L4_PAGEMASK, L4_PAGESHIFT,
379 L4_FPAGE_RW), l4_map_control(((l4_umword_t) stack) + ofs, 0,
381 printf("msgtag raw=%08x, ofs=%08x\n", (unsigned) tag.raw, ofs);
384 tag = l4_task_map(vm_task, L4RE_THIS_TASK_CAP, l4_fpage(ip & L4_PAGEMASK,
385 L4_PAGESHIFT, L4_FPAGE_RW), l4_map_control(ip, 0, L4_MAP_ITEM_MAP));
387 printf("msgtag raw=%08lx, ip=%08lx\n", tag.raw, ip);
389 idt[26] = 0x80000; // #13 general protection fault
392 idt[28] = 0x80000; // #14 page fault
399 // stack segment 0x10
411 unsigned idt0 = (unsigned long)idt;
412 tag = l4_task_map(vm_task, L4RE_THIS_TASK_CAP, l4_fpage(idt0 & L4_PAGEMASK,
413 L4_PAGESHIFT, L4_FPAGE_RW),
414 l4_map_control(idt0, 0, L4_MAP_ITEM_MAP));
415 printf("msgtag raw=%08lx, idt=%08x\n", (unsigned long)tag.raw, idt0);
417 unsigned gdt0 = (unsigned long)gdt;
418 tag = l4_task_map(vm_task, L4RE_THIS_TASK_CAP, l4_fpage(gdt0 & L4_PAGEMASK,
419 L4_PAGESHIFT, L4_FPAGE_RW),
420 l4_map_control(gdt0, 0, L4_MAP_ITEM_MAP));
421 printf("msgtag raw=%08lx, gdt=%08x\n", (unsigned long)tag.raw, gdt0);
423 // printf("sizes vmcb=%x, control=%x, state=%x\n",
425 // sizeof(vmcb_s->control_area), sizeof(vmcb_s->sitate_save_area));
427 printf("start rip=%llx\n", vmcb_s->state_save_area.rip);
429 vmcb_s->state_save_area.rax = 8;
436 // printf("rip=%08llx, rax=%llx, edx=%lx, ecx=%lx\n",
437 // vmcb_s->state_save_area.rip,
438 // vmcb_s->state_save_area.rax,
439 // vcpu->r.dx, vcpu->r.cx);
441 // printf("run vm stop, status=%s\n", vcpu->r.cx == 9 ? "success" : "failure");
443 // l4_task_unmap(L4RE_THIS_TASK_CAP,
444 // l4_obj_fpage(vm_task, 0, L4_FPAGE_RWX),
445 // L4_FP_ALL_SPACES);
448 #include <l4/sys/ktrace.h>
449 l4_cap_idx_t timer_irq;
450 void * timer_thread(void * );
451 void * timer_thread(void * data) {
454 fiasco_tbuf_log("FIRST");
457 fiasco_tbuf_log("Trig");
460 l4_irq_trigger(timer_irq);
468 timer_irq = l4re_util_cap_alloc();
469 if (l4_error(l4_factory_create_irq(l4re_env()->factory, timer_irq)))
470 printf("irq creation failed\n");
472 if (l4_error(l4_irq_attach(timer_irq, 0x120, L4_INVALID_CAP)))
473 printf("irq attach failed\n");
475 printf("VM testing\n");
479 printf("No SVM CPU. Bye.\n");
483 l4_touch_rw(stack, sizeof(stack));
484 l4_touch_rw(hdl_stack, sizeof(hdl_stack));
486 pthread_t pthread_timer_thread;
488 pthread_create(&pthread_timer_thread, NULL, timer_thread, NULL);
492 if (!check_svm_npt())