kernel/fiasco/src/kern/arm/bsp/imx/timer-arm-imx21.cpp

   1 // --------------------------------------------------------------------------
   2 INTERFACE [arm && imx]:
   3
   4 #include "kmem.h"
   5 #include "irq_chip.h"
   6
   7 EXTENSION class Timer
   8 {
   9 private:
  10   enum {
  11     TCTL  = Kmem::Timer_map_base + 0x00,
  12     TPRER = Kmem::Timer_map_base + 0x04,
  13     TCMP  = Kmem::Timer_map_base + 0x08,
  14     TCR   = Kmem::Timer_map_base + 0x0c,
  15     TCN   = Kmem::Timer_map_base + 0x10,
  16     TSTAT = Kmem::Timer_map_base + 0x14,
  17
  18     TCTL_TEN                            = 1 << 0,
  19     TCTL_CLKSOURCE_PERCLK1_TO_PRESCALER = 1 << 1,
  20     TCTL_CLKSOURCE_32kHz                = 1 << 3,
  21     TCTL_COMP_EN                        = 1 << 4,
  22     TCTL_SW_RESET                       = 1 << 15,
  23   };
  24 private:
  25   static Irq_base *irq;
  26 };
  27
  28 // ----------------------------------------------------------------------
  29 IMPLEMENTATION [arm && imx]:
  30
  31 #include "config.h"
  32 #include "kip.h"
  33 #include "irq_chip.h"
  34 #include "irq_pin.h"
  35 #include "io.h"
  36
  37 #include <cstdio>
  38
  39 Irq_base *Timer::irq;
  40
  41 IMPLEMENT
  42 void Timer::init()
  43 {
  44   Io::write<Mword>(0, TCTL); // Disable
  45   Io::write<Mword>(TCTL_SW_RESET, TCTL); // reset timer
  46   for (int i = 0; i < 10; ++i)
  47     Io::read<Mword>(TCN); // docu says reset takes 5 cycles
  48
  49   Io::write<Mword>(TCTL_CLKSOURCE_32kHz | TCTL_COMP_EN, TCTL);
  50   Io::write<Mword>(0, TPRER);
  51   Io::write<Mword>(32, TCMP);
  52
  53   Irq_chip::hw_chip->reserve(Config::Scheduling_irq);
  54
  55   static Irq_base ib;
  56   Irq_chip::hw_chip->setup(&ib, Config::Scheduling_irq);
  57   irq = &ib;
  58
  59   Io::set<Mword>(TCTL_TEN, TCTL);
  60 }
  61
  62 static inline
  63 Unsigned64
  64 Timer::timer_to_us(Unsigned32 /*cr*/)
  65 { return 0; }
  66
  67 static inline
  68 Unsigned64
  69 Timer::us_to_timer(Unsigned64 us)
  70 { (void)us; return 0; }
  71
  72 IMPLEMENT inline NEEDS["io.h"]
  73 void Timer::acknowledge()
  74 {
  75   Io::write<Mword>(1, TSTAT);
  76 }
  77
  78 IMPLEMENT inline NEEDS["irq_pin.h"]
  79 void Timer::enable()
  80 {
  81   irq->pin()->unmask();
  82 }
  83
  84 IMPLEMENT inline NEEDS["irq_pin.h"]
  85 void Timer::disable()
  86 {
  87   irq->pin()->mask();
  88 }
  89
  90 IMPLEMENT inline NEEDS["kip.h", "io.h", Timer::timer_to_us, Timer::us_to_timer]
  91 void
  92 Timer::update_one_shot(Unsigned64 /*wakeup*/)
  93 {
  94 }
  95
  96 IMPLEMENT inline NEEDS["config.h", "kip.h", "io.h", Timer::timer_to_us]
  97 Unsigned64
  98 Timer::system_clock()
  99 {
 100   if (Config::scheduler_one_shot)
 101     //return Kip::k()->clock + timer_to_us(Io::read<Unsigned32>(OSCR));
 102     return 0;
 103   else
 104     return Kip::k()->clock;
 105 }
 106