4 #include "obj_space_phys_util.h"
6 class Vm : public Obj_space_phys_override<Task>
9 explicit Vm(Ram_quota *q)
10 : Obj_space_phys_override<Task>(q, Caps::mem() | Caps::obj())
13 int resume_vcpu(Context *, Vcpu_state *, bool) = 0;
16 // ------------------------------------------------------------------------
22 Vm::mem_space_map_max_address() const
23 { return Page_number(1UL << (MWORD_BITS - Mem_space::Page_shift)); }
25 PROTECTED static inline
27 Vm::force_kern_entry_vcpu_state(Vcpu_state *vcpu)
29 vcpu->state &= ~(Vcpu_state::F_traps | Vcpu_state::F_user_mode);
33 * Sanitize and load a guest-provided xcr0 value.
35 * An invalid xcr0 value will cause a GP. Therefore we implement all the checks
36 * defined in the intel manual to ensure that no guest can cause a GP.
38 * This function is strict, and does not allow for "new" bits that come up in
39 * new CPUs and are advertised in cpuid. These new bits could come with new
40 * constraints that need to be checked here. Therefore even if those bits are
41 * enabled in the host, we do not allow them for the guest until we get the new
42 * manual and can implement the integrity checks accordingly.
44 PROTECTED static inline NEEDS["cpu.h"]
46 Vm::load_guest_xcr0(Unsigned64 host_xcr0, Unsigned64 guest_xcr0)
48 if (!Cpu::have_xsave() || !(host_xcr0 ^ guest_xcr0))
56 Xstate_defined_bits = 0x7,
58 guest_xcr0 &= Xstate_defined_bits; // allow only defined bits
59 guest_xcr0 |= Xstate_fp; // fp must always be set
60 if (guest_xcr0 & Xstate_avx) // if avx is set, sse must also be set
61 guest_xcr0 |= Xstate_sse;
63 guest_xcr0 &= host_xcr0; // only allow bits that are available on the CPU
64 Cpu::xsetbv(guest_xcr0, 0);
70 PROTECTED static inline NEEDS["cpu.h"]
72 Vm::load_host_xcr0(Unsigned64 host_xcr0, Unsigned64 guest_xcr0)
74 if (!Cpu::have_xsave() || !(guest_xcr0 ^ host_xcr0))
76 Cpu::xsetbv(host_xcr0, 0);
79 // ------------------------------------------------------------------------
80 IMPLEMENTATION [ia32]:
82 PROTECTED static inline
87 // ------------------------------------------------------------------------
88 IMPLEMENTATION [amd64]:
90 PROTECTED static inline