l4/pkg/valgrind/src/valgrind-3.6.0-svn/VEX/priv/ir_defs.c

   1
   2 /*---------------------------------------------------------------*/
   3 /*--- begin                                         ir_defs.c ---*/
   4 /*---------------------------------------------------------------*/
   5
   6 /*
   7    This file is part of Valgrind, a dynamic binary instrumentation
   8    framework.
   9
  10    Copyright (C) 2004-2010 OpenWorks LLP
  11       info@open-works.net
  12
  13    This program is free software; you can redistribute it and/or
  14    modify it under the terms of the GNU General Public License as
  15    published by the Free Software Foundation; either version 2 of the
  16    License, or (at your option) any later version.
  17
  18    This program is distributed in the hope that it will be useful, but
  19    WITHOUT ANY WARRANTY; without even the implied warranty of
  20    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21    General Public License for more details.
  22
  23    You should have received a copy of the GNU General Public License
  24    along with this program; if not, write to the Free Software
  25    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  26    02110-1301, USA.
  27
  28    The GNU General Public License is contained in the file COPYING.
  29
  30    Neither the names of the U.S. Department of Energy nor the
  31    University of California nor the names of its contributors may be
  32    used to endorse or promote products derived from this software
  33    without prior written permission.
  34 */
  35
  36 #include "libvex_basictypes.h"
  37 #include "libvex_ir.h"
  38 #include "libvex.h"
  39
  40 #include "main_util.h"
  41
  42
  43 /*---------------------------------------------------------------*/
  44 /*--- Printing the IR                                         ---*/
  45 /*---------------------------------------------------------------*/
  46
  47 void ppIRType ( IRType ty )
  48 {
  49    switch (ty) {
  50       case Ity_INVALID: vex_printf("Ity_INVALID"); break;
  51       case Ity_I1:      vex_printf( "I1");   break;
  52       case Ity_I8:      vex_printf( "I8");   break;
  53       case Ity_I16:     vex_printf( "I16");  break;
  54       case Ity_I32:     vex_printf( "I32");  break;
  55       case Ity_I64:     vex_printf( "I64");  break;
  56       case Ity_I128:    vex_printf( "I128"); break;
  57       case Ity_F32:     vex_printf( "F32");  break;
  58       case Ity_F64:     vex_printf( "F64");  break;
  59       case Ity_F128:    vex_printf( "F128"); break;
  60       case Ity_V128:    vex_printf( "V128"); break;
  61       default: vex_printf("ty = 0x%x\n", (Int)ty);
  62                vpanic("ppIRType");
  63    }
  64 }
  65
  66 void ppIRConst ( IRConst* con )
  67 {
  68    union { ULong i64; Double f64; UInt i32; Float f32; } u;
  69    vassert(sizeof(ULong) == sizeof(Double));
  70    switch (con->tag) {
  71       case Ico_U1:   vex_printf( "%d:I1",        con->Ico.U1 ? 1 : 0); break;
  72       case Ico_U8:   vex_printf( "0x%x:I8",      (UInt)(con->Ico.U8)); break;
  73       case Ico_U16:  vex_printf( "0x%x:I16",     (UInt)(con->Ico.U16)); break;
  74       case Ico_U32:  vex_printf( "0x%x:I32",     (UInt)(con->Ico.U32)); break;
  75       case Ico_U64:  vex_printf( "0x%llx:I64",   (ULong)(con->Ico.U64)); break;
  76       case Ico_F32:  u.f32 = con->Ico.F32;
  77                      vex_printf( "F32{0x%x}",   u.i32);
  78                      break;
  79       case Ico_F32i: vex_printf( "F32i{0x%x}",   con->Ico.F32i); break;
  80       case Ico_F64:  u.f64 = con->Ico.F64;
  81                      vex_printf( "F64{0x%llx}",  u.i64);
  82                      break;
  83       case Ico_F64i: vex_printf( "F64i{0x%llx}", con->Ico.F64i); break;
  84       case Ico_V128: vex_printf( "V128{0x%04x}", (UInt)(con->Ico.V128)); break;
  85       default: vpanic("ppIRConst");
  86    }
  87 }
  88
  89 void ppIRCallee ( IRCallee* ce )
  90 {
  91    vex_printf("%s", ce->name);
  92    if (ce->regparms > 0)
  93       vex_printf("[rp=%d]", ce->regparms);
  94    if (ce->mcx_mask > 0)
  95       vex_printf("[mcx=0x%x]", ce->mcx_mask);
  96    vex_printf("{%p}", (void*)ce->addr);
  97 }
  98
  99 void ppIRRegArray ( IRRegArray* arr )
 100 {
 101    vex_printf("(%d:%dx", arr->base, arr->nElems);
 102    ppIRType(arr->elemTy);
 103    vex_printf(")");
 104 }
 105
 106 void ppIRTemp ( IRTemp tmp )
 107 {
 108    if (tmp == IRTemp_INVALID)
 109       vex_printf("IRTemp_INVALID");
 110    else
 111       vex_printf( "t%d", (Int)tmp);
 112 }
 113
 114 void ppIROp ( IROp op )
 115 {
 116    HChar* str = NULL;
 117    IROp   base;
 118    switch (op) {
 119       case Iop_Add8 ... Iop_Add64:
 120          str = "Add"; base = Iop_Add8; break;
 121       case Iop_Sub8 ... Iop_Sub64:
 122          str = "Sub"; base = Iop_Sub8; break;
 123       case Iop_Mul8 ... Iop_Mul64:
 124          str = "Mul"; base = Iop_Mul8; break;
 125       case Iop_Or8 ... Iop_Or64:
 126          str = "Or"; base = Iop_Or8; break;
 127       case Iop_And8 ... Iop_And64:
 128          str = "And"; base = Iop_And8; break;
 129       case Iop_Xor8 ... Iop_Xor64:
 130          str = "Xor"; base = Iop_Xor8; break;
 131       case Iop_Shl8 ... Iop_Shl64:
 132          str = "Shl"; base = Iop_Shl8; break;
 133       case Iop_Shr8 ... Iop_Shr64:
 134          str = "Shr"; base = Iop_Shr8; break;
 135       case Iop_Sar8 ... Iop_Sar64:
 136          str = "Sar"; base = Iop_Sar8; break;
 137       case Iop_CmpEQ8 ... Iop_CmpEQ64:
 138          str = "CmpEQ"; base = Iop_CmpEQ8; break;
 139       case Iop_CmpNE8 ... Iop_CmpNE64:
 140          str = "CmpNE"; base = Iop_CmpNE8; break;
 141       case Iop_CasCmpEQ8 ... Iop_CasCmpEQ64:
 142          str = "CasCmpEQ"; base = Iop_CasCmpEQ8; break;
 143       case Iop_CasCmpNE8 ... Iop_CasCmpNE64:
 144          str = "CasCmpNE"; base = Iop_CasCmpNE8; break;
 145       case Iop_Not8 ... Iop_Not64:
 146          str = "Not"; base = Iop_Not8; break;
 147       /* other cases must explicitly "return;" */
 148       case Iop_8Uto16:   vex_printf("8Uto16");  return;
 149       case Iop_8Uto32:   vex_printf("8Uto32");  return;
 150       case Iop_16Uto32:  vex_printf("16Uto32"); return;
 151       case Iop_8Sto16:   vex_printf("8Sto16");  return;
 152       case Iop_8Sto32:   vex_printf("8Sto32");  return;
 153       case Iop_16Sto32:  vex_printf("16Sto32"); return;
 154       case Iop_32Sto64:  vex_printf("32Sto64"); return;
 155       case Iop_32Uto64:  vex_printf("32Uto64"); return;
 156       case Iop_32to8:    vex_printf("32to8");   return;
 157       case Iop_16Uto64:  vex_printf("16Uto64"); return;
 158       case Iop_16Sto64:  vex_printf("16Sto64"); return;
 159       case Iop_8Uto64:   vex_printf("8Uto64"); return;
 160       case Iop_8Sto64:   vex_printf("8Sto64"); return;
 161       case Iop_64to16:   vex_printf("64to16"); return;
 162       case Iop_64to8:    vex_printf("64to8");  return;
 163
 164       case Iop_Not1:     vex_printf("Not1");    return;
 165       case Iop_32to1:    vex_printf("32to1");   return;
 166       case Iop_64to1:    vex_printf("64to1");   return;
 167       case Iop_1Uto8:    vex_printf("1Uto8");   return;
 168       case Iop_1Uto32:   vex_printf("1Uto32");  return;
 169       case Iop_1Uto64:   vex_printf("1Uto64");  return;
 170       case Iop_1Sto8:    vex_printf("1Sto8");  return;
 171       case Iop_1Sto16:   vex_printf("1Sto16");  return;
 172       case Iop_1Sto32:   vex_printf("1Sto32");  return;
 173       case Iop_1Sto64:   vex_printf("1Sto64");  return;
 174
 175       case Iop_MullS8:   vex_printf("MullS8");  return;
 176       case Iop_MullS16:  vex_printf("MullS16"); return;
 177       case Iop_MullS32:  vex_printf("MullS32"); return;
 178       case Iop_MullS64:  vex_printf("MullS64"); return;
 179       case Iop_MullU8:   vex_printf("MullU8");  return;
 180       case Iop_MullU16:  vex_printf("MullU16"); return;
 181       case Iop_MullU32:  vex_printf("MullU32"); return;
 182       case Iop_MullU64:  vex_printf("MullU64"); return;
 183
 184       case Iop_Clz64:    vex_printf("Clz64"); return;
 185       case Iop_Clz32:    vex_printf("Clz32"); return;
 186       case Iop_Ctz64:    vex_printf("Ctz64"); return;
 187       case Iop_Ctz32:    vex_printf("Ctz32"); return;
 188
 189       case Iop_CmpLT32S: vex_printf("CmpLT32S"); return;
 190       case Iop_CmpLE32S: vex_printf("CmpLE32S"); return;
 191       case Iop_CmpLT32U: vex_printf("CmpLT32U"); return;
 192       case Iop_CmpLE32U: vex_printf("CmpLE32U"); return;
 193
 194       case Iop_CmpLT64S: vex_printf("CmpLT64S"); return;
 195       case Iop_CmpLE64S: vex_printf("CmpLE64S"); return;
 196       case Iop_CmpLT64U: vex_printf("CmpLT64U"); return;
 197       case Iop_CmpLE64U: vex_printf("CmpLE64U"); return;
 198
 199       case Iop_CmpNEZ8:  vex_printf("CmpNEZ8"); return;
 200       case Iop_CmpNEZ16: vex_printf("CmpNEZ16"); return;
 201       case Iop_CmpNEZ32: vex_printf("CmpNEZ32"); return;
 202       case Iop_CmpNEZ64: vex_printf("CmpNEZ64"); return;
 203
 204       case Iop_CmpwNEZ32: vex_printf("CmpwNEZ32"); return;
 205       case Iop_CmpwNEZ64: vex_printf("CmpwNEZ64"); return;
 206
 207       case Iop_Left8:  vex_printf("Left8"); return;
 208       case Iop_Left16: vex_printf("Left16"); return;
 209       case Iop_Left32: vex_printf("Left32"); return;
 210       case Iop_Left64: vex_printf("Left64"); return;
 211       case Iop_Max32U: vex_printf("Max32U"); return;
 212
 213       case Iop_CmpORD32U: vex_printf("CmpORD32U"); return;
 214       case Iop_CmpORD32S: vex_printf("CmpORD32S"); return;
 215
 216       case Iop_CmpORD64U: vex_printf("CmpORD64U"); return;
 217       case Iop_CmpORD64S: vex_printf("CmpORD64S"); return;
 218
 219       case Iop_DivU32: vex_printf("DivU32"); return;
 220       case Iop_DivS32: vex_printf("DivS32"); return;
 221       case Iop_DivU64: vex_printf("DivU64"); return;
 222       case Iop_DivS64: vex_printf("DivS64"); return;
 223
 224       case Iop_DivModU64to32: vex_printf("DivModU64to32"); return;
 225       case Iop_DivModS64to32: vex_printf("DivModS64to32"); return;
 226
 227       case Iop_DivModU128to64: vex_printf("DivModU128to64"); return;
 228       case Iop_DivModS128to64: vex_printf("DivModS128to64"); return;
 229
 230       case Iop_DivModS64to64: vex_printf("DivModS64to64"); return;
 231
 232       case Iop_16HIto8:  vex_printf("16HIto8"); return;
 233       case Iop_16to8:    vex_printf("16to8");   return;
 234       case Iop_8HLto16:  vex_printf("8HLto16"); return;
 235
 236       case Iop_32HIto16: vex_printf("32HIto16"); return;
 237       case Iop_32to16:   vex_printf("32to16");   return;
 238       case Iop_16HLto32: vex_printf("16HLto32"); return;
 239
 240       case Iop_64HIto32: vex_printf("64HIto32"); return;
 241       case Iop_64to32:   vex_printf("64to32");   return;
 242       case Iop_32HLto64: vex_printf("32HLto64"); return;
 243
 244       case Iop_128HIto64: vex_printf("128HIto64"); return;
 245       case Iop_128to64:   vex_printf("128to64");   return;
 246       case Iop_64HLto128: vex_printf("64HLto128"); return;
 247
 248       case Iop_CmpF32:    vex_printf("CmpF32");    return;
 249       case Iop_F32toI16S: vex_printf("F32toI16S");  return;
 250       case Iop_F32toI32S: vex_printf("F32toI32S");  return;
 251       case Iop_F32toI64S: vex_printf("F32toI64S");  return;
 252       case Iop_I16StoF32: vex_printf("I16StoF32");  return;
 253       case Iop_I32StoF32: vex_printf("I32StoF32");  return;
 254       case Iop_I64StoF32: vex_printf("I64StoF32");  return;
 255
 256       case Iop_AddF64:    vex_printf("AddF64"); return;
 257       case Iop_SubF64:    vex_printf("SubF64"); return;
 258       case Iop_MulF64:    vex_printf("MulF64"); return;
 259       case Iop_DivF64:    vex_printf("DivF64"); return;
 260       case Iop_AddF64r32: vex_printf("AddF64r32"); return;
 261       case Iop_SubF64r32: vex_printf("SubF64r32"); return;
 262       case Iop_MulF64r32: vex_printf("MulF64r32"); return;
 263       case Iop_DivF64r32: vex_printf("DivF64r32"); return;
 264       case Iop_AddF32:    vex_printf("AddF32"); return;
 265       case Iop_SubF32:    vex_printf("SubF32"); return;
 266       case Iop_MulF32:    vex_printf("MulF32"); return;
 267       case Iop_DivF32:    vex_printf("DivF32"); return;
 268
 269         /* 128 bit floating point */
 270       case Iop_AddF128:   vex_printf("AddF128");  return;
 271       case Iop_SubF128:   vex_printf("SubF128");  return;
 272       case Iop_MulF128:   vex_printf("MulF128");  return;
 273       case Iop_DivF128:   vex_printf("DivF128");  return;
 274       case Iop_AbsF128:   vex_printf("AbsF128");  return;
 275       case Iop_NegF128:   vex_printf("NegF128");  return;
 276       case Iop_SqrtF128:  vex_printf("SqrtF128"); return;
 277       case Iop_CmpF128:   vex_printf("CmpF128");  return;
 278
 279       case Iop_F64HLtoF128: vex_printf("F64HLtoF128"); return;
 280       case Iop_F128HItoF64: vex_printf("F128HItoF64"); return;
 281       case Iop_F128LOtoF64: vex_printf("F128LOtoF64"); return;
 282       case Iop_I32StoF128: vex_printf("I32StoF128"); return;
 283       case Iop_I64StoF128: vex_printf("I64StoF128"); return;
 284       case Iop_F128toI32S: vex_printf("F128toI32S"); return;
 285       case Iop_F128toI64S: vex_printf("F128toI64S"); return;
 286       case Iop_F32toF128:  vex_printf("F32toF128");  return;
 287       case Iop_F64toF128:  vex_printf("F64toF128");  return;
 288       case Iop_F128toF64:  vex_printf("F128toF64");  return;
 289       case Iop_F128toF32:  vex_printf("F128toF32");  return;
 290
 291         /* s390 specific */
 292       case Iop_MAddF32:    vex_printf("s390_MAddF32"); return;
 293       case Iop_MSubF32:    vex_printf("s390_MSubF32"); return;
 294
 295       case Iop_ScaleF64:      vex_printf("ScaleF64"); return;
 296       case Iop_AtanF64:       vex_printf("AtanF64"); return;
 297       case Iop_Yl2xF64:       vex_printf("Yl2xF64"); return;
 298       case Iop_Yl2xp1F64:     vex_printf("Yl2xp1F64"); return;
 299       case Iop_PRemF64:       vex_printf("PRemF64"); return;
 300       case Iop_PRemC3210F64:  vex_printf("PRemC3210F64"); return;
 301       case Iop_PRem1F64:      vex_printf("PRem1F64"); return;
 302       case Iop_PRem1C3210F64: vex_printf("PRem1C3210F64"); return;
 303       case Iop_NegF64:        vex_printf("NegF64"); return;
 304       case Iop_AbsF64:        vex_printf("AbsF64"); return;
 305       case Iop_NegF32:        vex_printf("NegF32"); return;
 306       case Iop_AbsF32:        vex_printf("AbsF32"); return;
 307       case Iop_SqrtF64:       vex_printf("SqrtF64"); return;
 308       case Iop_SqrtF32:       vex_printf("SqrtF32"); return;
 309       case Iop_SinF64:    vex_printf("SinF64"); return;
 310       case Iop_CosF64:    vex_printf("CosF64"); return;
 311       case Iop_TanF64:    vex_printf("TanF64"); return;
 312       case Iop_2xm1F64:   vex_printf("2xm1F64"); return;
 313
 314       case Iop_MAddF64:    vex_printf("MAddF64"); return;
 315       case Iop_MSubF64:    vex_printf("MSubF64"); return;
 316       case Iop_MAddF64r32: vex_printf("MAddF64r32"); return;
 317       case Iop_MSubF64r32: vex_printf("MSubF64r32"); return;
 318
 319       case Iop_Est5FRSqrt:    vex_printf("Est5FRSqrt"); return;
 320       case Iop_RoundF64toF64_NEAREST: vex_printf("RoundF64toF64_NEAREST"); return;
 321       case Iop_RoundF64toF64_NegINF: vex_printf("RoundF64toF64_NegINF"); return;
 322       case Iop_RoundF64toF64_PosINF: vex_printf("RoundF64toF64_PosINF"); return;
 323       case Iop_RoundF64toF64_ZERO: vex_printf("RoundF64toF64_ZERO"); return;
 324
 325       case Iop_TruncF64asF32: vex_printf("TruncF64asF32"); return;
 326       case Iop_CalcFPRF:      vex_printf("CalcFPRF"); return;
 327
 328       case Iop_Add16x2:   vex_printf("Add16x2"); return;
 329       case Iop_Sub16x2:   vex_printf("Sub16x2"); return;
 330       case Iop_QAdd16Sx2: vex_printf("QAdd16Sx2"); return;
 331       case Iop_QAdd16Ux2: vex_printf("QAdd16Ux2"); return;
 332       case Iop_QSub16Sx2: vex_printf("QSub16Sx2"); return;
 333       case Iop_QSub16Ux2: vex_printf("QSub16Ux2"); return;
 334       case Iop_HAdd16Ux2: vex_printf("HAdd16Ux2"); return;
 335       case Iop_HAdd16Sx2: vex_printf("HAdd16Sx2"); return;
 336       case Iop_HSub16Ux2: vex_printf("HSub16Ux2"); return;
 337       case Iop_HSub16Sx2: vex_printf("HSub16Sx2"); return;
 338
 339       case Iop_Add8x4:   vex_printf("Add8x4"); return;
 340       case Iop_Sub8x4:   vex_printf("Sub8x4"); return;
 341       case Iop_QAdd8Sx4: vex_printf("QAdd8Sx4"); return;
 342       case Iop_QAdd8Ux4: vex_printf("QAdd8Ux4"); return;
 343       case Iop_QSub8Sx4: vex_printf("QSub8Sx4"); return;
 344       case Iop_QSub8Ux4: vex_printf("QSub8Ux4"); return;
 345       case Iop_HAdd8Ux4: vex_printf("HAdd8Ux4"); return;
 346       case Iop_HAdd8Sx4: vex_printf("HAdd8Sx4"); return;
 347       case Iop_HSub8Ux4: vex_printf("HSub8Ux4"); return;
 348       case Iop_HSub8Sx4: vex_printf("HSub8Sx4"); return;
 349       case Iop_Sad8Ux4:  vex_printf("Sad8Ux4"); return;
 350
 351       case Iop_CmpNEZ16x2: vex_printf("CmpNEZ16x2"); return;
 352       case Iop_CmpNEZ8x4:  vex_printf("CmpNEZ8x4"); return;
 353
 354       case Iop_CmpF64:    vex_printf("CmpF64"); return;
 355
 356       case Iop_F64toI16S: vex_printf("F64toI16S"); return;
 357       case Iop_F64toI32S: vex_printf("F64toI32S"); return;
 358       case Iop_F64toI64S: vex_printf("F64toI64S"); return;
 359
 360       case Iop_F64toI32U: vex_printf("F64toI32U"); return;
 361
 362       case Iop_I16StoF64: vex_printf("I16StoF64"); return;
 363       case Iop_I32StoF64: vex_printf("I32StoF64"); return;
 364       case Iop_I64StoF64: vex_printf("I64StoF64"); return;
 365       case Iop_I64UtoF64: vex_printf("I64UtoF64"); return;
 366       case Iop_I64UtoF32: vex_printf("I64UtoF32"); return;
 367
 368       case Iop_I32UtoF64: vex_printf("I32UtoF64"); return;
 369
 370       case Iop_F32toF64: vex_printf("F32toF64"); return;
 371       case Iop_F64toF32: vex_printf("F64toF32"); return;
 372
 373       case Iop_RoundF64toInt: vex_printf("RoundF64toInt"); return;
 374       case Iop_RoundF32toInt: vex_printf("RoundF32toInt"); return;
 375       case Iop_RoundF64toF32: vex_printf("RoundF64toF32"); return;
 376
 377       case Iop_ReinterpF64asI64: vex_printf("ReinterpF64asI64"); return;
 378       case Iop_ReinterpI64asF64: vex_printf("ReinterpI64asF64"); return;
 379       case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return;
 380       case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return;
 381
 382       case Iop_I32UtoFx4: vex_printf("I32UtoFx4"); return;
 383       case Iop_I32StoFx4: vex_printf("I32StoFx4"); return;
 384
 385       case Iop_F32toF16x4: vex_printf("F32toF16x4"); return;
 386       case Iop_F16toF32x4: vex_printf("F16toF32x4"); return;
 387
 388       case Iop_Rsqrte32Fx4: vex_printf("VRsqrte32Fx4"); return;
 389       case Iop_Rsqrte32x4:  vex_printf("VRsqrte32x4"); return;
 390       case Iop_Rsqrte32Fx2: vex_printf("VRsqrte32Fx2"); return;
 391       case Iop_Rsqrte32x2:  vex_printf("VRsqrte32x2"); return;
 392
 393       case Iop_QFtoI32Ux4_RZ: vex_printf("QFtoI32Ux4_RZ"); return;
 394       case Iop_QFtoI32Sx4_RZ: vex_printf("QFtoI32Sx4_RZ"); return;
 395
 396       case Iop_FtoI32Ux4_RZ: vex_printf("FtoI32Ux4_RZ"); return;
 397       case Iop_FtoI32Sx4_RZ: vex_printf("FtoI32Sx4_RZ"); return;
 398
 399       case Iop_I32UtoFx2: vex_printf("I32UtoFx2"); return;
 400       case Iop_I32StoFx2: vex_printf("I32StoFx2"); return;
 401
 402       case Iop_FtoI32Ux2_RZ: vex_printf("FtoI32Ux2_RZ"); return;
 403       case Iop_FtoI32Sx2_RZ: vex_printf("FtoI32Sx2_RZ"); return;
 404
 405       case Iop_RoundF32x4_RM: vex_printf("RoundF32x4_RM"); return;
 406       case Iop_RoundF32x4_RP: vex_printf("RoundF32x4_RP"); return;
 407       case Iop_RoundF32x4_RN: vex_printf("RoundF32x4_RN"); return;
 408       case Iop_RoundF32x4_RZ: vex_printf("RoundF32x4_RZ"); return;
 409
 410       case Iop_Abs8x8: vex_printf("Abs8x8"); return;
 411       case Iop_Abs16x4: vex_printf("Abs16x4"); return;
 412       case Iop_Abs32x2: vex_printf("Abs32x2"); return;
 413       case Iop_Add8x8: vex_printf("Add8x8"); return;
 414       case Iop_Add16x4: vex_printf("Add16x4"); return;
 415       case Iop_Add32x2: vex_printf("Add32x2"); return;
 416       case Iop_QAdd8Ux8: vex_printf("QAdd8Ux8"); return;
 417       case Iop_QAdd16Ux4: vex_printf("QAdd16Ux4"); return;
 418       case Iop_QAdd32Ux2: vex_printf("QAdd32Ux2"); return;
 419       case Iop_QAdd64Ux1: vex_printf("QAdd64Ux1"); return;
 420       case Iop_QAdd8Sx8: vex_printf("QAdd8Sx8"); return;
 421       case Iop_QAdd16Sx4: vex_printf("QAdd16Sx4"); return;
 422       case Iop_QAdd32Sx2: vex_printf("QAdd32Sx2"); return;
 423       case Iop_QAdd64Sx1: vex_printf("QAdd64Sx1"); return;
 424       case Iop_PwAdd8x8: vex_printf("PwAdd8x8"); return;
 425       case Iop_PwAdd16x4: vex_printf("PwAdd16x4"); return;
 426       case Iop_PwAdd32x2: vex_printf("PwAdd32x2"); return;
 427       case Iop_PwAdd32Fx2: vex_printf("PwAdd32Fx2"); return;
 428       case Iop_PwAddL8Ux8: vex_printf("PwAddL8Ux8"); return;
 429       case Iop_PwAddL16Ux4: vex_printf("PwAddL16Ux4"); return;
 430       case Iop_PwAddL32Ux2: vex_printf("PwAddL32Ux2"); return;
 431       case Iop_PwAddL8Sx8: vex_printf("PwAddL8Sx8"); return;
 432       case Iop_PwAddL16Sx4: vex_printf("PwAddL16Sx4"); return;
 433       case Iop_PwAddL32Sx2: vex_printf("PwAddL32Sx2"); return;
 434       case Iop_Sub8x8: vex_printf("Sub8x8"); return;
 435       case Iop_Sub16x4: vex_printf("Sub16x4"); return;
 436       case Iop_Sub32x2: vex_printf("Sub32x2"); return;
 437       case Iop_QSub8Ux8: vex_printf("QSub8Ux8"); return;
 438       case Iop_QSub16Ux4: vex_printf("QSub16Ux4"); return;
 439       case Iop_QSub32Ux2: vex_printf("QSub32Ux2"); return;
 440       case Iop_QSub64Ux1: vex_printf("QSub64Ux1"); return;
 441       case Iop_QSub8Sx8: vex_printf("QSub8Sx8"); return;
 442       case Iop_QSub16Sx4: vex_printf("QSub16Sx4"); return;
 443       case Iop_QSub32Sx2: vex_printf("QSub32Sx2"); return;
 444       case Iop_QSub64Sx1: vex_printf("QSub64Sx1"); return;
 445       case Iop_Mul8x8: vex_printf("Mul8x8"); return;
 446       case Iop_Mul16x4: vex_printf("Mul16x4"); return;
 447       case Iop_Mul32x2: vex_printf("Mul32x2"); return;
 448       case Iop_Mul32Fx2: vex_printf("Mul32Fx2"); return;
 449       case Iop_PolynomialMul8x8: vex_printf("PolynomialMul8x8"); return;
 450       case Iop_MulHi16Ux4: vex_printf("MulHi16Ux4"); return;
 451       case Iop_MulHi16Sx4: vex_printf("MulHi16Sx4"); return;
 452       case Iop_QDMulHi16Sx4: vex_printf("QDMulHi16Sx4"); return;
 453       case Iop_QDMulHi32Sx2: vex_printf("QDMulHi32Sx2"); return;
 454       case Iop_QRDMulHi16Sx4: vex_printf("QRDMulHi16Sx4"); return;
 455       case Iop_QRDMulHi32Sx2: vex_printf("QRDMulHi32Sx2"); return;
 456       case Iop_QDMulLong16Sx4: vex_printf("QDMulLong16Sx4"); return;
 457       case Iop_QDMulLong32Sx2: vex_printf("QDMulLong32Sx2"); return;
 458       case Iop_Avg8Ux8: vex_printf("Avg8Ux8"); return;
 459       case Iop_Avg16Ux4: vex_printf("Avg16Ux4"); return;
 460       case Iop_Max8Sx8: vex_printf("Max8Sx8"); return;
 461       case Iop_Max16Sx4: vex_printf("Max16Sx4"); return;
 462       case Iop_Max32Sx2: vex_printf("Max32Sx2"); return;
 463       case Iop_Max8Ux8: vex_printf("Max8Ux8"); return;
 464       case Iop_Max16Ux4: vex_printf("Max16Ux4"); return;
 465       case Iop_Max32Ux2: vex_printf("Max32Ux2"); return;
 466       case Iop_Min8Sx8: vex_printf("Min8Sx8"); return;
 467       case Iop_Min16Sx4: vex_printf("Min16Sx4"); return;
 468       case Iop_Min32Sx2: vex_printf("Min32Sx2"); return;
 469       case Iop_Min8Ux8: vex_printf("Min8Ux8"); return;
 470       case Iop_Min16Ux4: vex_printf("Min16Ux4"); return;
 471       case Iop_Min32Ux2: vex_printf("Min32Ux2"); return;
 472       case Iop_PwMax8Sx8: vex_printf("PwMax8Sx8"); return;
 473       case Iop_PwMax16Sx4: vex_printf("PwMax16Sx4"); return;
 474       case Iop_PwMax32Sx2: vex_printf("PwMax32Sx2"); return;
 475       case Iop_PwMax8Ux8: vex_printf("PwMax8Ux8"); return;
 476       case Iop_PwMax16Ux4: vex_printf("PwMax16Ux4"); return;
 477       case Iop_PwMax32Ux2: vex_printf("PwMax32Ux2"); return;
 478       case Iop_PwMin8Sx8: vex_printf("PwMin8Sx8"); return;
 479       case Iop_PwMin16Sx4: vex_printf("PwMin16Sx4"); return;
 480       case Iop_PwMin32Sx2: vex_printf("PwMin32Sx2"); return;
 481       case Iop_PwMin8Ux8: vex_printf("PwMin8Ux8"); return;
 482       case Iop_PwMin16Ux4: vex_printf("PwMin16Ux4"); return;
 483       case Iop_PwMin32Ux2: vex_printf("PwMin32Ux2"); return;
 484       case Iop_CmpEQ8x8: vex_printf("CmpEQ8x8"); return;
 485       case Iop_CmpEQ16x4: vex_printf("CmpEQ16x4"); return;
 486       case Iop_CmpEQ32x2: vex_printf("CmpEQ32x2"); return;
 487       case Iop_CmpGT8Ux8: vex_printf("CmpGT8Ux8"); return;
 488       case Iop_CmpGT16Ux4: vex_printf("CmpGT16Ux4"); return;
 489       case Iop_CmpGT32Ux2: vex_printf("CmpGT32Ux2"); return;
 490       case Iop_CmpGT8Sx8: vex_printf("CmpGT8Sx8"); return;
 491       case Iop_CmpGT16Sx4: vex_printf("CmpGT16Sx4"); return;
 492       case Iop_CmpGT32Sx2: vex_printf("CmpGT32Sx2"); return;
 493       case Iop_Cnt8x8: vex_printf("Cnt8x8"); return;
 494       case Iop_Clz8Sx8: vex_printf("Clz8Sx8"); return;
 495       case Iop_Clz16Sx4: vex_printf("Clz16Sx4"); return;
 496       case Iop_Clz32Sx2: vex_printf("Clz32Sx2"); return;
 497       case Iop_Cls8Sx8: vex_printf("Cls8Sx8"); return;
 498       case Iop_Cls16Sx4: vex_printf("Cls16Sx4"); return;
 499       case Iop_Cls32Sx2: vex_printf("Cls32Sx2"); return;
 500       case Iop_ShlN8x8: vex_printf("ShlN8x8"); return;
 501       case Iop_ShlN16x4: vex_printf("ShlN16x4"); return;
 502       case Iop_ShlN32x2: vex_printf("ShlN32x2"); return;
 503       case Iop_ShrN8x8: vex_printf("ShrN8x8"); return;
 504       case Iop_ShrN16x4: vex_printf("ShrN16x4"); return;
 505       case Iop_ShrN32x2: vex_printf("ShrN32x2"); return;
 506       case Iop_SarN8x8: vex_printf("SarN8x8"); return;
 507       case Iop_SarN16x4: vex_printf("SarN16x4"); return;
 508       case Iop_SarN32x2: vex_printf("SarN32x2"); return;
 509       case Iop_QNarrow16Ux4: vex_printf("QNarrow16Ux4"); return;
 510       case Iop_QNarrow16Sx4: vex_printf("QNarrow16Sx4"); return;
 511       case Iop_QNarrow32Sx2: vex_printf("QNarrow32Sx2"); return;
 512       case Iop_InterleaveHI8x8: vex_printf("InterleaveHI8x8"); return;
 513       case Iop_InterleaveHI16x4: vex_printf("InterleaveHI16x4"); return;
 514       case Iop_InterleaveHI32x2: vex_printf("InterleaveHI32x2"); return;
 515       case Iop_InterleaveLO8x8: vex_printf("InterleaveLO8x8"); return;
 516       case Iop_InterleaveLO16x4: vex_printf("InterleaveLO16x4"); return;
 517       case Iop_InterleaveLO32x2: vex_printf("InterleaveLO32x2"); return;
 518       case Iop_CatOddLanes8x8: vex_printf("CatOddLanes8x8"); return;
 519       case Iop_CatOddLanes16x4: vex_printf("CatOddLanes16x4"); return;
 520       case Iop_CatEvenLanes8x8: vex_printf("CatEvenLanes8x8"); return;
 521       case Iop_CatEvenLanes16x4: vex_printf("CatEvenLanes16x4"); return;
 522       case Iop_InterleaveOddLanes8x8: vex_printf("InterleaveOddLanes8x8"); return;
 523       case Iop_InterleaveOddLanes16x4: vex_printf("InterleaveOddLanes16x4"); return;
 524       case Iop_InterleaveEvenLanes8x8: vex_printf("InterleaveEvenLanes8x8"); return;
 525       case Iop_InterleaveEvenLanes16x4: vex_printf("InterleaveEvenLanes16x4"); return;
 526       case Iop_Shl8x8: vex_printf("Shl8x8"); return;
 527       case Iop_Shl16x4: vex_printf("Shl16x4"); return;
 528       case Iop_Shl32x2: vex_printf("Shl32x2"); return;
 529       case Iop_Shr8x8: vex_printf("Shr8x8"); return;
 530       case Iop_Shr16x4: vex_printf("Shr16x4"); return;
 531       case Iop_Shr32x2: vex_printf("Shr32x2"); return;
 532       case Iop_QShl8x8: vex_printf("QShl8x8"); return;
 533       case Iop_QShl16x4: vex_printf("QShl16x4"); return;
 534       case Iop_QShl32x2: vex_printf("QShl32x2"); return;
 535       case Iop_QShl64x1: vex_printf("QShl64x1"); return;
 536       case Iop_QSal8x8: vex_printf("QSal8x8"); return;
 537       case Iop_QSal16x4: vex_printf("QSal16x4"); return;
 538       case Iop_QSal32x2: vex_printf("QSal32x2"); return;
 539       case Iop_QSal64x1: vex_printf("QSal64x1"); return;
 540       case Iop_QShlN8x8: vex_printf("QShlN8x8"); return;
 541       case Iop_QShlN16x4: vex_printf("QShlN16x4"); return;
 542       case Iop_QShlN32x2: vex_printf("QShlN32x2"); return;
 543       case Iop_QShlN64x1: vex_printf("QShlN64x1"); return;
 544       case Iop_QShlN8Sx8: vex_printf("QShlN8Sx8"); return;
 545       case Iop_QShlN16Sx4: vex_printf("QShlN16Sx4"); return;
 546       case Iop_QShlN32Sx2: vex_printf("QShlN32Sx2"); return;
 547       case Iop_QShlN64Sx1: vex_printf("QShlN64Sx1"); return;
 548       case Iop_QSalN8x8: vex_printf("QSalN8x8"); return;
 549       case Iop_QSalN16x4: vex_printf("QSalN16x4"); return;
 550       case Iop_QSalN32x2: vex_printf("QSalN32x2"); return;
 551       case Iop_QSalN64x1: vex_printf("QSalN64x1"); return;
 552       case Iop_Sar8x8: vex_printf("Sar8x8"); return;
 553       case Iop_Sar16x4: vex_printf("Sar16x4"); return;
 554       case Iop_Sar32x2: vex_printf("Sar32x2"); return;
 555       case Iop_Sal8x8: vex_printf("Sal8x8"); return;
 556       case Iop_Sal16x4: vex_printf("Sal16x4"); return;
 557       case Iop_Sal32x2: vex_printf("Sal32x2"); return;
 558       case Iop_Sal64x1: vex_printf("Sal64x1"); return;
 559       case Iop_Perm8x8: vex_printf("Perm8x8"); return;
 560       case Iop_Reverse16_8x8: vex_printf("Reverse16_8x8"); return;
 561       case Iop_Reverse32_8x8: vex_printf("Reverse32_8x8"); return;
 562       case Iop_Reverse32_16x4: vex_printf("Reverse32_16x4"); return;
 563       case Iop_Reverse64_8x8: vex_printf("Reverse64_8x8"); return;
 564       case Iop_Reverse64_16x4: vex_printf("Reverse64_16x4"); return;
 565       case Iop_Reverse64_32x2: vex_printf("Reverse64_32x2"); return;
 566       case Iop_Abs32Fx2: vex_printf("Abs32Fx2"); return;
 567
 568       case Iop_CmpNEZ32x2: vex_printf("CmpNEZ32x2"); return;
 569       case Iop_CmpNEZ16x4: vex_printf("CmpNEZ16x4"); return;
 570       case Iop_CmpNEZ8x8:  vex_printf("CmpNEZ8x8"); return;
 571
 572       case Iop_Add32Fx4:  vex_printf("Add32Fx4"); return;
 573       case Iop_Add32Fx2:  vex_printf("Add32Fx2"); return;
 574       case Iop_Add32F0x4: vex_printf("Add32F0x4"); return;
 575       case Iop_Add64Fx2:  vex_printf("Add64Fx2"); return;
 576       case Iop_Add64F0x2: vex_printf("Add64F0x2"); return;
 577
 578       case Iop_Div32Fx4:  vex_printf("Div32Fx4"); return;
 579       case Iop_Div32F0x4: vex_printf("Div32F0x4"); return;
 580       case Iop_Div64Fx2:  vex_printf("Div64Fx2"); return;
 581       case Iop_Div64F0x2: vex_printf("Div64F0x2"); return;
 582
 583       case Iop_Max32Fx4:  vex_printf("Max32Fx4"); return;
 584       case Iop_Max32Fx2:  vex_printf("Max32Fx2"); return;
 585       case Iop_PwMax32Fx4:  vex_printf("PwMax32Fx4"); return;
 586       case Iop_PwMax32Fx2:  vex_printf("PwMax32Fx2"); return;
 587       case Iop_Max32F0x4: vex_printf("Max32F0x4"); return;
 588       case Iop_Max64Fx2:  vex_printf("Max64Fx2"); return;
 589       case Iop_Max64F0x2: vex_printf("Max64F0x2"); return;
 590
 591       case Iop_Min32Fx4:  vex_printf("Min32Fx4"); return;
 592       case Iop_Min32Fx2:  vex_printf("Min32Fx2"); return;
 593       case Iop_PwMin32Fx4:  vex_printf("PwMin32Fx4"); return;
 594       case Iop_PwMin32Fx2:  vex_printf("PwMin32Fx2"); return;
 595       case Iop_Min32F0x4: vex_printf("Min32F0x4"); return;
 596       case Iop_Min64Fx2:  vex_printf("Min64Fx2"); return;
 597       case Iop_Min64F0x2: vex_printf("Min64F0x2"); return;
 598
 599       case Iop_Mul32Fx4:  vex_printf("Mul32Fx4"); return;
 600       case Iop_Mul32F0x4: vex_printf("Mul32F0x4"); return;
 601       case Iop_Mul64Fx2:  vex_printf("Mul64Fx2"); return;
 602       case Iop_Mul64F0x2: vex_printf("Mul64F0x2"); return;
 603
 604       case Iop_Recip32x2: vex_printf("Recip32x2"); return;
 605       case Iop_Recip32Fx2:  vex_printf("Recip32Fx2"); return;
 606       case Iop_Recip32Fx4:  vex_printf("Recip32Fx4"); return;
 607       case Iop_Recip32x4:  vex_printf("Recip32x4"); return;
 608       case Iop_Recip32F0x4: vex_printf("Recip32F0x4"); return;
 609       case Iop_Recip64Fx2:  vex_printf("Recip64Fx2"); return;
 610       case Iop_Recip64F0x2: vex_printf("Recip64F0x2"); return;
 611       case Iop_Recps32Fx2:  vex_printf("VRecps32Fx2"); return;
 612       case Iop_Recps32Fx4:  vex_printf("VRecps32Fx4"); return;
 613       case Iop_Abs32Fx4:  vex_printf("Abs32Fx4"); return;
 614       case Iop_Rsqrts32Fx4:  vex_printf("VRsqrts32Fx4"); return;
 615       case Iop_Rsqrts32Fx2:  vex_printf("VRsqrts32Fx2"); return;
 616
 617       case Iop_RSqrt32Fx4:  vex_printf("RSqrt32Fx4"); return;
 618       case Iop_RSqrt32F0x4: vex_printf("RSqrt32F0x4"); return;
 619       case Iop_RSqrt64Fx2:  vex_printf("RSqrt64Fx2"); return;
 620       case Iop_RSqrt64F0x2: vex_printf("RSqrt64F0x2"); return;
 621
 622       case Iop_Sqrt32Fx4:  vex_printf("Sqrt32Fx4"); return;
 623       case Iop_Sqrt32F0x4: vex_printf("Sqrt32F0x4"); return;
 624       case Iop_Sqrt64Fx2:  vex_printf("Sqrt64Fx2"); return;
 625       case Iop_Sqrt64F0x2: vex_printf("Sqrt64F0x2"); return;
 626
 627       case Iop_Sub32Fx4:  vex_printf("Sub32Fx4"); return;
 628       case Iop_Sub32Fx2:  vex_printf("Sub32Fx2"); return;
 629       case Iop_Sub32F0x4: vex_printf("Sub32F0x4"); return;
 630       case Iop_Sub64Fx2:  vex_printf("Sub64Fx2"); return;
 631       case Iop_Sub64F0x2: vex_printf("Sub64F0x2"); return;
 632
 633       case Iop_CmpEQ32Fx4: vex_printf("CmpEQ32Fx4"); return;
 634       case Iop_CmpLT32Fx4: vex_printf("CmpLT32Fx4"); return;
 635       case Iop_CmpLE32Fx4: vex_printf("CmpLE32Fx4"); return;
 636       case Iop_CmpGT32Fx4: vex_printf("CmpGT32Fx4"); return;
 637       case Iop_CmpGE32Fx4: vex_printf("CmpGE32Fx4"); return;
 638       case Iop_CmpUN32Fx4: vex_printf("CmpUN32Fx4"); return;
 639       case Iop_CmpEQ64Fx2: vex_printf("CmpEQ64Fx2"); return;
 640       case Iop_CmpLT64Fx2: vex_printf("CmpLT64Fx2"); return;
 641       case Iop_CmpLE64Fx2: vex_printf("CmpLE64Fx2"); return;
 642       case Iop_CmpUN64Fx2: vex_printf("CmpUN64Fx2"); return;
 643       case Iop_CmpGT32Fx2: vex_printf("CmpGT32Fx2"); return;
 644       case Iop_CmpEQ32Fx2: vex_printf("CmpEQ32Fx2"); return;
 645       case Iop_CmpGE32Fx2: vex_printf("CmpGE32Fx2"); return;
 646
 647       case Iop_CmpEQ32F0x4: vex_printf("CmpEQ32F0x4"); return;
 648       case Iop_CmpLT32F0x4: vex_printf("CmpLT32F0x4"); return;
 649       case Iop_CmpLE32F0x4: vex_printf("CmpLE32F0x4"); return;
 650       case Iop_CmpUN32F0x4: vex_printf("CmpUN32F0x4"); return;
 651       case Iop_CmpEQ64F0x2: vex_printf("CmpEQ64F0x2"); return;
 652       case Iop_CmpLT64F0x2: vex_printf("CmpLT64F0x2"); return;
 653       case Iop_CmpLE64F0x2: vex_printf("CmpLE64F0x2"); return;
 654       case Iop_CmpUN64F0x2: vex_printf("CmpUN64F0x2"); return;
 655
 656       case Iop_Neg32Fx4: vex_printf("Neg32Fx4"); return;
 657       case Iop_Neg32Fx2: vex_printf("Neg32Fx2"); return;
 658
 659       case Iop_V128to64:   vex_printf("V128to64");   return;
 660       case Iop_V128HIto64: vex_printf("V128HIto64"); return;
 661       case Iop_64HLtoV128: vex_printf("64HLtoV128"); return;
 662
 663       case Iop_64UtoV128:   vex_printf("64UtoV128"); return;
 664       case Iop_SetV128lo64: vex_printf("SetV128lo64"); return;
 665
 666       case Iop_32UtoV128:   vex_printf("32UtoV128"); return;
 667       case Iop_V128to32:    vex_printf("V128to32"); return;
 668       case Iop_SetV128lo32: vex_printf("SetV128lo32"); return;
 669
 670       case Iop_Dup8x16: vex_printf("Dup8x16"); return;
 671       case Iop_Dup16x8: vex_printf("Dup16x8"); return;
 672       case Iop_Dup32x4: vex_printf("Dup32x4"); return;
 673       case Iop_Dup8x8: vex_printf("Dup8x8"); return;
 674       case Iop_Dup16x4: vex_printf("Dup16x4"); return;
 675       case Iop_Dup32x2: vex_printf("Dup32x2"); return;
 676
 677       case Iop_NotV128:    vex_printf("NotV128"); return;
 678       case Iop_AndV128:    vex_printf("AndV128"); return;
 679       case Iop_OrV128:     vex_printf("OrV128");  return;
 680       case Iop_XorV128:    vex_printf("XorV128"); return;
 681
 682       case Iop_CmpNEZ8x16: vex_printf("CmpNEZ8x16"); return;
 683       case Iop_CmpNEZ16x8: vex_printf("CmpNEZ16x8"); return;
 684       case Iop_CmpNEZ32x4: vex_printf("CmpNEZ32x4"); return;
 685       case Iop_CmpNEZ64x2: vex_printf("CmpNEZ64x2"); return;
 686
 687       case Iop_Abs8x16: vex_printf("Abs8x16"); return;
 688       case Iop_Abs16x8: vex_printf("Abs16x8"); return;
 689       case Iop_Abs32x4: vex_printf("Abs32x4"); return;
 690
 691       case Iop_Add8x16:   vex_printf("Add8x16"); return;
 692       case Iop_Add16x8:   vex_printf("Add16x8"); return;
 693       case Iop_Add32x4:   vex_printf("Add32x4"); return;
 694       case Iop_Add64x2:   vex_printf("Add64x2"); return;
 695       case Iop_QAdd8Ux16: vex_printf("QAdd8Ux16"); return;
 696       case Iop_QAdd16Ux8: vex_printf("QAdd16Ux8"); return;
 697       case Iop_QAdd32Ux4: vex_printf("QAdd32Ux4"); return;
 698       case Iop_QAdd8Sx16: vex_printf("QAdd8Sx16"); return;
 699       case Iop_QAdd16Sx8: vex_printf("QAdd16Sx8"); return;
 700       case Iop_QAdd32Sx4: vex_printf("QAdd32Sx4"); return;
 701       case Iop_QAdd64Ux2: vex_printf("QAdd64Ux2"); return;
 702       case Iop_QAdd64Sx2: vex_printf("QAdd64Sx2"); return;
 703       case Iop_PwAdd8x16: vex_printf("PwAdd8x16"); return;
 704       case Iop_PwAdd16x8: vex_printf("PwAdd16x8"); return;
 705       case Iop_PwAdd32x4: vex_printf("PwAdd32x4"); return;
 706       case Iop_PwAddL8Ux16: vex_printf("PwAddL8Ux16"); return;
 707       case Iop_PwAddL16Ux8: vex_printf("PwAddL16Ux8"); return;
 708       case Iop_PwAddL32Ux4: vex_printf("PwAddL32Ux4"); return;
 709       case Iop_PwAddL8Sx16: vex_printf("PwAddL8Sx16"); return;
 710       case Iop_PwAddL16Sx8: vex_printf("PwAddL16Sx8"); return;
 711       case Iop_PwAddL32Sx4: vex_printf("PwAddL32Sx4"); return;
 712
 713       case Iop_Sub8x16:   vex_printf("Sub8x16"); return;
 714       case Iop_Sub16x8:   vex_printf("Sub16x8"); return;
 715       case Iop_Sub32x4:   vex_printf("Sub32x4"); return;
 716       case Iop_Sub64x2:   vex_printf("Sub64x2"); return;
 717       case Iop_QSub8Ux16: vex_printf("QSub8Ux16"); return;
 718       case Iop_QSub16Ux8: vex_printf("QSub16Ux8"); return;
 719       case Iop_QSub32Ux4: vex_printf("QSub32Ux4"); return;
 720       case Iop_QSub8Sx16: vex_printf("QSub8Sx16"); return;
 721       case Iop_QSub16Sx8: vex_printf("QSub16Sx8"); return;
 722       case Iop_QSub32Sx4: vex_printf("QSub32Sx4"); return;
 723       case Iop_QSub64Ux2: vex_printf("QSub64Ux2"); return;
 724       case Iop_QSub64Sx2: vex_printf("QSub64Sx2"); return;
 725
 726       case Iop_Mul8x16:    vex_printf("Mul8x16"); return;
 727       case Iop_Mul16x8:    vex_printf("Mul16x8"); return;
 728       case Iop_Mul32x4:    vex_printf("Mul32x4"); return;
 729       case Iop_Mull8Ux8:    vex_printf("Mull8Ux8"); return;
 730       case Iop_Mull8Sx8:    vex_printf("Mull8Sx8"); return;
 731       case Iop_Mull16Ux4:    vex_printf("Mull16Ux4"); return;
 732       case Iop_Mull16Sx4:    vex_printf("Mull16Sx4"); return;
 733       case Iop_Mull32Ux2:    vex_printf("Mull32Ux2"); return;
 734       case Iop_Mull32Sx2:    vex_printf("Mull32Sx2"); return;
 735       case Iop_PolynomialMul8x16: vex_printf("PolynomialMul8x16"); return;
 736       case Iop_PolynomialMull8x8: vex_printf("PolynomialMull8x8"); return;
 737       case Iop_MulHi16Ux8: vex_printf("MulHi16Ux8"); return;
 738       case Iop_MulHi32Ux4: vex_printf("MulHi32Ux4"); return;
 739       case Iop_MulHi16Sx8: vex_printf("MulHi16Sx8"); return;
 740       case Iop_MulHi32Sx4: vex_printf("MulHi32Sx4"); return;
 741       case Iop_QDMulHi16Sx8: vex_printf("QDMulHi16Sx8"); return;
 742       case Iop_QDMulHi32Sx4: vex_printf("QDMulHi32Sx4"); return;
 743       case Iop_QRDMulHi16Sx8: vex_printf("QRDMulHi16Sx8"); return;
 744       case Iop_QRDMulHi32Sx4: vex_printf("QRDMulHi32Sx4"); return;
 745
 746       case Iop_MullEven8Ux16: vex_printf("MullEven8Ux16"); return;
 747       case Iop_MullEven16Ux8: vex_printf("MullEven16Ux8"); return;
 748       case Iop_MullEven8Sx16: vex_printf("MullEven8Sx16"); return;
 749       case Iop_MullEven16Sx8: vex_printf("MullEven16Sx8"); return;
 750
 751       case Iop_Avg8Ux16: vex_printf("Avg8Ux16"); return;
 752       case Iop_Avg16Ux8: vex_printf("Avg16Ux8"); return;
 753       case Iop_Avg32Ux4: vex_printf("Avg32Ux4"); return;
 754       case Iop_Avg8Sx16: vex_printf("Avg8Sx16"); return;
 755       case Iop_Avg16Sx8: vex_printf("Avg16Sx8"); return;
 756       case Iop_Avg32Sx4: vex_printf("Avg32Sx4"); return;
 757
 758       case Iop_Max8Sx16: vex_printf("Max8Sx16"); return;
 759       case Iop_Max16Sx8: vex_printf("Max16Sx8"); return;
 760       case Iop_Max32Sx4: vex_printf("Max32Sx4"); return;
 761       case Iop_Max8Ux16: vex_printf("Max8Ux16"); return;
 762       case Iop_Max16Ux8: vex_printf("Max16Ux8"); return;
 763       case Iop_Max32Ux4: vex_printf("Max32Ux4"); return;
 764
 765       case Iop_Min8Sx16: vex_printf("Min8Sx16"); return;
 766       case Iop_Min16Sx8: vex_printf("Min16Sx8"); return;
 767       case Iop_Min32Sx4: vex_printf("Min32Sx4"); return;
 768       case Iop_Min8Ux16: vex_printf("Min8Ux16"); return;
 769       case Iop_Min16Ux8: vex_printf("Min16Ux8"); return;
 770       case Iop_Min32Ux4: vex_printf("Min32Ux4"); return;
 771
 772       case Iop_CmpEQ8x16:  vex_printf("CmpEQ8x16"); return;
 773       case Iop_CmpEQ16x8:  vex_printf("CmpEQ16x8"); return;
 774       case Iop_CmpEQ32x4:  vex_printf("CmpEQ32x4"); return;
 775       case Iop_CmpGT8Sx16: vex_printf("CmpGT8Sx16"); return;
 776       case Iop_CmpGT16Sx8: vex_printf("CmpGT16Sx8"); return;
 777       case Iop_CmpGT32Sx4: vex_printf("CmpGT32Sx4"); return;
 778       case Iop_CmpGT64Sx2: vex_printf("CmpGT64Sx2"); return;
 779       case Iop_CmpGT8Ux16: vex_printf("CmpGT8Ux16"); return;
 780       case Iop_CmpGT16Ux8: vex_printf("CmpGT16Ux8"); return;
 781       case Iop_CmpGT32Ux4: vex_printf("CmpGT32Ux4"); return;
 782
 783       case Iop_Cnt8x16: vex_printf("Cnt8x16"); return;
 784       case Iop_Clz8Sx16: vex_printf("Clz8Sx16"); return;
 785       case Iop_Clz16Sx8: vex_printf("Clz16Sx8"); return;
 786       case Iop_Clz32Sx4: vex_printf("Clz32Sx4"); return;
 787       case Iop_Cls8Sx16: vex_printf("Cls8Sx16"); return;
 788       case Iop_Cls16Sx8: vex_printf("Cls16Sx8"); return;
 789       case Iop_Cls32Sx4: vex_printf("Cls32Sx4"); return;
 790
 791       case Iop_ShlV128: vex_printf("ShlV128"); return;
 792       case Iop_ShrV128: vex_printf("ShrV128"); return;
 793
 794       case Iop_ShlN8x16: vex_printf("ShlN8x16"); return;
 795       case Iop_ShlN16x8: vex_printf("ShlN16x8"); return;
 796       case Iop_ShlN32x4: vex_printf("ShlN32x4"); return;
 797       case Iop_ShlN64x2: vex_printf("ShlN64x2"); return;
 798       case Iop_ShrN8x16: vex_printf("ShrN8x16"); return;
 799       case Iop_ShrN16x8: vex_printf("ShrN16x8"); return;
 800       case Iop_ShrN32x4: vex_printf("ShrN32x4"); return;
 801       case Iop_ShrN64x2: vex_printf("ShrN64x2"); return;
 802       case Iop_SarN8x16: vex_printf("SarN8x16"); return;
 803       case Iop_SarN16x8: vex_printf("SarN16x8"); return;
 804       case Iop_SarN32x4: vex_printf("SarN32x4"); return;
 805       case Iop_SarN64x2: vex_printf("SarN64x2"); return;
 806
 807       case Iop_Shl8x16: vex_printf("Shl8x16"); return;
 808       case Iop_Shl16x8: vex_printf("Shl16x8"); return;
 809       case Iop_Shl32x4: vex_printf("Shl32x4"); return;
 810       case Iop_Shl64x2: vex_printf("Shl64x2"); return;
 811       case Iop_QSal8x16: vex_printf("QSal8x16"); return;
 812       case Iop_QSal16x8: vex_printf("QSal16x8"); return;
 813       case Iop_QSal32x4: vex_printf("QSal32x4"); return;
 814       case Iop_QSal64x2: vex_printf("QSal64x2"); return;
 815       case Iop_QShl8x16: vex_printf("QShl8x16"); return;
 816       case Iop_QShl16x8: vex_printf("QShl16x8"); return;
 817       case Iop_QShl32x4: vex_printf("QShl32x4"); return;
 818       case Iop_QShl64x2: vex_printf("QShl64x2"); return;
 819       case Iop_QSalN8x16: vex_printf("QSalN8x16"); return;
 820       case Iop_QSalN16x8: vex_printf("QSalN16x8"); return;
 821       case Iop_QSalN32x4: vex_printf("QSalN32x4"); return;
 822       case Iop_QSalN64x2: vex_printf("QSalN64x2"); return;
 823       case Iop_QShlN8x16: vex_printf("QShlN8x16"); return;
 824       case Iop_QShlN16x8: vex_printf("QShlN16x8"); return;
 825       case Iop_QShlN32x4: vex_printf("QShlN32x4"); return;
 826       case Iop_QShlN64x2: vex_printf("QShlN64x2"); return;
 827       case Iop_QShlN8Sx16: vex_printf("QShlN8Sx16"); return;
 828       case Iop_QShlN16Sx8: vex_printf("QShlN16Sx8"); return;
 829       case Iop_QShlN32Sx4: vex_printf("QShlN32Sx4"); return;
 830       case Iop_QShlN64Sx2: vex_printf("QShlN64Sx2"); return;
 831       case Iop_Shr8x16: vex_printf("Shr8x16"); return;
 832       case Iop_Shr16x8: vex_printf("Shr16x8"); return;
 833       case Iop_Shr32x4: vex_printf("Shr32x4"); return;
 834       case Iop_Shr64x2: vex_printf("Shr64x2"); return;
 835       case Iop_Sar8x16: vex_printf("Sar8x16"); return;
 836       case Iop_Sar16x8: vex_printf("Sar16x8"); return;
 837       case Iop_Sar32x4: vex_printf("Sar32x4"); return;
 838       case Iop_Sar64x2: vex_printf("Sar64x2"); return;
 839       case Iop_Sal8x16: vex_printf("Sal8x16"); return;
 840       case Iop_Sal16x8: vex_printf("Sal16x8"); return;
 841       case Iop_Sal32x4: vex_printf("Sal32x4"); return;
 842       case Iop_Sal64x2: vex_printf("Sal64x2"); return;
 843       case Iop_Rol8x16: vex_printf("Rol8x16"); return;
 844       case Iop_Rol16x8: vex_printf("Rol16x8"); return;
 845       case Iop_Rol32x4: vex_printf("Rol32x4"); return;
 846
 847       case Iop_Narrow16x8:   vex_printf("Narrow16x8"); return;
 848       case Iop_Narrow32x4:   vex_printf("Narrow32x4"); return;
 849       case Iop_QNarrow16Ux8: vex_printf("QNarrow16Ux8"); return;
 850       case Iop_QNarrow32Ux4: vex_printf("QNarrow32Ux4"); return;
 851       case Iop_QNarrow16Sx8: vex_printf("QNarrow16Sx8"); return;
 852       case Iop_QNarrow32Sx4: vex_printf("QNarrow32Sx4"); return;
 853       case Iop_Shorten16x8: vex_printf("Shorten16x8"); return;
 854       case Iop_Shorten32x4: vex_printf("Shorten32x4"); return;
 855       case Iop_Shorten64x2: vex_printf("Shorten64x2"); return;
 856       case Iop_QShortenU16Ux8: vex_printf("QShortenU16Ux8"); return;
 857       case Iop_QShortenU32Ux4: vex_printf("QShortenU32Ux4"); return;
 858       case Iop_QShortenU64Ux2: vex_printf("QShortenU64Ux2"); return;
 859       case Iop_QShortenS16Sx8: vex_printf("QShortenS16Sx8"); return;
 860       case Iop_QShortenS32Sx4: vex_printf("QShortenS32Sx4"); return;
 861       case Iop_QShortenS64Sx2: vex_printf("QShortenS64Sx2"); return;
 862       case Iop_QShortenU16Sx8: vex_printf("QShortenU16Sx8"); return;
 863       case Iop_QShortenU32Sx4: vex_printf("QShortenU32Sx4"); return;
 864       case Iop_QShortenU64Sx2: vex_printf("QShortenU64Sx2"); return;
 865       case Iop_Longen8Ux8: vex_printf("Longen8Ux8"); return;
 866       case Iop_Longen16Ux4: vex_printf("Longen16Ux4"); return;
 867       case Iop_Longen32Ux2: vex_printf("Longen32Ux2"); return;
 868       case Iop_Longen8Sx8: vex_printf("Longen8Sx8"); return;
 869       case Iop_Longen16Sx4: vex_printf("Longen16Sx4"); return;
 870       case Iop_Longen32Sx2: vex_printf("Longen32Sx2"); return;
 871
 872       case Iop_InterleaveHI8x16: vex_printf("InterleaveHI8x16"); return;
 873       case Iop_InterleaveHI16x8: vex_printf("InterleaveHI16x8"); return;
 874       case Iop_InterleaveHI32x4: vex_printf("InterleaveHI32x4"); return;
 875       case Iop_InterleaveHI64x2: vex_printf("InterleaveHI64x2"); return;
 876       case Iop_InterleaveLO8x16: vex_printf("InterleaveLO8x16"); return;
 877       case Iop_InterleaveLO16x8: vex_printf("InterleaveLO16x8"); return;
 878       case Iop_InterleaveLO32x4: vex_printf("InterleaveLO32x4"); return;
 879       case Iop_InterleaveLO64x2: vex_printf("InterleaveLO64x2"); return;
 880
 881       case Iop_CatOddLanes8x16: vex_printf("CatOddLanes8x16"); return;
 882       case Iop_CatOddLanes16x8: vex_printf("CatOddLanes16x8"); return;
 883       case Iop_CatOddLanes32x4: vex_printf("CatOddLanes32x4"); return;
 884       case Iop_CatEvenLanes8x16: vex_printf("CatEvenLanes8x16"); return;
 885       case Iop_CatEvenLanes16x8: vex_printf("CatEvenLanes16x8"); return;
 886       case Iop_CatEvenLanes32x4: vex_printf("CatEvenLanes32x4"); return;
 887
 888       case Iop_InterleaveOddLanes8x16: vex_printf("InterleaveOddLanes8x16"); return;
 889       case Iop_InterleaveOddLanes16x8: vex_printf("InterleaveOddLanes16x8"); return;
 890       case Iop_InterleaveOddLanes32x4: vex_printf("InterleaveOddLanes32x4"); return;
 891       case Iop_InterleaveEvenLanes8x16: vex_printf("InterleaveEvenLanes8x16"); return;
 892       case Iop_InterleaveEvenLanes16x8: vex_printf("InterleaveEvenLanes16x8"); return;
 893       case Iop_InterleaveEvenLanes32x4: vex_printf("InterleaveEvenLanes32x4"); return;
 894
 895       case Iop_GetElem8x16: vex_printf("GetElem8x16"); return;
 896       case Iop_GetElem16x8: vex_printf("GetElem16x8"); return;
 897       case Iop_GetElem32x4: vex_printf("GetElem32x4"); return;
 898       case Iop_GetElem64x2: vex_printf("GetElem64x2"); return;
 899
 900       case Iop_GetElem8x8: vex_printf("GetElem8x8"); return;
 901       case Iop_GetElem16x4: vex_printf("GetElem16x4"); return;
 902       case Iop_GetElem32x2: vex_printf("GetElem32x2"); return;
 903       case Iop_SetElem8x8: vex_printf("SetElem8x8"); return;
 904       case Iop_SetElem16x4: vex_printf("SetElem16x4"); return;
 905       case Iop_SetElem32x2: vex_printf("SetElem32x2"); return;
 906
 907       case Iop_Extract64: vex_printf("Extract64"); return;
 908       case Iop_ExtractV128: vex_printf("ExtractV128"); return;
 909
 910       case Iop_Perm8x16: vex_printf("Perm8x16"); return;
 911       case Iop_Reverse16_8x16: vex_printf("Reverse16_8x16"); return;
 912       case Iop_Reverse32_8x16: vex_printf("Reverse32_8x16"); return;
 913       case Iop_Reverse32_16x8: vex_printf("Reverse32_16x8"); return;
 914       case Iop_Reverse64_8x16: vex_printf("Reverse64_8x16"); return;
 915       case Iop_Reverse64_16x8: vex_printf("Reverse64_16x8"); return;
 916       case Iop_Reverse64_32x4: vex_printf("Reverse64_32x4"); return;
 917
 918       case Iop_F32ToFixed32Ux4_RZ: vex_printf("F32ToFixed32Ux4_RZ"); return;
 919       case Iop_F32ToFixed32Sx4_RZ: vex_printf("F32ToFixed32Sx4_RZ"); return;
 920       case Iop_Fixed32UToF32x4_RN: vex_printf("Fixed32UToF32x4_RN"); return;
 921       case Iop_Fixed32SToF32x4_RN: vex_printf("Fixed32SToF32x4_RN"); return;
 922       case Iop_F32ToFixed32Ux2_RZ: vex_printf("F32ToFixed32Ux2_RZ"); return;
 923       case Iop_F32ToFixed32Sx2_RZ: vex_printf("F32ToFixed32Sx2_RZ"); return;
 924       case Iop_Fixed32UToF32x2_RN: vex_printf("Fixed32UToF32x2_RN"); return;
 925       case Iop_Fixed32SToF32x2_RN: vex_printf("Fixed32SToF32x2_RN"); return;
 926
 927       default: vpanic("ppIROp(1)");
 928    }
 929
 930    vassert(str);
 931    switch (op - base) {
 932       case 0: vex_printf("%s",str); vex_printf("8"); break;
 933       case 1: vex_printf("%s",str); vex_printf("16"); break;
 934       case 2: vex_printf("%s",str); vex_printf("32"); break;
 935       case 3: vex_printf("%s",str); vex_printf("64"); break;
 936       default: vpanic("ppIROp(2)");
 937    }
 938 }
 939
 940 void ppIRExpr ( IRExpr* e )
 941 {
 942   Int i;
 943   switch (e->tag) {
 944     case Iex_Binder:
 945       vex_printf("BIND-%d", e->Iex.Binder.binder);
 946       break;
 947     case Iex_Get:
 948       vex_printf( "GET:" );
 949       ppIRType(e->Iex.Get.ty);
 950       vex_printf("(%d)", e->Iex.Get.offset);
 951       break;
 952     case Iex_GetI:
 953       vex_printf( "GETI" );
 954       ppIRRegArray(e->Iex.GetI.descr);
 955       vex_printf("[");
 956       ppIRExpr(e->Iex.GetI.ix);
 957       vex_printf(",%d]", e->Iex.GetI.bias);
 958       break;
 959     case Iex_RdTmp:
 960       ppIRTemp(e->Iex.RdTmp.tmp);
 961       break;
 962     case Iex_Qop:
 963       ppIROp(e->Iex.Qop.op);
 964       vex_printf( "(" );
 965       ppIRExpr(e->Iex.Qop.arg1);
 966       vex_printf( "," );
 967       ppIRExpr(e->Iex.Qop.arg2);
 968       vex_printf( "," );
 969       ppIRExpr(e->Iex.Qop.arg3);
 970       vex_printf( "," );
 971       ppIRExpr(e->Iex.Qop.arg4);
 972       vex_printf( ")" );
 973       break;
 974     case Iex_Triop:
 975       ppIROp(e->Iex.Triop.op);
 976       vex_printf( "(" );
 977       ppIRExpr(e->Iex.Triop.arg1);
 978       vex_printf( "," );
 979       ppIRExpr(e->Iex.Triop.arg2);
 980       vex_printf( "," );
 981       ppIRExpr(e->Iex.Triop.arg3);
 982       vex_printf( ")" );
 983       break;
 984     case Iex_Binop:
 985       ppIROp(e->Iex.Binop.op);
 986       vex_printf( "(" );
 987       ppIRExpr(e->Iex.Binop.arg1);
 988       vex_printf( "," );
 989       ppIRExpr(e->Iex.Binop.arg2);
 990       vex_printf( ")" );
 991       break;
 992     case Iex_Unop:
 993       ppIROp(e->Iex.Unop.op);
 994       vex_printf( "(" );
 995       ppIRExpr(e->Iex.Unop.arg);
 996       vex_printf( ")" );
 997       break;
 998     case Iex_Load:
 999       vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" );
1000       ppIRType(e->Iex.Load.ty);
1001       vex_printf( "(" );
1002       ppIRExpr(e->Iex.Load.addr);
1003       vex_printf( ")" );
1004       break;
1005     case Iex_Const:
1006       ppIRConst(e->Iex.Const.con);
1007       break;
1008     case Iex_CCall:
1009       ppIRCallee(e->Iex.CCall.cee);
1010       vex_printf("(");
1011       for (i = 0; e->Iex.CCall.args[i] != NULL; i++) {
1012         ppIRExpr(e->Iex.CCall.args[i]);
1013         if (e->Iex.CCall.args[i+1] != NULL)
1014           vex_printf(",");
1015       }
1016       vex_printf("):");
1017       ppIRType(e->Iex.CCall.retty);
1018       break;
1019     case Iex_Mux0X:
1020       vex_printf("Mux0X(");
1021       ppIRExpr(e->Iex.Mux0X.cond);
1022       vex_printf(",");
1023       ppIRExpr(e->Iex.Mux0X.expr0);
1024       vex_printf(",");
1025       ppIRExpr(e->Iex.Mux0X.exprX);
1026       vex_printf(")");
1027       break;
1028     default:
1029       vpanic("ppIRExpr");
1030   }
1031 }
1032
1033 void ppIREffect ( IREffect fx )
1034 {
1035    switch (fx) {
1036       case Ifx_None:   vex_printf("noFX"); return;
1037       case Ifx_Read:   vex_printf("RdFX"); return;
1038       case Ifx_Write:  vex_printf("WrFX"); return;
1039       case Ifx_Modify: vex_printf("MoFX"); return;
1040       default: vpanic("ppIREffect");
1041    }
1042 }
1043
1044 void ppIRDirty ( IRDirty* d )
1045 {
1046    Int i;
1047    if (d->tmp != IRTemp_INVALID) {
1048       ppIRTemp(d->tmp);
1049       vex_printf(" = ");
1050    }
1051    vex_printf("DIRTY ");
1052    ppIRExpr(d->guard);
1053    if (d->needsBBP)
1054       vex_printf(" NeedsBBP");
1055    if (d->mFx != Ifx_None) {
1056       vex_printf(" ");
1057       ppIREffect(d->mFx);
1058       vex_printf("-mem(");
1059       ppIRExpr(d->mAddr);
1060       vex_printf(",%d)", d->mSize);
1061    }
1062    for (i = 0; i < d->nFxState; i++) {
1063       vex_printf(" ");
1064       ppIREffect(d->fxState[i].fx);
1065       vex_printf("-gst(%d,%d)", d->fxState[i].offset, d->fxState[i].size);
1066    }
1067    vex_printf(" ::: ");
1068    ppIRCallee(d->cee);
1069    vex_printf("(");
1070    for (i = 0; d->args[i] != NULL; i++) {
1071       ppIRExpr(d->args[i]);
1072       if (d->args[i+1] != NULL) {
1073          vex_printf(",");
1074       }
1075    }
1076    vex_printf(")");
1077 }
1078
1079 void ppIRCAS ( IRCAS* cas )
1080 {
1081    /* Print even structurally invalid constructions, as an aid to
1082       debugging. */
1083    if (cas->oldHi != IRTemp_INVALID) {
1084       ppIRTemp(cas->oldHi);
1085       vex_printf(",");
1086    }
1087    ppIRTemp(cas->oldLo);
1088    vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" );
1089    ppIRExpr(cas->addr);
1090    vex_printf("::");
1091    if (cas->expdHi) {
1092       ppIRExpr(cas->expdHi);
1093       vex_printf(",");
1094    }
1095    ppIRExpr(cas->expdLo);
1096    vex_printf("->");
1097    if (cas->dataHi) {
1098       ppIRExpr(cas->dataHi);
1099       vex_printf(",");
1100    }
1101    ppIRExpr(cas->dataLo);
1102    vex_printf(")");
1103 }
1104
1105 void ppIRJumpKind ( IRJumpKind kind )
1106 {
1107    switch (kind) {
1108       case Ijk_Boring:       vex_printf("Boring"); break;
1109       case Ijk_Call:         vex_printf("Call"); break;
1110       case Ijk_Ret:          vex_printf("Return"); break;
1111       case Ijk_ClientReq:    vex_printf("ClientReq"); break;
1112       case Ijk_Yield:        vex_printf("Yield"); break;
1113       case Ijk_EmWarn:       vex_printf("EmWarn"); break;
1114       case Ijk_EmFail:       vex_printf("EmFail"); break;
1115       case Ijk_NoDecode:     vex_printf("NoDecode"); break;
1116       case Ijk_MapFail:      vex_printf("MapFail"); break;
1117       case Ijk_TInval:       vex_printf("Invalidate"); break;
1118       case Ijk_NoRedir:      vex_printf("NoRedir"); break;
1119       case Ijk_SigTRAP:      vex_printf("SigTRAP"); break;
1120       case Ijk_SigSEGV:      vex_printf("SigSEGV"); break;
1121       case Ijk_SigBUS:       vex_printf("SigBUS"); break;
1122       case Ijk_Sys_syscall:  vex_printf("Sys_syscall"); break;
1123       case Ijk_Sys_int32:    vex_printf("Sys_int32"); break;
1124       case Ijk_Sys_int48:    vex_printf("Sys_int48"); break;
1125       case Ijk_Sys_int50:    vex_printf("Sys_int50"); break;
1126       case Ijk_Sys_int128:   vex_printf("Sys_int128"); break;
1127       case Ijk_Sys_int129:   vex_printf("Sys_int129"); break;
1128       case Ijk_Sys_int130:   vex_printf("Sys_int130"); break;
1129       case Ijk_Sys_sysenter: vex_printf("Sys_sysenter"); break;
1130       case Ijk_l4_utcb_eax:  vex_printf("l4_utcb_eax"); break;
1131       case Ijk_l4_utcb_ebx:  vex_printf("l4_utcb_ebx"); break;
1132       case Ijk_l4_utcb_ecx:  vex_printf("l4_utcb_ecx"); break;
1133       case Ijk_l4_utcb_edx:  vex_printf("l4_utcb_edx"); break;
1134       case Ijk_l4_utcb_edi:  vex_printf("l4_utcb_edi"); break;
1135       case Ijk_l4_utcb_esi:  vex_printf("l4_utcb_esi"); break;
1136           case Ijk_l4_ud2:       vex_printf("l4_ud2"); break;
1137           case Ijk_l4_artificial: vex_printf("l4_artificial_trap"); break;
1138       default:               vpanic("ppIRJumpKind");
1139    }
1140 }
1141
1142 void ppIRMBusEvent ( IRMBusEvent event )
1143 {
1144    switch (event) {
1145       case Imbe_Fence: vex_printf("Fence"); break;
1146       default:         vpanic("ppIRMBusEvent");
1147    }
1148 }
1149
1150 void ppIRStmt ( IRStmt* s )
1151 {
1152    if (!s) {
1153       vex_printf("!!! IRStmt* which is NULL !!!");
1154       return;
1155    }
1156    switch (s->tag) {
1157       case Ist_NoOp:
1158          vex_printf("IR-NoOp");
1159          break;
1160       case Ist_IMark:
1161          vex_printf( "------ IMark(0x%llx, %d) ------",
1162                      s->Ist.IMark.addr, s->Ist.IMark.len);
1163          break;
1164       case Ist_AbiHint:
1165          vex_printf("====== AbiHint(");
1166          ppIRExpr(s->Ist.AbiHint.base);
1167          vex_printf(", %d, ", s->Ist.AbiHint.len);
1168          ppIRExpr(s->Ist.AbiHint.nia);
1169          vex_printf(") ======");
1170          break;
1171       case Ist_Put:
1172          vex_printf( "PUT(%d) = ", s->Ist.Put.offset);
1173          ppIRExpr(s->Ist.Put.data);
1174          break;
1175       case Ist_PutI:
1176          vex_printf( "PUTI" );
1177          ppIRRegArray(s->Ist.PutI.descr);
1178          vex_printf("[");
1179          ppIRExpr(s->Ist.PutI.ix);
1180          vex_printf(",%d] = ", s->Ist.PutI.bias);
1181          ppIRExpr(s->Ist.PutI.data);
1182          break;
1183       case Ist_WrTmp:
1184          ppIRTemp(s->Ist.WrTmp.tmp);
1185          vex_printf( " = " );
1186          ppIRExpr(s->Ist.WrTmp.data);
1187          break;
1188       case Ist_Store:
1189          vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" );
1190          ppIRExpr(s->Ist.Store.addr);
1191          vex_printf( ") = ");
1192          ppIRExpr(s->Ist.Store.data);
1193          break;
1194       case Ist_CAS:
1195          ppIRCAS(s->Ist.CAS.details);
1196          break;
1197       case Ist_LLSC:
1198          if (s->Ist.LLSC.storedata == NULL) {
1199             ppIRTemp(s->Ist.LLSC.result);
1200             vex_printf(" = LD%s-Linked(",
1201                        s->Ist.LLSC.end==Iend_LE ? "le" : "be");
1202             ppIRExpr(s->Ist.LLSC.addr);
1203             vex_printf(")");
1204          } else {
1205             ppIRTemp(s->Ist.LLSC.result);
1206             vex_printf(" = ( ST%s-Cond(",
1207                        s->Ist.LLSC.end==Iend_LE ? "le" : "be");
1208             ppIRExpr(s->Ist.LLSC.addr);
1209             vex_printf(") = ");
1210             ppIRExpr(s->Ist.LLSC.storedata);
1211             vex_printf(" )");
1212          }
1213          break;
1214       case Ist_Dirty:
1215          ppIRDirty(s->Ist.Dirty.details);
1216          break;
1217       case Ist_MBE:
1218          vex_printf("IR-");
1219          ppIRMBusEvent(s->Ist.MBE.event);
1220          break;
1221       case Ist_Exit:
1222          vex_printf( "if (" );
1223          ppIRExpr(s->Ist.Exit.guard);
1224          vex_printf( ") goto {");
1225          ppIRJumpKind(s->Ist.Exit.jk);
1226          vex_printf("} ");
1227          ppIRConst(s->Ist.Exit.dst);
1228          break;
1229       default:
1230          vpanic("ppIRStmt");
1231    }
1232 }
1233
1234 void ppIRTypeEnv ( IRTypeEnv* env ) {
1235    UInt i;
1236    for (i = 0; i < env->types_used; i++) {
1237       if (i % 8 == 0)
1238          vex_printf( "   ");
1239       ppIRTemp(i);
1240       vex_printf( ":");
1241       ppIRType(env->types[i]);
1242       if (i % 8 == 7)
1243          vex_printf( "\n");
1244       else
1245          vex_printf( "   ");
1246    }
1247    if (env->types_used > 0 && env->types_used % 8 != 7)
1248       vex_printf( "\n");
1249 }
1250
1251 void ppIRSB ( IRSB* bb )
1252 {
1253    Int i;
1254    vex_printf("IRSB {\n");
1255    ppIRTypeEnv(bb->tyenv);
1256    vex_printf("\n");
1257    for (i = 0; i < bb->stmts_used; i++) {
1258       vex_printf( "   ");
1259       ppIRStmt(bb->stmts[i]);
1260       vex_printf( "\n");
1261    }
1262    vex_printf( "   goto {");
1263    ppIRJumpKind(bb->jumpkind);
1264    vex_printf( "} ");
1265    ppIRExpr( bb->next );
1266    vex_printf( "\n}\n");
1267 }
1268
1269
1270 /*---------------------------------------------------------------*/
1271 /*--- Constructors                                            ---*/
1272 /*---------------------------------------------------------------*/
1273
1274
1275 /* Constructors -- IRConst */
1276
1277 IRConst* IRConst_U1 ( Bool bit )
1278 {
1279    IRConst* c = LibVEX_Alloc(sizeof(IRConst));
1280    c->tag     = Ico_U1;
1281    c->Ico.U1  = bit;
1282    /* call me paranoid; I don't care :-) */
1283    vassert(bit == False || bit == True);
1284    return c;
1285 }
1286 IRConst* IRConst_U8 ( UChar u8 )
1287 {
1288    IRConst* c = LibVEX_Alloc(sizeof(IRConst));
1289    c->tag     = Ico_U8;
1290    c->Ico.U8  = u8;
1291    return c;
1292 }
1293 IRConst* IRConst_U16 ( UShort u16 )
1294 {
1295    IRConst* c = LibVEX_Alloc(sizeof(IRConst));
1296    c->tag     = Ico_U16;
1297    c->Ico.U16 = u16;
1298    return c;
1299 }
1300 IRConst* IRConst_U32 ( UInt u32 )
1301 {
1302    IRConst* c = LibVEX_Alloc(sizeof(IRConst));
1303    c->tag     = Ico_U32;
1304    c->Ico.U32 = u32;
1305    return c;
1306 }
1307 IRConst* IRConst_U64 ( ULong u64 )
1308 {
1309    IRConst* c = LibVEX_Alloc(sizeof(IRConst));
1310    c->tag     = Ico_U64;
1311    c->Ico.U64 = u64;
1312    return c;
1313 }
1314 IRConst* IRConst_F32 ( Float f32 )
1315 {
1316    IRConst* c = LibVEX_Alloc(sizeof(IRConst));
1317    c->tag     = Ico_F32;
1318    c->Ico.F32 = f32;
1319    return c;
1320 }
1321 IRConst* IRConst_F32i ( UInt f32i )
1322 {
1323    IRConst* c  = LibVEX_Alloc(sizeof(IRConst));
1324    c->tag      = Ico_F32i;
1325    c->Ico.F32i = f32i;
1326    return c;
1327 }
1328 IRConst* IRConst_F64 ( Double f64 )
1329 {
1330    IRConst* c = LibVEX_Alloc(sizeof(IRConst));
1331    c->tag     = Ico_F64;
1332    c->Ico.F64 = f64;
1333    return c;
1334 }
1335 IRConst* IRConst_F64i ( ULong f64i )
1336 {
1337    IRConst* c  = LibVEX_Alloc(sizeof(IRConst));
1338    c->tag      = Ico_F64i;
1339    c->Ico.F64i = f64i;
1340    return c;
1341 }
1342 IRConst* IRConst_V128 ( UShort con )
1343 {
1344    IRConst* c  = LibVEX_Alloc(sizeof(IRConst));
1345    c->tag      = Ico_V128;
1346    c->Ico.V128 = con;
1347    return c;
1348 }
1349
1350 /* Constructors -- IRCallee */
1351
1352 IRCallee* mkIRCallee ( Int regparms, HChar* name, void* addr )
1353 {
1354    IRCallee* ce = LibVEX_Alloc(sizeof(IRCallee));
1355    ce->regparms = regparms;
1356    ce->name     = name;
1357    ce->addr     = addr;
1358    ce->mcx_mask = 0;
1359    vassert(regparms >= 0 && regparms <= 3);
1360    vassert(name != NULL);
1361    vassert(addr != 0);
1362    return ce;
1363 }
1364
1365
1366 /* Constructors -- IRRegArray */
1367
1368 IRRegArray* mkIRRegArray ( Int base, IRType elemTy, Int nElems )
1369 {
1370    IRRegArray* arr = LibVEX_Alloc(sizeof(IRRegArray));
1371    arr->base       = base;
1372    arr->elemTy     = elemTy;
1373    arr->nElems     = nElems;
1374    vassert(!(arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */));
1375    vassert(!(arr->elemTy == Ity_I1));
1376    vassert(!(arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */));
1377    return arr;
1378 }
1379
1380
1381 /* Constructors -- IRExpr */
1382
1383 IRExpr* IRExpr_Binder ( Int binder ) {
1384    IRExpr* e            = LibVEX_Alloc(sizeof(IRExpr));
1385    e->tag               = Iex_Binder;
1386    e->Iex.Binder.binder = binder;
1387    return e;
1388 }
1389 IRExpr* IRExpr_Get ( Int off, IRType ty ) {
1390    IRExpr* e         = LibVEX_Alloc(sizeof(IRExpr));
1391    e->tag            = Iex_Get;
1392    e->Iex.Get.offset = off;
1393    e->Iex.Get.ty     = ty;
1394    return e;
1395 }
1396 IRExpr* IRExpr_GetI ( IRRegArray* descr, IRExpr* ix, Int bias ) {
1397    IRExpr* e         = LibVEX_Alloc(sizeof(IRExpr));
1398    e->tag            = Iex_GetI;
1399    e->Iex.GetI.descr = descr;
1400    e->Iex.GetI.ix    = ix;
1401    e->Iex.GetI.bias  = bias;
1402    return e;
1403 }
1404 IRExpr* IRExpr_RdTmp ( IRTemp tmp ) {
1405    IRExpr* e        = LibVEX_Alloc(sizeof(IRExpr));
1406    e->tag           = Iex_RdTmp;
1407    e->Iex.RdTmp.tmp = tmp;
1408    return e;
1409 }
1410 IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2,
1411                               IRExpr* arg3, IRExpr* arg4 ) {
1412    IRExpr* e       = LibVEX_Alloc(sizeof(IRExpr));
1413    e->tag          = Iex_Qop;
1414    e->Iex.Qop.op   = op;
1415    e->Iex.Qop.arg1 = arg1;
1416    e->Iex.Qop.arg2 = arg2;
1417    e->Iex.Qop.arg3 = arg3;
1418    e->Iex.Qop.arg4 = arg4;
1419    return e;
1420 }
1421 IRExpr* IRExpr_Triop  ( IROp op, IRExpr* arg1,
1422                                  IRExpr* arg2, IRExpr* arg3 ) {
1423    IRExpr* e         = LibVEX_Alloc(sizeof(IRExpr));
1424    e->tag            = Iex_Triop;
1425    e->Iex.Triop.op   = op;
1426    e->Iex.Triop.arg1 = arg1;
1427    e->Iex.Triop.arg2 = arg2;
1428    e->Iex.Triop.arg3 = arg3;
1429    return e;
1430 }
1431 IRExpr* IRExpr_Binop ( IROp op, IRExpr* arg1, IRExpr* arg2 ) {
1432    IRExpr* e         = LibVEX_Alloc(sizeof(IRExpr));
1433    e->tag            = Iex_Binop;
1434    e->Iex.Binop.op   = op;
1435    e->Iex.Binop.arg1 = arg1;
1436    e->Iex.Binop.arg2 = arg2;
1437    return e;
1438 }
1439 IRExpr* IRExpr_Unop ( IROp op, IRExpr* arg ) {
1440    IRExpr* e       = LibVEX_Alloc(sizeof(IRExpr));
1441    e->tag          = Iex_Unop;
1442    e->Iex.Unop.op  = op;
1443    e->Iex.Unop.arg = arg;
1444    return e;
1445 }
1446 IRExpr* IRExpr_Load ( IREndness end, IRType ty, IRExpr* addr ) {
1447    IRExpr* e        = LibVEX_Alloc(sizeof(IRExpr));
1448    e->tag           = Iex_Load;
1449    e->Iex.Load.end  = end;
1450    e->Iex.Load.ty   = ty;
1451    e->Iex.Load.addr = addr;
1452    vassert(end == Iend_LE || end == Iend_BE);
1453    return e;
1454 }
1455 IRExpr* IRExpr_Const ( IRConst* con ) {
1456    IRExpr* e        = LibVEX_Alloc(sizeof(IRExpr));
1457    e->tag           = Iex_Const;
1458    e->Iex.Const.con = con;
1459    return e;
1460 }
1461 IRExpr* IRExpr_CCall ( IRCallee* cee, IRType retty, IRExpr** args ) {
1462    IRExpr* e          = LibVEX_Alloc(sizeof(IRExpr));
1463    e->tag             = Iex_CCall;
1464    e->Iex.CCall.cee   = cee;
1465    e->Iex.CCall.retty = retty;
1466    e->Iex.CCall.args  = args;
1467    return e;
1468 }
1469 IRExpr* IRExpr_Mux0X ( IRExpr* cond, IRExpr* expr0, IRExpr* exprX ) {
1470    IRExpr* e          = LibVEX_Alloc(sizeof(IRExpr));
1471    e->tag             = Iex_Mux0X;
1472    e->Iex.Mux0X.cond  = cond;
1473    e->Iex.Mux0X.expr0 = expr0;
1474    e->Iex.Mux0X.exprX = exprX;
1475    return e;
1476 }
1477
1478
1479 /* Constructors for NULL-terminated IRExpr expression vectors,
1480    suitable for use as arg lists in clean/dirty helper calls. */
1481
1482 IRExpr** mkIRExprVec_0 ( void ) {
1483    IRExpr** vec = LibVEX_Alloc(1 * sizeof(IRExpr*));
1484    vec[0] = NULL;
1485    return vec;
1486 }
1487 IRExpr** mkIRExprVec_1 ( IRExpr* arg1 ) {
1488    IRExpr** vec = LibVEX_Alloc(2 * sizeof(IRExpr*));
1489    vec[0] = arg1;
1490    vec[1] = NULL;
1491    return vec;
1492 }
1493 IRExpr** mkIRExprVec_2 ( IRExpr* arg1, IRExpr* arg2 ) {
1494    IRExpr** vec = LibVEX_Alloc(3 * sizeof(IRExpr*));
1495    vec[0] = arg1;
1496    vec[1] = arg2;
1497    vec[2] = NULL;
1498    return vec;
1499 }
1500 IRExpr** mkIRExprVec_3 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3 ) {
1501    IRExpr** vec = LibVEX_Alloc(4 * sizeof(IRExpr*));
1502    vec[0] = arg1;
1503    vec[1] = arg2;
1504    vec[2] = arg3;
1505    vec[3] = NULL;
1506    return vec;
1507 }
1508 IRExpr** mkIRExprVec_4 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
1509                          IRExpr* arg4 ) {
1510    IRExpr** vec = LibVEX_Alloc(5 * sizeof(IRExpr*));
1511    vec[0] = arg1;
1512    vec[1] = arg2;
1513    vec[2] = arg3;
1514    vec[3] = arg4;
1515    vec[4] = NULL;
1516    return vec;
1517 }
1518 IRExpr** mkIRExprVec_5 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
1519                          IRExpr* arg4, IRExpr* arg5 ) {
1520    IRExpr** vec = LibVEX_Alloc(6 * sizeof(IRExpr*));
1521    vec[0] = arg1;
1522    vec[1] = arg2;
1523    vec[2] = arg3;
1524    vec[3] = arg4;
1525    vec[4] = arg5;
1526    vec[5] = NULL;
1527    return vec;
1528 }
1529 IRExpr** mkIRExprVec_6 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
1530                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6 ) {
1531    IRExpr** vec = LibVEX_Alloc(7 * sizeof(IRExpr*));
1532    vec[0] = arg1;
1533    vec[1] = arg2;
1534    vec[2] = arg3;
1535    vec[3] = arg4;
1536    vec[4] = arg5;
1537    vec[5] = arg6;
1538    vec[6] = NULL;
1539    return vec;
1540 }
1541 IRExpr** mkIRExprVec_7 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
1542                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
1543                          IRExpr* arg7 ) {
1544    IRExpr** vec = LibVEX_Alloc(8 * sizeof(IRExpr*));
1545    vec[0] = arg1;
1546    vec[1] = arg2;
1547    vec[2] = arg3;
1548    vec[3] = arg4;
1549    vec[4] = arg5;
1550    vec[5] = arg6;
1551    vec[6] = arg7;
1552    vec[7] = NULL;
1553    return vec;
1554 }
1555 IRExpr** mkIRExprVec_8 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
1556                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
1557                          IRExpr* arg7, IRExpr* arg8 ) {
1558    IRExpr** vec = LibVEX_Alloc(9 * sizeof(IRExpr*));
1559    vec[0] = arg1;
1560    vec[1] = arg2;
1561    vec[2] = arg3;
1562    vec[3] = arg4;
1563    vec[4] = arg5;
1564    vec[5] = arg6;
1565    vec[6] = arg7;
1566    vec[7] = arg8;
1567    vec[8] = NULL;
1568    return vec;
1569 }
1570
1571
1572 /* Constructors -- IRDirty */
1573
1574 IRDirty* emptyIRDirty ( void ) {
1575    IRDirty* d = LibVEX_Alloc(sizeof(IRDirty));
1576    d->cee      = NULL;
1577    d->guard    = NULL;
1578    d->args     = NULL;
1579    d->tmp      = IRTemp_INVALID;
1580    d->mFx      = Ifx_None;
1581    d->mAddr    = NULL;
1582    d->mSize    = 0;
1583    d->needsBBP = False;
1584    d->nFxState = 0;
1585    return d;
1586 }
1587
1588
1589 /* Constructors -- IRCAS */
1590
1591 IRCAS* mkIRCAS ( IRTemp oldHi, IRTemp oldLo,
1592                  IREndness end, IRExpr* addr,
1593                  IRExpr* expdHi, IRExpr* expdLo,
1594                  IRExpr* dataHi, IRExpr* dataLo ) {
1595    IRCAS* cas = LibVEX_Alloc(sizeof(IRCAS));
1596    cas->oldHi  = oldHi;
1597    cas->oldLo  = oldLo;
1598    cas->end    = end;
1599    cas->addr   = addr;
1600    cas->expdHi = expdHi;
1601    cas->expdLo = expdLo;
1602    cas->dataHi = dataHi;
1603    cas->dataLo = dataLo;
1604    return cas;
1605 }
1606
1607
1608 /* Constructors -- IRStmt */
1609
1610 IRStmt* IRStmt_NoOp ( void )
1611 {
1612    /* Just use a single static closure. */
1613    static IRStmt static_closure;
1614    static_closure.tag = Ist_NoOp;
1615    return &static_closure;
1616 }
1617 IRStmt* IRStmt_IMark ( Addr64 addr, Int len ) {
1618    IRStmt* s         = LibVEX_Alloc(sizeof(IRStmt));
1619    s->tag            = Ist_IMark;
1620    s->Ist.IMark.addr = addr;
1621    s->Ist.IMark.len  = len;
1622    return s;
1623 }
1624 IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia ) {
1625    IRStmt* s           = LibVEX_Alloc(sizeof(IRStmt));
1626    s->tag              = Ist_AbiHint;
1627    s->Ist.AbiHint.base = base;
1628    s->Ist.AbiHint.len  = len;
1629    s->Ist.AbiHint.nia  = nia;
1630    return s;
1631 }
1632 IRStmt* IRStmt_Put ( Int off, IRExpr* data ) {
1633    IRStmt* s         = LibVEX_Alloc(sizeof(IRStmt));
1634    s->tag            = Ist_Put;
1635    s->Ist.Put.offset = off;
1636    s->Ist.Put.data   = data;
1637    return s;
1638 }
1639 IRStmt* IRStmt_PutI ( IRRegArray* descr, IRExpr* ix,
1640                       Int bias, IRExpr* data ) {
1641    IRStmt* s         = LibVEX_Alloc(sizeof(IRStmt));
1642    s->tag            = Ist_PutI;
1643    s->Ist.PutI.descr = descr;
1644    s->Ist.PutI.ix    = ix;
1645    s->Ist.PutI.bias  = bias;
1646    s->Ist.PutI.data  = data;
1647    return s;
1648 }
1649 IRStmt* IRStmt_WrTmp ( IRTemp tmp, IRExpr* data ) {
1650    IRStmt* s         = LibVEX_Alloc(sizeof(IRStmt));
1651    s->tag            = Ist_WrTmp;
1652    s->Ist.WrTmp.tmp  = tmp;
1653    s->Ist.WrTmp.data = data;
1654    return s;
1655 }
1656 IRStmt* IRStmt_Store ( IREndness end, IRExpr* addr, IRExpr* data ) {
1657    IRStmt* s         = LibVEX_Alloc(sizeof(IRStmt));
1658    s->tag            = Ist_Store;
1659    s->Ist.Store.end  = end;
1660    s->Ist.Store.addr = addr;
1661    s->Ist.Store.data = data;
1662    vassert(end == Iend_LE || end == Iend_BE);
1663    return s;
1664 }
1665 IRStmt* IRStmt_CAS ( IRCAS* cas ) {
1666    IRStmt* s          = LibVEX_Alloc(sizeof(IRStmt));
1667    s->tag             = Ist_CAS;
1668    s->Ist.CAS.details = cas;
1669    return s;
1670 }
1671 IRStmt* IRStmt_LLSC ( IREndness end,
1672                       IRTemp result, IRExpr* addr, IRExpr* storedata ) {
1673    IRStmt* s = LibVEX_Alloc(sizeof(IRStmt));
1674    s->tag                = Ist_LLSC;
1675    s->Ist.LLSC.end       = end;
1676    s->Ist.LLSC.result    = result;
1677    s->Ist.LLSC.addr      = addr;
1678    s->Ist.LLSC.storedata = storedata;
1679    return s;
1680 }
1681 IRStmt* IRStmt_Dirty ( IRDirty* d )
1682 {
1683    IRStmt* s            = LibVEX_Alloc(sizeof(IRStmt));
1684    s->tag               = Ist_Dirty;
1685    s->Ist.Dirty.details = d;
1686    return s;
1687 }
1688 IRStmt* IRStmt_MBE ( IRMBusEvent event )
1689 {
1690    IRStmt* s        = LibVEX_Alloc(sizeof(IRStmt));
1691    s->tag           = Ist_MBE;
1692    s->Ist.MBE.event = event;
1693    return s;
1694 }
1695 IRStmt* IRStmt_Exit ( IRExpr* guard, IRJumpKind jk, IRConst* dst ) {
1696    IRStmt* s         = LibVEX_Alloc(sizeof(IRStmt));
1697    s->tag            = Ist_Exit;
1698    s->Ist.Exit.guard = guard;
1699    s->Ist.Exit.jk    = jk;
1700    s->Ist.Exit.dst   = dst;
1701    return s;
1702 }
1703
1704
1705 /* Constructors -- IRTypeEnv */
1706
1707 IRTypeEnv* emptyIRTypeEnv ( void )
1708 {
1709    IRTypeEnv* env   = LibVEX_Alloc(sizeof(IRTypeEnv));
1710    env->types       = LibVEX_Alloc(8 * sizeof(IRType));
1711    env->types_size  = 8;
1712    env->types_used  = 0;
1713    return env;
1714 }
1715
1716
1717 /* Constructors -- IRSB */
1718
1719 IRSB* emptyIRSB ( void )
1720 {
1721    IRSB* bb       = LibVEX_Alloc(sizeof(IRSB));
1722    bb->tyenv      = emptyIRTypeEnv();
1723    bb->stmts_used = 0;
1724    bb->stmts_size = 8;
1725    bb->stmts      = LibVEX_Alloc(bb->stmts_size * sizeof(IRStmt*));
1726    bb->next       = NULL;
1727    bb->jumpkind   = Ijk_Boring;
1728    return bb;
1729 }
1730
1731
1732 /*---------------------------------------------------------------*/
1733 /*--- (Deep) copy constructors.  These make complete copies   ---*/
1734 /*--- the original, which can be modified without affecting   ---*/
1735 /*--- the original.                                           ---*/
1736 /*---------------------------------------------------------------*/
1737
1738 /* Copying IR Expr vectors (for call args). */
1739
1740 /* Shallow copy of an IRExpr vector */
1741
1742 IRExpr** shallowCopyIRExprVec ( IRExpr** vec )
1743 {
1744    Int      i;
1745    IRExpr** newvec;
1746    for (i = 0; vec[i]; i++)
1747       ;
1748    newvec = LibVEX_Alloc((i+1)*sizeof(IRExpr*));
1749    for (i = 0; vec[i]; i++)
1750       newvec[i] = vec[i];
1751    newvec[i] = NULL;
1752    return newvec;
1753 }
1754
1755 /* Deep copy of an IRExpr vector */
1756
1757 IRExpr** deepCopyIRExprVec ( IRExpr** vec )
1758 {
1759    Int      i;
1760    IRExpr** newvec = shallowCopyIRExprVec( vec );
1761    for (i = 0; newvec[i]; i++)
1762       newvec[i] = deepCopyIRExpr(newvec[i]);
1763    return newvec;
1764 }
1765
1766 /* Deep copy constructors for all heap-allocated IR types follow. */
1767
1768 IRConst* deepCopyIRConst ( IRConst* c )
1769 {
1770    switch (c->tag) {
1771       case Ico_U1:   return IRConst_U1(c->Ico.U1);
1772       case Ico_U8:   return IRConst_U8(c->Ico.U8);
1773       case Ico_U16:  return IRConst_U16(c->Ico.U16);
1774       case Ico_U32:  return IRConst_U32(c->Ico.U32);
1775       case Ico_U64:  return IRConst_U64(c->Ico.U64);
1776       case Ico_F32:  return IRConst_F32(c->Ico.F32);
1777       case Ico_F32i: return IRConst_F32i(c->Ico.F32i);
1778       case Ico_F64:  return IRConst_F64(c->Ico.F64);
1779       case Ico_F64i: return IRConst_F64i(c->Ico.F64i);
1780       case Ico_V128: return IRConst_V128(c->Ico.V128);
1781       default: vpanic("deepCopyIRConst");
1782    }
1783 }
1784
1785 IRCallee* deepCopyIRCallee ( IRCallee* ce )
1786 {
1787    IRCallee* ce2 = mkIRCallee(ce->regparms, ce->name, ce->addr);
1788    ce2->mcx_mask = ce->mcx_mask;
1789    return ce2;
1790 }
1791
1792 IRRegArray* deepCopyIRRegArray ( IRRegArray* d )
1793 {
1794    return mkIRRegArray(d->base, d->elemTy, d->nElems);
1795 }
1796
1797 IRExpr* deepCopyIRExpr ( IRExpr* e )
1798 {
1799    switch (e->tag) {
1800       case Iex_Get:
1801          return IRExpr_Get(e->Iex.Get.offset, e->Iex.Get.ty);
1802       case Iex_GetI:
1803          return IRExpr_GetI(deepCopyIRRegArray(e->Iex.GetI.descr),
1804                             deepCopyIRExpr(e->Iex.GetI.ix),
1805                             e->Iex.GetI.bias);
1806       case Iex_RdTmp:
1807          return IRExpr_RdTmp(e->Iex.RdTmp.tmp);
1808       case Iex_Qop:
1809          return IRExpr_Qop(e->Iex.Qop.op,
1810                            deepCopyIRExpr(e->Iex.Qop.arg1),
1811                            deepCopyIRExpr(e->Iex.Qop.arg2),
1812                            deepCopyIRExpr(e->Iex.Qop.arg3),
1813                            deepCopyIRExpr(e->Iex.Qop.arg4));
1814       case Iex_Triop:
1815          return IRExpr_Triop(e->Iex.Triop.op,
1816                              deepCopyIRExpr(e->Iex.Triop.arg1),
1817                              deepCopyIRExpr(e->Iex.Triop.arg2),
1818                              deepCopyIRExpr(e->Iex.Triop.arg3));
1819       case Iex_Binop:
1820          return IRExpr_Binop(e->Iex.Binop.op,
1821                              deepCopyIRExpr(e->Iex.Binop.arg1),
1822                              deepCopyIRExpr(e->Iex.Binop.arg2));
1823       case Iex_Unop:
1824          return IRExpr_Unop(e->Iex.Unop.op,
1825                             deepCopyIRExpr(e->Iex.Unop.arg));
1826       case Iex_Load:
1827          return IRExpr_Load(e->Iex.Load.end,
1828                             e->Iex.Load.ty,
1829                             deepCopyIRExpr(e->Iex.Load.addr));
1830       case Iex_Const:
1831          return IRExpr_Const(deepCopyIRConst(e->Iex.Const.con));
1832       case Iex_CCall:
1833          return IRExpr_CCall(deepCopyIRCallee(e->Iex.CCall.cee),
1834                              e->Iex.CCall.retty,
1835                              deepCopyIRExprVec(e->Iex.CCall.args));
1836
1837       case Iex_Mux0X:
1838          return IRExpr_Mux0X(deepCopyIRExpr(e->Iex.Mux0X.cond),
1839                              deepCopyIRExpr(e->Iex.Mux0X.expr0),
1840                              deepCopyIRExpr(e->Iex.Mux0X.exprX));
1841       default:
1842          vpanic("deepCopyIRExpr");
1843    }
1844 }
1845
1846 IRDirty* deepCopyIRDirty ( IRDirty* d )
1847 {
1848    Int      i;
1849    IRDirty* d2 = emptyIRDirty();
1850    d2->cee   = deepCopyIRCallee(d->cee);
1851    d2->guard = deepCopyIRExpr(d->guard);
1852    d2->args  = deepCopyIRExprVec(d->args);
1853    d2->tmp   = d->tmp;
1854    d2->mFx   = d->mFx;
1855    d2->mAddr = d->mAddr==NULL ? NULL : deepCopyIRExpr(d->mAddr);
1856    d2->mSize = d->mSize;
1857    d2->needsBBP = d->needsBBP;
1858    d2->nFxState = d->nFxState;
1859    for (i = 0; i < d2->nFxState; i++)
1860       d2->fxState[i] = d->fxState[i];
1861    return d2;
1862 }
1863
1864 IRCAS* deepCopyIRCAS ( IRCAS* cas )
1865 {
1866    return mkIRCAS( cas->oldHi, cas->oldLo, cas->end,
1867                    deepCopyIRExpr(cas->addr),
1868                    cas->expdHi==NULL ? NULL : deepCopyIRExpr(cas->expdHi),
1869                    deepCopyIRExpr(cas->expdLo),
1870                    cas->dataHi==NULL ? NULL : deepCopyIRExpr(cas->dataHi),
1871                    deepCopyIRExpr(cas->dataLo) );
1872 }
1873
1874 IRStmt* deepCopyIRStmt ( IRStmt* s )
1875 {
1876    switch (s->tag) {
1877       case Ist_NoOp:
1878          return IRStmt_NoOp();
1879       case Ist_AbiHint:
1880          return IRStmt_AbiHint(deepCopyIRExpr(s->Ist.AbiHint.base),
1881                                s->Ist.AbiHint.len,
1882                                deepCopyIRExpr(s->Ist.AbiHint.nia));
1883       case Ist_IMark:
1884          return IRStmt_IMark(s->Ist.IMark.addr, s->Ist.IMark.len);
1885       case Ist_Put:
1886          return IRStmt_Put(s->Ist.Put.offset,
1887                            deepCopyIRExpr(s->Ist.Put.data));
1888       case Ist_PutI:
1889          return IRStmt_PutI(deepCopyIRRegArray(s->Ist.PutI.descr),
1890                             deepCopyIRExpr(s->Ist.PutI.ix),
1891                             s->Ist.PutI.bias,
1892                             deepCopyIRExpr(s->Ist.PutI.data));
1893       case Ist_WrTmp:
1894          return IRStmt_WrTmp(s->Ist.WrTmp.tmp,
1895                              deepCopyIRExpr(s->Ist.WrTmp.data));
1896       case Ist_Store:
1897          return IRStmt_Store(s->Ist.Store.end,
1898                              deepCopyIRExpr(s->Ist.Store.addr),
1899                              deepCopyIRExpr(s->Ist.Store.data));
1900       case Ist_CAS:
1901          return IRStmt_CAS(deepCopyIRCAS(s->Ist.CAS.details));
1902       case Ist_LLSC:
1903          return IRStmt_LLSC(s->Ist.LLSC.end,
1904                             s->Ist.LLSC.result,
1905                             deepCopyIRExpr(s->Ist.LLSC.addr),
1906                             s->Ist.LLSC.storedata
1907                                ? deepCopyIRExpr(s->Ist.LLSC.storedata)
1908                                : NULL);
1909       case Ist_Dirty:
1910          return IRStmt_Dirty(deepCopyIRDirty(s->Ist.Dirty.details));
1911       case Ist_MBE:
1912          return IRStmt_MBE(s->Ist.MBE.event);
1913       case Ist_Exit:
1914          return IRStmt_Exit(deepCopyIRExpr(s->Ist.Exit.guard),
1915                             s->Ist.Exit.jk,
1916                             deepCopyIRConst(s->Ist.Exit.dst));
1917       default:
1918          vpanic("deepCopyIRStmt");
1919    }
1920 }
1921
1922 IRTypeEnv* deepCopyIRTypeEnv ( IRTypeEnv* src )
1923 {
1924    Int        i;
1925    IRTypeEnv* dst = LibVEX_Alloc(sizeof(IRTypeEnv));
1926    dst->types_size = src->types_size;
1927    dst->types_used = src->types_used;
1928    dst->types = LibVEX_Alloc(dst->types_size * sizeof(IRType));
1929    for (i = 0; i < src->types_used; i++)
1930       dst->types[i] = src->types[i];
1931    return dst;
1932 }
1933
1934 IRSB* deepCopyIRSB ( IRSB* bb )
1935 {
1936    Int      i;
1937    IRStmt** sts2;
1938    IRSB* bb2 = deepCopyIRSBExceptStmts(bb);
1939    bb2->stmts_used = bb2->stmts_size = bb->stmts_used;
1940    sts2 = LibVEX_Alloc(bb2->stmts_used * sizeof(IRStmt*));
1941    for (i = 0; i < bb2->stmts_used; i++)
1942       sts2[i] = deepCopyIRStmt(bb->stmts[i]);
1943    bb2->stmts    = sts2;
1944    return bb2;
1945 }
1946
1947 IRSB* deepCopyIRSBExceptStmts ( IRSB* bb )
1948 {
1949    IRSB* bb2     = emptyIRSB();
1950    bb2->tyenv    = deepCopyIRTypeEnv(bb->tyenv);
1951    bb2->next     = deepCopyIRExpr(bb->next);
1952    bb2->jumpkind = bb->jumpkind;
1953    return bb2;
1954 }
1955
1956
1957 /*---------------------------------------------------------------*/
1958 /*--- Primop types                                            ---*/
1959 /*---------------------------------------------------------------*/
1960
1961 static
1962 void typeOfPrimop ( IROp op,
1963                     /*OUTs*/
1964                     IRType* t_dst,
1965                     IRType* t_arg1, IRType* t_arg2,
1966                     IRType* t_arg3, IRType* t_arg4 )
1967 {
1968 #  define UNARY(_ta1,_td)                                      \
1969       *t_dst = (_td); *t_arg1 = (_ta1); break
1970 #  define BINARY(_ta1,_ta2,_td)                                \
1971      *t_dst = (_td); *t_arg1 = (_ta1); *t_arg2 = (_ta2); break
1972 #  define TERNARY(_ta1,_ta2,_ta3,_td)                          \
1973      *t_dst = (_td); *t_arg1 = (_ta1);                         \
1974      *t_arg2 = (_ta2); *t_arg3 = (_ta3); break
1975 #  define QUATERNARY(_ta1,_ta2,_ta3,_ta4,_td)                  \
1976      *t_dst = (_td); *t_arg1 = (_ta1);                         \
1977      *t_arg2 = (_ta2); *t_arg3 = (_ta3);                       \
1978      *t_arg4 = (_ta4); break
1979 #  define COMPARISON(_ta)                                      \
1980      *t_dst = Ity_I1; *t_arg1 = *t_arg2 = (_ta); break;
1981 #  define UNARY_COMPARISON(_ta)                                \
1982      *t_dst = Ity_I1; *t_arg1 = (_ta); break;
1983
1984    /* Rounding mode values are always Ity_I32, encoded as per
1985       IRRoundingMode */
1986    const IRType ity_RMode = Ity_I32;
1987
1988    *t_dst  = Ity_INVALID;
1989    *t_arg1 = Ity_INVALID;
1990    *t_arg2 = Ity_INVALID;
1991    *t_arg3 = Ity_INVALID;
1992    *t_arg4 = Ity_INVALID;
1993    switch (op) {
1994       case Iop_Add8: case Iop_Sub8: case Iop_Mul8:
1995       case Iop_Or8:  case Iop_And8: case Iop_Xor8:
1996          BINARY(Ity_I8,Ity_I8, Ity_I8);
1997
1998       case Iop_Add16: case Iop_Sub16: case Iop_Mul16:
1999       case Iop_Or16:  case Iop_And16: case Iop_Xor16:
2000          BINARY(Ity_I16,Ity_I16, Ity_I16);
2001
2002       case Iop_CmpORD32U:
2003       case Iop_CmpORD32S:
2004       case Iop_Add32: case Iop_Sub32: case Iop_Mul32:
2005       case Iop_Or32:  case Iop_And32: case Iop_Xor32:
2006       case Iop_Max32U:
2007       case Iop_Add16x2: case Iop_Sub16x2:
2008       case Iop_QAdd16Sx2: case Iop_QAdd16Ux2:
2009       case Iop_QSub16Sx2: case Iop_QSub16Ux2:
2010       case Iop_HAdd16Ux2: case Iop_HAdd16Sx2:
2011       case Iop_HSub16Ux2: case Iop_HSub16Sx2:
2012       case Iop_Add8x4: case Iop_Sub8x4:
2013       case Iop_QAdd8Sx4: case Iop_QAdd8Ux4:
2014       case Iop_QSub8Sx4: case Iop_QSub8Ux4:
2015       case Iop_HAdd8Ux4: case Iop_HAdd8Sx4:
2016       case Iop_HSub8Ux4: case Iop_HSub8Sx4:
2017       case Iop_Sad8Ux4:
2018          BINARY(Ity_I32,Ity_I32, Ity_I32);
2019
2020       case Iop_Add64: case Iop_Sub64: case Iop_Mul64:
2021       case Iop_Or64:  case Iop_And64: case Iop_Xor64:
2022       case Iop_CmpORD64U:
2023       case Iop_CmpORD64S:
2024       case Iop_Avg8Ux8: case Iop_Avg16Ux4:
2025       case Iop_Add8x8: case Iop_Add16x4: case Iop_Add32x2:
2026       case Iop_Add32Fx2: case Iop_Sub32Fx2:
2027       case Iop_CmpEQ8x8: case Iop_CmpEQ16x4: case Iop_CmpEQ32x2:
2028       case Iop_CmpGT8Sx8: case Iop_CmpGT16Sx4: case Iop_CmpGT32Sx2:
2029       case Iop_CmpGT8Ux8: case Iop_CmpGT16Ux4: case Iop_CmpGT32Ux2:
2030       case Iop_CmpGT32Fx2: case Iop_CmpEQ32Fx2: case Iop_CmpGE32Fx2:
2031       case Iop_InterleaveHI8x8: case Iop_InterleaveLO8x8:
2032       case Iop_InterleaveHI16x4: case Iop_InterleaveLO16x4:
2033       case Iop_InterleaveHI32x2: case Iop_InterleaveLO32x2:
2034       case Iop_CatOddLanes8x8: case Iop_CatEvenLanes8x8:
2035       case Iop_CatOddLanes16x4: case Iop_CatEvenLanes16x4:
2036       case Iop_InterleaveOddLanes8x8: case Iop_InterleaveEvenLanes8x8:
2037       case Iop_InterleaveOddLanes16x4: case Iop_InterleaveEvenLanes16x4:
2038       case Iop_Perm8x8:
2039       case Iop_Max8Ux8: case Iop_Max16Ux4: case Iop_Max32Ux2:
2040       case Iop_Max8Sx8: case Iop_Max16Sx4: case Iop_Max32Sx2:
2041       case Iop_Max32Fx2: case Iop_Min32Fx2:
2042       case Iop_PwMax32Fx2: case Iop_PwMin32Fx2:
2043       case Iop_Min8Ux8: case Iop_Min16Ux4: case Iop_Min32Ux2:
2044       case Iop_Min8Sx8: case Iop_Min16Sx4: case Iop_Min32Sx2:
2045       case Iop_PwMax8Ux8: case Iop_PwMax16Ux4: case Iop_PwMax32Ux2:
2046       case Iop_PwMax8Sx8: case Iop_PwMax16Sx4: case Iop_PwMax32Sx2:
2047       case Iop_PwMin8Ux8: case Iop_PwMin16Ux4: case Iop_PwMin32Ux2:
2048       case Iop_PwMin8Sx8: case Iop_PwMin16Sx4: case Iop_PwMin32Sx2:
2049       case Iop_Mul8x8: case Iop_Mul16x4: case Iop_Mul32x2:
2050       case Iop_Mul32Fx2:
2051       case Iop_PolynomialMul8x8:
2052       case Iop_MulHi16Sx4: case Iop_MulHi16Ux4:
2053       case Iop_QDMulHi16Sx4: case Iop_QDMulHi32Sx2:
2054       case Iop_QRDMulHi16Sx4: case Iop_QRDMulHi32Sx2:
2055       case Iop_QAdd8Sx8: case Iop_QAdd16Sx4:
2056       case Iop_QAdd32Sx2: case Iop_QAdd64Sx1:
2057       case Iop_QAdd8Ux8: case Iop_QAdd16Ux4:
2058       case Iop_QAdd32Ux2: case Iop_QAdd64Ux1:
2059       case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2:
2060       case Iop_PwAdd32Fx2:
2061       case Iop_QNarrow32Sx2:
2062       case Iop_QNarrow16Sx4: case Iop_QNarrow16Ux4:
2063       case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2:
2064       case Iop_QSub8Sx8: case Iop_QSub16Sx4:
2065       case Iop_QSub32Sx2: case Iop_QSub64Sx1:
2066       case Iop_QSub8Ux8: case Iop_QSub16Ux4:
2067       case Iop_QSub32Ux2: case Iop_QSub64Ux1:
2068       case Iop_Shl8x8: case Iop_Shl16x4: case Iop_Shl32x2:
2069       case Iop_Shr8x8: case Iop_Shr16x4: case Iop_Shr32x2:
2070       case Iop_Sar8x8: case Iop_Sar16x4: case Iop_Sar32x2:
2071       case Iop_Sal8x8: case Iop_Sal16x4: case Iop_Sal32x2: case Iop_Sal64x1:
2072       case Iop_QShl8x8: case Iop_QShl16x4: case Iop_QShl32x2: case Iop_QShl64x1:
2073       case Iop_QSal8x8: case Iop_QSal16x4: case Iop_QSal32x2: case Iop_QSal64x1:
2074       case Iop_Recps32Fx2:
2075       case Iop_Rsqrts32Fx2:
2076          BINARY(Ity_I64,Ity_I64, Ity_I64);
2077
2078       case Iop_ShlN32x2: case Iop_ShlN16x4: case Iop_ShlN8x8:
2079       case Iop_ShrN32x2: case Iop_ShrN16x4: case Iop_ShrN8x8:
2080       case Iop_SarN32x2: case Iop_SarN16x4: case Iop_SarN8x8:
2081       case Iop_QShlN8x8: case Iop_QShlN16x4:
2082       case Iop_QShlN32x2: case Iop_QShlN64x1:
2083       case Iop_QShlN8Sx8: case Iop_QShlN16Sx4:
2084       case Iop_QShlN32Sx2: case Iop_QShlN64Sx1:
2085       case Iop_QSalN8x8: case Iop_QSalN16x4:
2086       case Iop_QSalN32x2: case Iop_QSalN64x1:
2087          BINARY(Ity_I64,Ity_I8, Ity_I64);
2088
2089       case Iop_Shl8: case Iop_Shr8: case Iop_Sar8:
2090          BINARY(Ity_I8,Ity_I8, Ity_I8);
2091       case Iop_Shl16: case Iop_Shr16: case Iop_Sar16:
2092          BINARY(Ity_I16,Ity_I8, Ity_I16);
2093       case Iop_Shl32: case Iop_Shr32: case Iop_Sar32:
2094          BINARY(Ity_I32,Ity_I8, Ity_I32);
2095       case Iop_Shl64: case Iop_Shr64: case Iop_Sar64:
2096          BINARY(Ity_I64,Ity_I8, Ity_I64);
2097
2098       case Iop_Not8:
2099          UNARY(Ity_I8, Ity_I8);
2100       case Iop_Not16:
2101          UNARY(Ity_I16, Ity_I16);
2102       case Iop_Not32:
2103       case Iop_CmpNEZ16x2: case Iop_CmpNEZ8x4:
2104          UNARY(Ity_I32, Ity_I32);
2105
2106       case Iop_Not64:
2107       case Iop_CmpNEZ32x2: case Iop_CmpNEZ16x4: case Iop_CmpNEZ8x8:
2108       case Iop_Cnt8x8:
2109       case Iop_Clz8Sx8: case Iop_Clz16Sx4: case Iop_Clz32Sx2:
2110       case Iop_Cls8Sx8: case Iop_Cls16Sx4: case Iop_Cls32Sx2:
2111       case Iop_PwAddL8Ux8: case Iop_PwAddL16Ux4: case Iop_PwAddL32Ux2:
2112       case Iop_PwAddL8Sx8: case Iop_PwAddL16Sx4: case Iop_PwAddL32Sx2:
2113       case Iop_Reverse64_8x8: case Iop_Reverse64_16x4: case Iop_Reverse64_32x2:
2114       case Iop_Reverse32_8x8: case Iop_Reverse32_16x4:
2115       case Iop_Reverse16_8x8:
2116       case Iop_FtoI32Sx2_RZ: case Iop_FtoI32Ux2_RZ:
2117       case Iop_I32StoFx2: case Iop_I32UtoFx2:
2118       case Iop_Recip32x2: case Iop_Recip32Fx2:
2119       case Iop_Abs32Fx2:
2120       case Iop_Rsqrte32Fx2:
2121       case Iop_Rsqrte32x2:
2122       case Iop_Neg32Fx2:
2123       case Iop_Abs8x8: case Iop_Abs16x4: case Iop_Abs32x2:
2124          UNARY(Ity_I64, Ity_I64);
2125
2126       case Iop_CmpEQ8: case Iop_CmpNE8:
2127       case Iop_CasCmpEQ8: case Iop_CasCmpNE8:
2128          COMPARISON(Ity_I8);
2129       case Iop_CmpEQ16: case Iop_CmpNE16:
2130       case Iop_CasCmpEQ16: case Iop_CasCmpNE16:
2131          COMPARISON(Ity_I16);
2132       case Iop_CmpEQ32: case Iop_CmpNE32:
2133       case Iop_CasCmpEQ32: case Iop_CasCmpNE32:
2134       case Iop_CmpLT32S: case Iop_CmpLE32S:
2135       case Iop_CmpLT32U: case Iop_CmpLE32U:
2136          COMPARISON(Ity_I32);
2137       case Iop_CmpEQ64: case Iop_CmpNE64:
2138       case Iop_CasCmpEQ64: case Iop_CasCmpNE64:
2139       case Iop_CmpLT64S: case Iop_CmpLE64S:
2140       case Iop_CmpLT64U: case Iop_CmpLE64U:
2141          COMPARISON(Ity_I64);
2142
2143       case Iop_CmpNEZ8:  UNARY_COMPARISON(Ity_I8);
2144       case Iop_CmpNEZ16: UNARY_COMPARISON(Ity_I16);
2145       case Iop_CmpNEZ32: UNARY_COMPARISON(Ity_I32);
2146       case Iop_CmpNEZ64: UNARY_COMPARISON(Ity_I64);
2147
2148       case Iop_Left8:  UNARY(Ity_I8, Ity_I8);
2149       case Iop_Left16: UNARY(Ity_I16,Ity_I16);
2150       case Iop_CmpwNEZ32: case Iop_Left32: UNARY(Ity_I32,Ity_I32);
2151       case Iop_CmpwNEZ64: case Iop_Left64: UNARY(Ity_I64,Ity_I64);
2152
2153       case Iop_MullU8: case Iop_MullS8:
2154          BINARY(Ity_I8,Ity_I8, Ity_I16);
2155       case Iop_MullU16: case Iop_MullS16:
2156          BINARY(Ity_I16,Ity_I16, Ity_I32);
2157       case Iop_MullU32: case Iop_MullS32:
2158          BINARY(Ity_I32,Ity_I32, Ity_I64);
2159       case Iop_MullU64: case Iop_MullS64:
2160          BINARY(Ity_I64,Ity_I64, Ity_I128);
2161
2162       case Iop_Clz32: case Iop_Ctz32:
2163          UNARY(Ity_I32, Ity_I32);
2164
2165       case Iop_Clz64: case Iop_Ctz64:
2166          UNARY(Ity_I64, Ity_I64);
2167
2168       case Iop_DivU32: case Iop_DivS32:
2169          BINARY(Ity_I32,Ity_I32, Ity_I32);
2170
2171       case Iop_DivU64: case Iop_DivS64:
2172          BINARY(Ity_I64,Ity_I64, Ity_I64);
2173
2174       case Iop_DivModU64to32: case Iop_DivModS64to32:
2175          BINARY(Ity_I64,Ity_I32, Ity_I64);
2176
2177       case Iop_DivModU128to64: case Iop_DivModS128to64:
2178          BINARY(Ity_I128,Ity_I64, Ity_I128);
2179
2180       case Iop_DivModS64to64:
2181          BINARY(Ity_I64,Ity_I64, Ity_I128);
2182
2183       case Iop_16HIto8: case Iop_16to8:
2184          UNARY(Ity_I16, Ity_I8);
2185       case Iop_8HLto16:
2186          BINARY(Ity_I8,Ity_I8, Ity_I16);
2187
2188       case Iop_32HIto16: case Iop_32to16:
2189          UNARY(Ity_I32, Ity_I16);
2190       case Iop_16HLto32:
2191          BINARY(Ity_I16,Ity_I16, Ity_I32);
2192
2193       case Iop_64HIto32: case Iop_64to32:
2194          UNARY(Ity_I64, Ity_I32);
2195       case Iop_32HLto64:
2196          BINARY(Ity_I32,Ity_I32, Ity_I64);
2197
2198       case Iop_128HIto64: case Iop_128to64:
2199          UNARY(Ity_I128, Ity_I64);
2200       case Iop_64HLto128:
2201          BINARY(Ity_I64,Ity_I64, Ity_I128);
2202
2203       case Iop_Not1:   UNARY(Ity_I1, Ity_I1);
2204       case Iop_1Uto8:  UNARY(Ity_I1, Ity_I8);
2205       case Iop_1Sto8:  UNARY(Ity_I1, Ity_I8);
2206       case Iop_1Sto16: UNARY(Ity_I1, Ity_I16);
2207       case Iop_1Uto32: case Iop_1Sto32: UNARY(Ity_I1, Ity_I32);
2208       case Iop_1Sto64: case Iop_1Uto64: UNARY(Ity_I1, Ity_I64);
2209       case Iop_32to1:  UNARY(Ity_I32, Ity_I1);
2210       case Iop_64to1:  UNARY(Ity_I64, Ity_I1);
2211
2212       case Iop_8Uto32: case Iop_8Sto32:
2213          UNARY(Ity_I8, Ity_I32);
2214
2215       case Iop_8Uto16: case Iop_8Sto16:
2216          UNARY(Ity_I8, Ity_I16);
2217
2218       case Iop_16Uto32: case Iop_16Sto32:
2219          UNARY(Ity_I16, Ity_I32);
2220
2221       case Iop_32Sto64: case Iop_32Uto64:
2222          UNARY(Ity_I32, Ity_I64);
2223
2224       case Iop_8Uto64: case Iop_8Sto64:
2225          UNARY(Ity_I8, Ity_I64);
2226
2227       case Iop_16Uto64: case Iop_16Sto64:
2228          UNARY(Ity_I16, Ity_I64);
2229       case Iop_64to16:
2230          UNARY(Ity_I64, Ity_I16);
2231
2232       case Iop_32to8: UNARY(Ity_I32, Ity_I8);
2233       case Iop_64to8: UNARY(Ity_I64, Ity_I8);
2234
2235       case Iop_AddF64:    case Iop_SubF64:
2236       case Iop_MulF64:    case Iop_DivF64:
2237       case Iop_AddF64r32: case Iop_SubF64r32:
2238       case Iop_MulF64r32: case Iop_DivF64r32:
2239          TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64);
2240
2241       case Iop_AddF32: case Iop_SubF32:
2242       case Iop_MulF32: case Iop_DivF32:
2243          TERNARY(ity_RMode,Ity_F32,Ity_F32, Ity_F32);
2244
2245       case Iop_NegF64: case Iop_AbsF64:
2246          UNARY(Ity_F64, Ity_F64);
2247
2248       case Iop_NegF32: case Iop_AbsF32:
2249          UNARY(Ity_F32, Ity_F32);
2250
2251       case Iop_SqrtF64:
2252       case Iop_SqrtF64r32:
2253          BINARY(ity_RMode,Ity_F64, Ity_F64);
2254
2255       case Iop_SqrtF32:
2256       case Iop_RoundF32toInt:
2257          BINARY(ity_RMode,Ity_F32, Ity_F32);
2258
2259       case Iop_CmpF32:
2260          BINARY(Ity_F32,Ity_F32, Ity_I32);
2261
2262       case Iop_CmpF64:
2263          BINARY(Ity_F64,Ity_F64, Ity_I32);
2264
2265       case Iop_CmpF128:
2266          BINARY(Ity_F128,Ity_F128, Ity_I32);
2267
2268       case Iop_F64toI16S: BINARY(ity_RMode,Ity_F64, Ity_I16);
2269       case Iop_F64toI32S: BINARY(ity_RMode,Ity_F64, Ity_I32);
2270       case Iop_F64toI64S: BINARY(ity_RMode,Ity_F64, Ity_I64);
2271
2272       case Iop_F64toI32U: BINARY(ity_RMode,Ity_F64, Ity_I32);
2273
2274       case Iop_I16StoF64: UNARY(Ity_I16, Ity_F64);
2275       case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64);
2276       case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
2277       case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
2278       case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
2279
2280       case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64);
2281
2282       case Iop_F32toI16S: BINARY(ity_RMode,Ity_F32, Ity_I16);
2283       case Iop_F32toI32S: BINARY(ity_RMode,Ity_F32, Ity_I32);
2284       case Iop_F32toI64S: BINARY(ity_RMode,Ity_F32, Ity_I64);
2285
2286       case Iop_I16StoF32: UNARY(Ity_I16, Ity_F32);
2287       case Iop_I32StoF32: BINARY(ity_RMode,Ity_I32, Ity_F32);
2288       case Iop_I64StoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
2289
2290       case Iop_F32toF64: UNARY(Ity_F32, Ity_F64);
2291       case Iop_F64toF32: BINARY(ity_RMode,Ity_F64, Ity_F32);
2292
2293       case Iop_ReinterpI64asF64: UNARY(Ity_I64, Ity_F64);
2294       case Iop_ReinterpF64asI64: UNARY(Ity_F64, Ity_I64);
2295       case Iop_ReinterpI32asF32: UNARY(Ity_I32, Ity_F32);
2296       case Iop_ReinterpF32asI32: UNARY(Ity_F32, Ity_I32);
2297
2298       case Iop_AtanF64: case Iop_Yl2xF64:  case Iop_Yl2xp1F64:
2299       case Iop_ScaleF64: case Iop_PRemF64: case Iop_PRem1F64:
2300          TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64);
2301
2302       case Iop_PRemC3210F64: case Iop_PRem1C3210F64:
2303          TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_I32);
2304
2305       case Iop_SinF64: case Iop_CosF64: case Iop_TanF64:
2306       case Iop_2xm1F64:
2307       case Iop_RoundF64toInt: BINARY(ity_RMode,Ity_F64, Ity_F64);
2308
2309       case Iop_MAddF64: case Iop_MSubF64:
2310       case Iop_MAddF64r32: case Iop_MSubF64r32:
2311          QUATERNARY(ity_RMode,Ity_F64,Ity_F64,Ity_F64, Ity_F64);
2312
2313       case Iop_Est5FRSqrt:
2314       case Iop_RoundF64toF64_NEAREST: case Iop_RoundF64toF64_NegINF:
2315       case Iop_RoundF64toF64_PosINF: case Iop_RoundF64toF64_ZERO:
2316          UNARY(Ity_F64, Ity_F64);
2317       case Iop_RoundF64toF32:
2318          BINARY(ity_RMode,Ity_F64, Ity_F64);
2319       case Iop_CalcFPRF:
2320          UNARY(Ity_F64, Ity_I32);
2321       case Iop_TruncF64asF32:
2322          UNARY(Ity_F64, Ity_F32);
2323
2324       case Iop_I32UtoFx4:
2325       case Iop_I32StoFx4:
2326       case Iop_QFtoI32Ux4_RZ:
2327       case Iop_QFtoI32Sx4_RZ:
2328       case Iop_FtoI32Ux4_RZ:
2329       case Iop_FtoI32Sx4_RZ:
2330       case Iop_RoundF32x4_RM:
2331       case Iop_RoundF32x4_RP:
2332       case Iop_RoundF32x4_RN:
2333       case Iop_RoundF32x4_RZ:
2334       case Iop_Abs32Fx4:
2335       case Iop_Rsqrte32Fx4:
2336       case Iop_Rsqrte32x4:
2337          UNARY(Ity_V128, Ity_V128);
2338
2339       case Iop_64HLtoV128: BINARY(Ity_I64,Ity_I64, Ity_V128);
2340       case Iop_V128to64: case Iop_V128HIto64:
2341       case Iop_Shorten16x8: case Iop_Shorten32x4: case Iop_Shorten64x2:
2342       case Iop_QShortenU16Ux8: case Iop_QShortenU32Ux4: case Iop_QShortenU64Ux2:
2343       case Iop_QShortenS16Sx8: case Iop_QShortenS32Sx4: case Iop_QShortenS64Sx2:
2344       case Iop_QShortenU16Sx8: case Iop_QShortenU32Sx4: case Iop_QShortenU64Sx2:
2345       case Iop_F32toF16x4:
2346          UNARY(Ity_V128, Ity_I64);
2347
2348       case Iop_Longen8Ux8: case Iop_Longen16Ux4: case Iop_Longen32Ux2:
2349       case Iop_Longen8Sx8: case Iop_Longen16Sx4: case Iop_Longen32Sx2:
2350       case Iop_F16toF32x4:
2351          UNARY(Ity_I64, Ity_V128);
2352
2353       case Iop_V128to32:    UNARY(Ity_V128, Ity_I32);
2354       case Iop_32UtoV128:   UNARY(Ity_I32, Ity_V128);
2355       case Iop_64UtoV128:   UNARY(Ity_I64, Ity_V128);
2356       case Iop_SetV128lo32: BINARY(Ity_V128,Ity_I32, Ity_V128);
2357       case Iop_SetV128lo64: BINARY(Ity_V128,Ity_I64, Ity_V128);
2358
2359       case Iop_Dup8x16: UNARY(Ity_I8, Ity_V128);
2360       case Iop_Dup16x8: UNARY(Ity_I16, Ity_V128);
2361       case Iop_Dup32x4: UNARY(Ity_I32, Ity_V128);
2362       case Iop_Dup8x8:  UNARY(Ity_I8, Ity_I64);
2363       case Iop_Dup16x4: UNARY(Ity_I16, Ity_I64);
2364       case Iop_Dup32x2: UNARY(Ity_I32, Ity_I64);
2365
2366       case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4:
2367       case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2:
2368       case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4:
2369       case Iop_CmpLE64Fx2: case Iop_CmpUN64Fx2:
2370       case Iop_CmpGT32Fx4: case Iop_CmpGE32Fx4:
2371       case Iop_CmpEQ32F0x4: case Iop_CmpLT32F0x4:
2372       case Iop_CmpEQ64F0x2: case Iop_CmpLT64F0x2:
2373       case Iop_CmpLE32F0x4: case Iop_CmpUN32F0x4:
2374       case Iop_CmpLE64F0x2: case Iop_CmpUN64F0x2:
2375       case Iop_Add32Fx4: case Iop_Add32F0x4:
2376       case Iop_Add64Fx2: case Iop_Add64F0x2:
2377       case Iop_Div32Fx4: case Iop_Div32F0x4:
2378       case Iop_Div64Fx2: case Iop_Div64F0x2:
2379       case Iop_Max32Fx4: case Iop_Max32F0x4:
2380       case Iop_PwMax32Fx4: case Iop_PwMin32Fx4:
2381       case Iop_Max64Fx2: case Iop_Max64F0x2:
2382       case Iop_Min32Fx4: case Iop_Min32F0x4:
2383       case Iop_Min64Fx2: case Iop_Min64F0x2:
2384       case Iop_Mul32Fx4: case Iop_Mul32F0x4:
2385       case Iop_Mul64Fx2: case Iop_Mul64F0x2:
2386       case Iop_Sub32Fx4: case Iop_Sub32F0x4:
2387       case Iop_Sub64Fx2: case Iop_Sub64F0x2:
2388       case Iop_AndV128: case Iop_OrV128: case Iop_XorV128:
2389       case Iop_Add8x16:   case Iop_Add16x8:
2390       case Iop_Add32x4:   case Iop_Add64x2:
2391       case Iop_QAdd8Ux16: case Iop_QAdd16Ux8:
2392       case Iop_QAdd32Ux4: //case Iop_QAdd64Ux2:
2393       case Iop_QAdd8Sx16: case Iop_QAdd16Sx8:
2394       case Iop_QAdd32Sx4: case Iop_QAdd64Sx2:
2395       case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4:
2396       case Iop_Sub8x16:   case Iop_Sub16x8:
2397       case Iop_Sub32x4:   case Iop_Sub64x2:
2398       case Iop_QSub8Ux16: case Iop_QSub16Ux8:
2399       case Iop_QSub32Ux4: //case Iop_QSub64Ux2:
2400       case Iop_QSub8Sx16: case Iop_QSub16Sx8:
2401       case Iop_QSub32Sx4: case Iop_QSub64Sx2:
2402       case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4:
2403       case Iop_PolynomialMul8x16:
2404       case Iop_MulHi16Ux8: case Iop_MulHi32Ux4:
2405       case Iop_MulHi16Sx8: case Iop_MulHi32Sx4:
2406       case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4:
2407       case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4:
2408       case Iop_MullEven8Ux16: case Iop_MullEven16Ux8:
2409       case Iop_MullEven8Sx16: case Iop_MullEven16Sx8:
2410       case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4:
2411       case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4:
2412       case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4:
2413       case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4:
2414       case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4:
2415       case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4:
2416       case Iop_CmpEQ8x16:  case Iop_CmpEQ16x8:  case Iop_CmpEQ32x4:
2417       case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4:
2418       case Iop_CmpGT64Sx2:
2419       case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4:
2420       case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2:
2421       case Iop_QShl8x16: case Iop_QShl16x8: case Iop_QShl32x4: case Iop_QShl64x2:
2422       case Iop_QSal8x16: case Iop_QSal16x8: case Iop_QSal32x4: case Iop_QSal64x2:
2423       case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2:
2424       case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2:
2425       case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2:
2426       case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4:
2427       case Iop_QNarrow16Ux8: case Iop_QNarrow32Ux4:
2428       case Iop_QNarrow16Sx8: case Iop_QNarrow32Sx4:
2429       case Iop_Narrow16x8:   case Iop_Narrow32x4:
2430       case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8:
2431       case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2:
2432       case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8:
2433       case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2:
2434       case Iop_CatOddLanes8x16: case Iop_CatEvenLanes8x16:
2435       case Iop_CatOddLanes16x8: case Iop_CatEvenLanes16x8:
2436       case Iop_CatOddLanes32x4: case Iop_CatEvenLanes32x4:
2437       case Iop_InterleaveOddLanes8x16: case Iop_InterleaveEvenLanes8x16:
2438       case Iop_InterleaveOddLanes16x8: case Iop_InterleaveEvenLanes16x8:
2439       case Iop_InterleaveOddLanes32x4: case Iop_InterleaveEvenLanes32x4:
2440       case Iop_Perm8x16:
2441       case Iop_Recps32Fx4:
2442       case Iop_Rsqrts32Fx4:
2443          BINARY(Ity_V128,Ity_V128, Ity_V128);
2444
2445       case Iop_PolynomialMull8x8:
2446       case Iop_Mull8Ux8: case Iop_Mull8Sx8:
2447       case Iop_Mull16Ux4: case Iop_Mull16Sx4:
2448       case Iop_Mull32Ux2: case Iop_Mull32Sx2:
2449          BINARY(Ity_I64, Ity_I64, Ity_V128);
2450
2451       case Iop_NotV128:
2452       case Iop_Recip32Fx4: case Iop_Recip32F0x4:
2453       case Iop_Recip32x4:
2454       case Iop_Recip64Fx2: case Iop_Recip64F0x2:
2455       case Iop_RSqrt32Fx4: case Iop_RSqrt32F0x4:
2456       case Iop_RSqrt64Fx2: case Iop_RSqrt64F0x2:
2457       case Iop_Sqrt32Fx4:  case Iop_Sqrt32F0x4:
2458       case Iop_Sqrt64Fx2:  case Iop_Sqrt64F0x2:
2459       case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8:
2460       case Iop_CmpNEZ32x4: case Iop_CmpNEZ64x2:
2461       case Iop_Cnt8x16:
2462       case Iop_Clz8Sx16: case Iop_Clz16Sx8: case Iop_Clz32Sx4:
2463       case Iop_Cls8Sx16: case Iop_Cls16Sx8: case Iop_Cls32Sx4:
2464       case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8: case Iop_PwAddL32Ux4:
2465       case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4:
2466       case Iop_Reverse64_8x16: case Iop_Reverse64_16x8: case Iop_Reverse64_32x4:
2467       case Iop_Reverse32_8x16: case Iop_Reverse32_16x8:
2468       case Iop_Reverse16_8x16:
2469       case Iop_Neg32Fx4:
2470       case Iop_Abs8x16: case Iop_Abs16x8: case Iop_Abs32x4:
2471          UNARY(Ity_V128, Ity_V128);
2472
2473       case Iop_ShlV128: case Iop_ShrV128:
2474       case Iop_ShlN8x16: case Iop_ShlN16x8:
2475       case Iop_ShlN32x4: case Iop_ShlN64x2:
2476       case Iop_ShrN8x16: case Iop_ShrN16x8:
2477       case Iop_ShrN32x4: case Iop_ShrN64x2:
2478       case Iop_SarN8x16: case Iop_SarN16x8:
2479       case Iop_SarN32x4: case Iop_SarN64x2:
2480       case Iop_QShlN8x16: case Iop_QShlN16x8:
2481       case Iop_QShlN32x4: case Iop_QShlN64x2:
2482       case Iop_QShlN8Sx16: case Iop_QShlN16Sx8:
2483       case Iop_QShlN32Sx4: case Iop_QShlN64Sx2:
2484       case Iop_QSalN8x16: case Iop_QSalN16x8:
2485       case Iop_QSalN32x4: case Iop_QSalN64x2:
2486          BINARY(Ity_V128,Ity_I8, Ity_V128);
2487
2488       case Iop_F32ToFixed32Ux4_RZ:
2489       case Iop_F32ToFixed32Sx4_RZ:
2490       case Iop_Fixed32UToF32x4_RN:
2491       case Iop_Fixed32SToF32x4_RN:
2492          BINARY(Ity_V128, Ity_I8, Ity_V128);
2493
2494       case Iop_F32ToFixed32Ux2_RZ:
2495       case Iop_F32ToFixed32Sx2_RZ:
2496       case Iop_Fixed32UToF32x2_RN:
2497       case Iop_Fixed32SToF32x2_RN:
2498          BINARY(Ity_I64, Ity_I8, Ity_I64);
2499
2500       case Iop_GetElem8x16:
2501          BINARY(Ity_V128, Ity_I8, Ity_I8);
2502       case Iop_GetElem16x8:
2503          BINARY(Ity_V128, Ity_I8, Ity_I16);
2504       case Iop_GetElem32x4:
2505          BINARY(Ity_V128, Ity_I8, Ity_I32);
2506       case Iop_GetElem64x2:
2507          BINARY(Ity_V128, Ity_I8, Ity_I64);
2508       case Iop_GetElem8x8:
2509          BINARY(Ity_I64, Ity_I8, Ity_I8);
2510       case Iop_GetElem16x4:
2511          BINARY(Ity_I64, Ity_I8, Ity_I16);
2512       case Iop_GetElem32x2:
2513          BINARY(Ity_I64, Ity_I8, Ity_I32);
2514       case Iop_SetElem8x8:
2515          TERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I64);
2516       case Iop_SetElem16x4:
2517          TERNARY(Ity_I64, Ity_I8, Ity_I16, Ity_I64);
2518       case Iop_SetElem32x2:
2519          TERNARY(Ity_I64, Ity_I8, Ity_I32, Ity_I64);
2520
2521       case Iop_Extract64:
2522          TERNARY(Ity_I64, Ity_I64, Ity_I8, Ity_I64);
2523       case Iop_ExtractV128:
2524          TERNARY(Ity_V128, Ity_V128, Ity_I8, Ity_V128);
2525
2526       case Iop_QDMulLong16Sx4: case Iop_QDMulLong32Sx2:
2527          BINARY(Ity_I64, Ity_I64, Ity_V128);
2528
2529          /* s390 specific */
2530       case Iop_MAddF32:
2531       case Iop_MSubF32:
2532          QUATERNARY(ity_RMode,Ity_F32,Ity_F32,Ity_F32, Ity_F32);
2533
2534       case Iop_F64HLtoF128:
2535         BINARY(Ity_F64,Ity_F64, Ity_F128);
2536
2537       case Iop_F128HItoF64:
2538       case Iop_F128LOtoF64:
2539         UNARY(Ity_F128, Ity_F64);
2540
2541       case Iop_AddF128:
2542       case Iop_SubF128:
2543       case Iop_MulF128:
2544       case Iop_DivF128:
2545          TERNARY(ity_RMode,Ity_F128,Ity_F128, Ity_F128);
2546
2547       case Iop_NegF128:
2548       case Iop_AbsF128:
2549          UNARY(Ity_F128, Ity_F128);
2550
2551       case Iop_SqrtF128:
2552          BINARY(ity_RMode,Ity_F128, Ity_F128);
2553
2554       case Iop_I32StoF128: UNARY(Ity_I32, Ity_F128);
2555       case Iop_I64StoF128: UNARY(Ity_I64, Ity_F128);
2556
2557       case Iop_F128toI32S: BINARY(ity_RMode,Ity_F128, Ity_I32);
2558       case Iop_F128toI64S: BINARY(ity_RMode,Ity_F128, Ity_I64);
2559
2560       case Iop_F32toF128: UNARY(Ity_F32, Ity_F128);
2561       case Iop_F64toF128: UNARY(Ity_F64, Ity_F128);
2562
2563       case Iop_F128toF32: BINARY(ity_RMode,Ity_F128, Ity_F32);
2564       case Iop_F128toF64: BINARY(ity_RMode,Ity_F128, Ity_F64);
2565
2566       default:
2567          ppIROp(op);
2568          vpanic("typeOfPrimop");
2569    }
2570 #  undef UNARY
2571 #  undef BINARY
2572 #  undef TERNARY
2573 #  undef COMPARISON
2574 #  undef UNARY_COMPARISON
2575 }
2576
2577
2578 /*---------------------------------------------------------------*/
2579 /*--- Helper functions for the IR -- IR Basic Blocks          ---*/
2580 /*---------------------------------------------------------------*/
2581
2582 void addStmtToIRSB ( IRSB* bb, IRStmt* st )
2583 {
2584    Int i;
2585    if (bb->stmts_used == bb->stmts_size) {
2586       IRStmt** stmts2 = LibVEX_Alloc(2 * bb->stmts_size * sizeof(IRStmt*));
2587       for (i = 0; i < bb->stmts_size; i++)
2588          stmts2[i] = bb->stmts[i];
2589       bb->stmts = stmts2;
2590       bb->stmts_size *= 2;
2591    }
2592    vassert(bb->stmts_used < bb->stmts_size);
2593    bb->stmts[bb->stmts_used] = st;
2594    bb->stmts_used++;
2595 }
2596
2597
2598 /*---------------------------------------------------------------*/
2599 /*--- Helper functions for the IR -- IR Type Environments     ---*/
2600 /*---------------------------------------------------------------*/
2601
2602 /* Allocate a new IRTemp, given its type. */
2603
2604 IRTemp newIRTemp ( IRTypeEnv* env, IRType ty )
2605 {
2606    vassert(env);
2607    vassert(env->types_used >= 0);
2608    vassert(env->types_size >= 0);
2609    vassert(env->types_used <= env->types_size);
2610    if (env->types_used < env->types_size) {
2611       env->types[env->types_used] = ty;
2612       return env->types_used++;
2613    } else {
2614       Int i;
2615       Int new_size = env->types_size==0 ? 8 : 2*env->types_size;
2616       IRType* new_types
2617          = LibVEX_Alloc(new_size * sizeof(IRType));
2618       for (i = 0; i < env->types_used; i++)
2619          new_types[i] = env->types[i];
2620       env->types      = new_types;
2621       env->types_size = new_size;
2622       return newIRTemp(env, ty);
2623    }
2624 }
2625
2626
2627 /*---------------------------------------------------------------*/
2628 /*--- Helper functions for the IR -- finding types of exprs   ---*/
2629 /*---------------------------------------------------------------*/
2630
2631 inline
2632 IRType typeOfIRTemp ( IRTypeEnv* env, IRTemp tmp )
2633 {
2634    vassert(tmp >= 0);
2635    vassert(tmp < env->types_used);
2636    return env->types[tmp];
2637 }
2638
2639
2640 IRType typeOfIRConst ( IRConst* con )
2641 {
2642    switch (con->tag) {
2643       case Ico_U1:    return Ity_I1;
2644       case Ico_U8:    return Ity_I8;
2645       case Ico_U16:   return Ity_I16;
2646       case Ico_U32:   return Ity_I32;
2647       case Ico_U64:   return Ity_I64;
2648       case Ico_F32:   return Ity_F32;
2649       case Ico_F32i:  return Ity_F32;
2650       case Ico_F64:   return Ity_F64;
2651       case Ico_F64i:  return Ity_F64;
2652       case Ico_V128:  return Ity_V128;
2653       default: vpanic("typeOfIRConst");
2654    }
2655 }
2656
2657 IRType typeOfIRExpr ( IRTypeEnv* tyenv, IRExpr* e )
2658 {
2659    IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4;
2660  start:
2661    switch (e->tag) {
2662       case Iex_Load:
2663          return e->Iex.Load.ty;
2664       case Iex_Get:
2665          return e->Iex.Get.ty;
2666       case Iex_GetI:
2667          return e->Iex.GetI.descr->elemTy;
2668       case Iex_RdTmp:
2669          return typeOfIRTemp(tyenv, e->Iex.RdTmp.tmp);
2670       case Iex_Const:
2671          return typeOfIRConst(e->Iex.Const.con);
2672       case Iex_Qop:
2673          typeOfPrimop(e->Iex.Qop.op,
2674                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
2675          return t_dst;
2676       case Iex_Triop:
2677          typeOfPrimop(e->Iex.Triop.op,
2678                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
2679          return t_dst;
2680       case Iex_Binop:
2681          typeOfPrimop(e->Iex.Binop.op,
2682                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
2683          return t_dst;
2684       case Iex_Unop:
2685          typeOfPrimop(e->Iex.Unop.op,
2686                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
2687          return t_dst;
2688       case Iex_CCall:
2689          return e->Iex.CCall.retty;
2690       case Iex_Mux0X:
2691          e = e->Iex.Mux0X.expr0;
2692          goto start;
2693          /* return typeOfIRExpr(tyenv, e->Iex.Mux0X.expr0); */
2694       case Iex_Binder:
2695          vpanic("typeOfIRExpr: Binder is not a valid expression");
2696       default:
2697          ppIRExpr(e);
2698          vpanic("typeOfIRExpr");
2699    }
2700 }
2701
2702 /* Is this any value actually in the enumeration 'IRType' ? */
2703 Bool isPlausibleIRType ( IRType ty )
2704 {
2705    switch (ty) {
2706       case Ity_INVALID: case Ity_I1:
2707       case Ity_I8: case Ity_I16: case Ity_I32:
2708       case Ity_I64: case Ity_I128:
2709       case Ity_F32: case Ity_F64: case Ity_F128:
2710       case Ity_V128:
2711          return True;
2712       default:
2713          return False;
2714    }
2715 }
2716
2717
2718 /*---------------------------------------------------------------*/
2719 /*--- Sanity checking -- FLATNESS                             ---*/
2720 /*---------------------------------------------------------------*/
2721
2722 /* Check that the canonical flatness constraints hold on an
2723    IRStmt. The only place where any expression is allowed to be
2724    non-atomic is the RHS of IRStmt_Tmp. */
2725
2726 /* Relies on:
2727    inline static Bool isAtom ( IRExpr* e ) {
2728       return e->tag == Iex_RdTmp || e->tag == Iex_Const;
2729    }
2730 */
2731
2732 Bool isFlatIRStmt ( IRStmt* st )
2733 {
2734    Int      i;
2735    IRExpr*  e;
2736    IRDirty* di;
2737    IRCAS*   cas;
2738
2739    switch (st->tag) {
2740       case Ist_AbiHint:
2741          return isIRAtom(st->Ist.AbiHint.base)
2742                 && isIRAtom(st->Ist.AbiHint.nia);
2743       case Ist_Put:
2744          return isIRAtom(st->Ist.Put.data);
2745       case Ist_PutI:
2746          return toBool( isIRAtom(st->Ist.PutI.ix)
2747                         && isIRAtom(st->Ist.PutI.data) );
2748       case Ist_WrTmp:
2749          /* This is the only interesting case.  The RHS can be any
2750             expression, *but* all its subexpressions *must* be
2751             atoms. */
2752          e = st->Ist.WrTmp.data;
2753          switch (e->tag) {
2754             case Iex_Binder: return True;
2755             case Iex_Get:    return True;
2756             case Iex_GetI:   return isIRAtom(e->Iex.GetI.ix);
2757             case Iex_RdTmp:  return True;
2758             case Iex_Qop:    return toBool(
2759                                     isIRAtom(e->Iex.Qop.arg1)
2760                                     && isIRAtom(e->Iex.Qop.arg2)
2761                                     && isIRAtom(e->Iex.Qop.arg3)
2762                                     && isIRAtom(e->Iex.Qop.arg4));
2763             case Iex_Triop:  return toBool(
2764                                     isIRAtom(e->Iex.Triop.arg1)
2765                                     && isIRAtom(e->Iex.Triop.arg2)
2766                                     && isIRAtom(e->Iex.Triop.arg3));
2767             case Iex_Binop:  return toBool(
2768                                     isIRAtom(e->Iex.Binop.arg1)
2769                                     && isIRAtom(e->Iex.Binop.arg2));
2770             case Iex_Unop:   return isIRAtom(e->Iex.Unop.arg);
2771             case Iex_Load:   return isIRAtom(e->Iex.Load.addr);
2772             case Iex_Const:  return True;
2773             case Iex_CCall:  for (i = 0; e->Iex.CCall.args[i]; i++)
2774                                 if (!isIRAtom(e->Iex.CCall.args[i]))
2775                                    return False;
2776                              return True;
2777             case Iex_Mux0X:  return toBool (
2778                                     isIRAtom(e->Iex.Mux0X.cond)
2779                                     && isIRAtom(e->Iex.Mux0X.expr0)
2780                                     && isIRAtom(e->Iex.Mux0X.exprX));
2781             default:         vpanic("isFlatIRStmt(e)");
2782          }
2783          /*notreached*/
2784          vassert(0);
2785       case Ist_Store:
2786          return toBool( isIRAtom(st->Ist.Store.addr)
2787                         && isIRAtom(st->Ist.Store.data) );
2788       case Ist_CAS:
2789          cas = st->Ist.CAS.details;
2790          return toBool( isIRAtom(cas->addr)
2791                         && (cas->expdHi ? isIRAtom(cas->expdHi) : True)
2792                         && isIRAtom(cas->expdLo)
2793                         && (cas->dataHi ? isIRAtom(cas->dataHi) : True)
2794                         && isIRAtom(cas->dataLo) );
2795       case Ist_LLSC:
2796          return toBool( isIRAtom(st->Ist.LLSC.addr)
2797                         && (st->Ist.LLSC.storedata
2798                                ? isIRAtom(st->Ist.LLSC.storedata) : True) );
2799       case Ist_Dirty:
2800          di = st->Ist.Dirty.details;
2801          if (!isIRAtom(di->guard))
2802             return False;
2803          for (i = 0; di->args[i]; i++)
2804             if (!isIRAtom(di->args[i]))
2805                return False;
2806          if (di->mAddr && !isIRAtom(di->mAddr))
2807             return False;
2808          return True;
2809       case Ist_NoOp:
2810       case Ist_IMark:
2811       case Ist_MBE:
2812          return True;
2813       case Ist_Exit:
2814          return isIRAtom(st->Ist.Exit.guard);
2815       default:
2816          vpanic("isFlatIRStmt(st)");
2817    }
2818 }
2819
2820
2821 /*---------------------------------------------------------------*/
2822 /*--- Sanity checking                                         ---*/
2823 /*---------------------------------------------------------------*/
2824
2825 /* Checks:
2826
2827    Everything is type-consistent.  No ill-typed anything.
2828    The target address at the end of the BB is a 32- or 64-
2829    bit expression, depending on the guest's word size.
2830
2831    Each temp is assigned only once, before its uses.
2832 */
2833
2834 static inline Int countArgs ( IRExpr** args )
2835 {
2836    Int i;
2837    for (i = 0; args[i]; i++)
2838       ;
2839    return i;
2840 }
2841
2842 static
2843 __attribute((noreturn))
2844 void sanityCheckFail ( IRSB* bb, IRStmt* stmt, HChar* what )
2845 {
2846    vex_printf("\nIR SANITY CHECK FAILURE\n\n");
2847    ppIRSB(bb);
2848    if (stmt) {
2849       vex_printf("\nIN STATEMENT:\n\n");
2850       ppIRStmt(stmt);
2851    }
2852    vex_printf("\n\nERROR = %s\n\n", what );
2853    vpanic("sanityCheckFail: exiting due to bad IR");
2854 }
2855
2856 static Bool saneIRRegArray ( IRRegArray* arr )
2857 {
2858    if (arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */)
2859       return False;
2860    if (arr->elemTy == Ity_I1)
2861       return False;
2862    if (arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */)
2863       return False;
2864    return True;
2865 }
2866
2867 static Bool saneIRCallee ( IRCallee* cee )
2868 {
2869    if (cee->name == NULL)
2870       return False;
2871    if (cee->addr == 0)
2872       return False;
2873    if (cee->regparms < 0 || cee->regparms > 3)
2874       return False;
2875    return True;
2876 }
2877
2878 static Bool saneIRConst ( IRConst* con )
2879 {
2880    switch (con->tag) {
2881       case Ico_U1:
2882          return toBool( con->Ico.U1 == True || con->Ico.U1 == False );
2883       default:
2884          /* Is there anything we can meaningfully check?  I don't
2885             think so. */
2886          return True;
2887    }
2888 }
2889
2890 /* Traverse a Stmt/Expr, inspecting IRTemp uses.  Report any out of
2891    range ones.  Report any which are read and for which the current
2892    def_count is zero. */
2893
2894 static
2895 void useBeforeDef_Temp ( IRSB* bb, IRStmt* stmt, IRTemp tmp, Int* def_counts )
2896 {
2897    if (tmp < 0 || tmp >= bb->tyenv->types_used)
2898       sanityCheckFail(bb,stmt, "out of range Temp in IRExpr");
2899    if (def_counts[tmp] < 1)
2900       sanityCheckFail(bb,stmt, "IRTemp use before def in IRExpr");
2901 }
2902
2903 static
2904 void useBeforeDef_Expr ( IRSB* bb, IRStmt* stmt, IRExpr* expr, Int* def_counts )
2905 {
2906    Int i;
2907    switch (expr->tag) {
2908       case Iex_Get:
2909          break;
2910       case Iex_GetI:
2911          useBeforeDef_Expr(bb,stmt,expr->Iex.GetI.ix,def_counts);
2912          break;
2913       case Iex_RdTmp:
2914          useBeforeDef_Temp(bb,stmt,expr->Iex.RdTmp.tmp,def_counts);
2915          break;
2916       case Iex_Qop:
2917          useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg1,def_counts);
2918          useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg2,def_counts);
2919          useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg3,def_counts);
2920          useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg4,def_counts);
2921          break;
2922       case Iex_Triop:
2923          useBeforeDef_Expr(bb,stmt,expr->Iex.Triop.arg1,def_counts);
2924          useBeforeDef_Expr(bb,stmt,expr->Iex.Triop.arg2,def_counts);
2925          useBeforeDef_Expr(bb,stmt,expr->Iex.Triop.arg3,def_counts);
2926          break;
2927       case Iex_Binop:
2928          useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg1,def_counts);
2929          useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg2,def_counts);
2930          break;
2931       case Iex_Unop:
2932          useBeforeDef_Expr(bb,stmt,expr->Iex.Unop.arg,def_counts);
2933          break;
2934       case Iex_Load:
2935          useBeforeDef_Expr(bb,stmt,expr->Iex.Load.addr,def_counts);
2936          break;
2937       case Iex_Const:
2938          break;
2939       case Iex_CCall:
2940          for (i = 0; expr->Iex.CCall.args[i]; i++)
2941             useBeforeDef_Expr(bb,stmt,expr->Iex.CCall.args[i],def_counts);
2942          break;
2943       case Iex_Mux0X:
2944          useBeforeDef_Expr(bb,stmt,expr->Iex.Mux0X.cond,def_counts);
2945          useBeforeDef_Expr(bb,stmt,expr->Iex.Mux0X.expr0,def_counts);
2946          useBeforeDef_Expr(bb,stmt,expr->Iex.Mux0X.exprX,def_counts);
2947          break;
2948       default:
2949          vpanic("useBeforeDef_Expr");
2950    }
2951 }
2952
2953 static
2954 void useBeforeDef_Stmt ( IRSB* bb, IRStmt* stmt, Int* def_counts )
2955 {
2956    Int      i;
2957    IRDirty* d;
2958    IRCAS*   cas;
2959    switch (stmt->tag) {
2960       case Ist_IMark:
2961          break;
2962       case Ist_AbiHint:
2963          useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.base,def_counts);
2964          useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.nia,def_counts);
2965          break;
2966       case Ist_Put:
2967          useBeforeDef_Expr(bb,stmt,stmt->Ist.Put.data,def_counts);
2968          break;
2969       case Ist_PutI:
2970          useBeforeDef_Expr(bb,stmt,stmt->Ist.PutI.ix,def_counts);
2971          useBeforeDef_Expr(bb,stmt,stmt->Ist.PutI.data,def_counts);
2972          break;
2973       case Ist_WrTmp:
2974          useBeforeDef_Expr(bb,stmt,stmt->Ist.WrTmp.data,def_counts);
2975          break;
2976       case Ist_Store:
2977          useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.addr,def_counts);
2978          useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.data,def_counts);
2979          break;
2980       case Ist_CAS:
2981          cas = stmt->Ist.CAS.details;
2982          useBeforeDef_Expr(bb,stmt,cas->addr,def_counts);
2983          if (cas->expdHi)
2984             useBeforeDef_Expr(bb,stmt,cas->expdHi,def_counts);
2985          useBeforeDef_Expr(bb,stmt,cas->expdLo,def_counts);
2986          if (cas->dataHi)
2987             useBeforeDef_Expr(bb,stmt,cas->dataHi,def_counts);
2988          useBeforeDef_Expr(bb,stmt,cas->dataLo,def_counts);
2989          break;
2990       case Ist_LLSC:
2991          useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.addr,def_counts);
2992          if (stmt->Ist.LLSC.storedata != NULL)
2993             useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.storedata,def_counts);
2994          break;
2995       case Ist_Dirty:
2996          d = stmt->Ist.Dirty.details;
2997          for (i = 0; d->args[i] != NULL; i++)
2998             useBeforeDef_Expr(bb,stmt,d->args[i],def_counts);
2999          if (d->mFx != Ifx_None)
3000             useBeforeDef_Expr(bb,stmt,d->mAddr,def_counts);
3001          break;
3002       case Ist_NoOp:
3003       case Ist_MBE:
3004          break;
3005       case Ist_Exit:
3006          useBeforeDef_Expr(bb,stmt,stmt->Ist.Exit.guard,def_counts);
3007          break;
3008       default:
3009          vpanic("useBeforeDef_Stmt");
3010    }
3011 }
3012
3013 static
3014 void tcExpr ( IRSB* bb, IRStmt* stmt, IRExpr* expr, IRType gWordTy )
3015 {
3016    Int        i;
3017    IRType     t_dst, t_arg1, t_arg2, t_arg3, t_arg4;
3018    IRTypeEnv* tyenv = bb->tyenv;
3019    switch (expr->tag) {
3020       case Iex_Get:
3021       case Iex_RdTmp:
3022          break;
3023       case Iex_GetI:
3024          tcExpr(bb,stmt, expr->Iex.GetI.ix, gWordTy );
3025          if (typeOfIRExpr(tyenv,expr->Iex.GetI.ix) != Ity_I32)
3026             sanityCheckFail(bb,stmt,"IRExpr.GetI.ix: not :: Ity_I32");
3027          if (!saneIRRegArray(expr->Iex.GetI.descr))
3028             sanityCheckFail(bb,stmt,"IRExpr.GetI.descr: invalid descr");
3029          break;
3030       case Iex_Qop: {
3031          IRType ttarg1, ttarg2, ttarg3, ttarg4;
3032          tcExpr(bb,stmt, expr->Iex.Qop.arg1, gWordTy );
3033          tcExpr(bb,stmt, expr->Iex.Qop.arg2, gWordTy );
3034          tcExpr(bb,stmt, expr->Iex.Qop.arg3, gWordTy );
3035          tcExpr(bb,stmt, expr->Iex.Qop.arg4, gWordTy );
3036          typeOfPrimop(expr->Iex.Qop.op,
3037                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
3038          if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
3039              || t_arg3 == Ity_INVALID || t_arg4 == Ity_INVALID) {
3040             vex_printf(" op name: " );
3041             ppIROp(expr->Iex.Qop.op);
3042             vex_printf("\n");
3043             sanityCheckFail(bb,stmt,
3044                "Iex.Qop: wrong arity op\n"
3045                "... name of op precedes BB printout\n");
3046          }
3047          ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Qop.arg1);
3048          ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Qop.arg2);
3049          ttarg3 = typeOfIRExpr(tyenv, expr->Iex.Qop.arg3);
3050          ttarg4 = typeOfIRExpr(tyenv, expr->Iex.Qop.arg4);
3051          if (t_arg1 != ttarg1 || t_arg2 != ttarg2
3052              || t_arg3 != ttarg3 || t_arg4 != ttarg4) {
3053             vex_printf(" op name: ");
3054             ppIROp(expr->Iex.Qop.op);
3055             vex_printf("\n");
3056             vex_printf(" op type is (");
3057             ppIRType(t_arg1);
3058             vex_printf(",");
3059             ppIRType(t_arg2);
3060             vex_printf(",");
3061             ppIRType(t_arg3);
3062             vex_printf(",");
3063             ppIRType(t_arg4);
3064             vex_printf(") -> ");
3065             ppIRType (t_dst);
3066             vex_printf("\narg tys are (");
3067             ppIRType(ttarg1);
3068             vex_printf(",");
3069             ppIRType(ttarg2);
3070             vex_printf(",");
3071             ppIRType(ttarg3);
3072             vex_printf(",");
3073             ppIRType(ttarg4);
3074             vex_printf(")\n");
3075             sanityCheckFail(bb,stmt,
3076                "Iex.Qop: arg tys don't match op tys\n"
3077                "... additional details precede BB printout\n");
3078          }
3079          break;
3080       }
3081       case Iex_Triop: {
3082          IRType ttarg1, ttarg2, ttarg3;
3083          tcExpr(bb,stmt, expr->Iex.Triop.arg1, gWordTy );
3084          tcExpr(bb,stmt, expr->Iex.Triop.arg2, gWordTy );
3085          tcExpr(bb,stmt, expr->Iex.Triop.arg3, gWordTy );
3086          typeOfPrimop(expr->Iex.Triop.op,
3087                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
3088          if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
3089              || t_arg3 == Ity_INVALID || t_arg4 != Ity_INVALID) {
3090             vex_printf(" op name: " );
3091             ppIROp(expr->Iex.Triop.op);
3092             vex_printf("\n");
3093             sanityCheckFail(bb,stmt,
3094                "Iex.Triop: wrong arity op\n"
3095                "... name of op precedes BB printout\n");
3096          }
3097          ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Triop.arg1);
3098          ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Triop.arg2);
3099          ttarg3 = typeOfIRExpr(tyenv, expr->Iex.Triop.arg3);
3100          if (t_arg1 != ttarg1 || t_arg2 != ttarg2 || t_arg3 != ttarg3) {
3101             vex_printf(" op name: ");
3102             ppIROp(expr->Iex.Triop.op);
3103             vex_printf("\n");
3104             vex_printf(" op type is (");
3105             ppIRType(t_arg1);
3106             vex_printf(",");
3107             ppIRType(t_arg2);
3108             vex_printf(",");
3109             ppIRType(t_arg3);
3110             vex_printf(") -> ");
3111             ppIRType (t_dst);
3112             vex_printf("\narg tys are (");
3113             ppIRType(ttarg1);
3114             vex_printf(",");
3115             ppIRType(ttarg2);
3116             vex_printf(",");
3117             ppIRType(ttarg3);
3118             vex_printf(")\n");
3119             sanityCheckFail(bb,stmt,
3120                "Iex.Triop: arg tys don't match op tys\n"
3121                "... additional details precede BB printout\n");
3122          }
3123          break;
3124       }
3125       case Iex_Binop: {
3126          IRType ttarg1, ttarg2;
3127          tcExpr(bb,stmt, expr->Iex.Binop.arg1, gWordTy );
3128          tcExpr(bb,stmt, expr->Iex.Binop.arg2, gWordTy );
3129          typeOfPrimop(expr->Iex.Binop.op,
3130                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
3131          if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
3132              || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) {
3133             vex_printf(" op name: " );
3134             ppIROp(expr->Iex.Binop.op);
3135             vex_printf("\n");
3136             sanityCheckFail(bb,stmt,
3137                "Iex.Binop: wrong arity op\n"
3138                "... name of op precedes BB printout\n");
3139          }
3140          ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg1);
3141          ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg2);
3142          if (t_arg1 != ttarg1 || t_arg2 != ttarg2) {
3143             vex_printf(" op name: ");
3144             ppIROp(expr->Iex.Binop.op);
3145             vex_printf("\n");
3146             vex_printf(" op type is (");
3147             ppIRType(t_arg1);
3148             vex_printf(",");
3149             ppIRType(t_arg2);
3150             vex_printf(") -> ");
3151             ppIRType (t_dst);
3152             vex_printf("\narg tys are (");
3153             ppIRType(ttarg1);
3154             vex_printf(",");
3155             ppIRType(ttarg2);
3156             vex_printf(")\n");
3157             sanityCheckFail(bb,stmt,
3158                "Iex.Binop: arg tys don't match op tys\n"
3159                "... additional details precede BB printout\n");
3160          }
3161          break;
3162       }
3163       case Iex_Unop:
3164          tcExpr(bb,stmt, expr->Iex.Unop.arg, gWordTy );
3165          typeOfPrimop(expr->Iex.Binop.op,
3166                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
3167          if (t_arg1 == Ity_INVALID || t_arg2 != Ity_INVALID
3168              || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID)
3169             sanityCheckFail(bb,stmt,"Iex.Unop: wrong arity op");
3170          if (t_arg1 != typeOfIRExpr(tyenv, expr->Iex.Unop.arg))
3171             sanityCheckFail(bb,stmt,"Iex.Unop: arg ty doesn't match op ty");
3172          break;
3173       case Iex_Load:
3174          tcExpr(bb,stmt, expr->Iex.Load.addr, gWordTy);
3175          if (typeOfIRExpr(tyenv, expr->Iex.Load.addr) != gWordTy)
3176             sanityCheckFail(bb,stmt,"Iex.Load.addr: not :: guest word type");
3177          if (expr->Iex.Load.end != Iend_LE && expr->Iex.Load.end != Iend_BE)
3178             sanityCheckFail(bb,stmt,"Iex.Load.end: bogus endianness");
3179          break;
3180       case Iex_CCall:
3181          if (!saneIRCallee(expr->Iex.CCall.cee))
3182             sanityCheckFail(bb,stmt,"Iex.CCall.cee: bad IRCallee");
3183          if (expr->Iex.CCall.cee->regparms > countArgs(expr->Iex.CCall.args))
3184             sanityCheckFail(bb,stmt,"Iex.CCall.cee: #regparms > #args");
3185          for (i = 0; expr->Iex.CCall.args[i]; i++) {
3186             if (i >= 32)
3187                sanityCheckFail(bb,stmt,"Iex.CCall: > 32 args");
3188             tcExpr(bb,stmt, expr->Iex.CCall.args[i], gWordTy);
3189          }
3190          if (expr->Iex.CCall.retty == Ity_I1)
3191             sanityCheckFail(bb,stmt,"Iex.CCall.retty: cannot return :: Ity_I1");
3192          for (i = 0; expr->Iex.CCall.args[i]; i++)
3193             if (typeOfIRExpr(tyenv, expr->Iex.CCall.args[i]) == Ity_I1)
3194                sanityCheckFail(bb,stmt,"Iex.CCall.arg: arg :: Ity_I1");
3195          break;
3196       case Iex_Const:
3197          if (!saneIRConst(expr->Iex.Const.con))
3198             sanityCheckFail(bb,stmt,"Iex.Const.con: invalid const");
3199          break;
3200       case Iex_Mux0X:
3201          tcExpr(bb,stmt, expr->Iex.Mux0X.cond, gWordTy);
3202          tcExpr(bb,stmt, expr->Iex.Mux0X.expr0, gWordTy);
3203          tcExpr(bb,stmt, expr->Iex.Mux0X.exprX, gWordTy);
3204          if (typeOfIRExpr(tyenv, expr->Iex.Mux0X.cond) != Ity_I8)
3205             sanityCheckFail(bb,stmt,"Iex.Mux0X.cond: cond :: Ity_I8");
3206          if (typeOfIRExpr(tyenv, expr->Iex.Mux0X.expr0)
3207              != typeOfIRExpr(tyenv, expr->Iex.Mux0X.exprX))
3208             sanityCheckFail(bb,stmt,"Iex.Mux0X: expr0/exprX mismatch");
3209          break;
3210        default:
3211          vpanic("tcExpr");
3212    }
3213 }
3214
3215
3216 static
3217 void tcStmt ( IRSB* bb, IRStmt* stmt, IRType gWordTy )
3218 {
3219    Int        i;
3220    IRDirty*   d;
3221    IRCAS*     cas;
3222    IRType     tyExpd, tyData;
3223    IRTypeEnv* tyenv = bb->tyenv;
3224    switch (stmt->tag) {
3225       case Ist_IMark:
3226          /* Somewhat heuristic, but rule out totally implausible
3227             instruction sizes. */
3228          if (stmt->Ist.IMark.len < 0 || stmt->Ist.IMark.len > 20)
3229             sanityCheckFail(bb,stmt,"IRStmt.IMark.len: implausible");
3230          break;
3231       case Ist_AbiHint:
3232          if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.base) != gWordTy)
3233             sanityCheckFail(bb,stmt,"IRStmt.AbiHint.base: "
3234                                     "not :: guest word type");
3235          if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.nia) != gWordTy)
3236             sanityCheckFail(bb,stmt,"IRStmt.AbiHint.nia: "
3237                                     "not :: guest word type");
3238          break;
3239       case Ist_Put:
3240          tcExpr( bb, stmt, stmt->Ist.Put.data, gWordTy );
3241          if (typeOfIRExpr(tyenv,stmt->Ist.Put.data) == Ity_I1)
3242             sanityCheckFail(bb,stmt,"IRStmt.Put.data: cannot Put :: Ity_I1");
3243          break;
3244       case Ist_PutI:
3245          tcExpr( bb, stmt, stmt->Ist.PutI.data, gWordTy );
3246          tcExpr( bb, stmt, stmt->Ist.PutI.ix, gWordTy );
3247          if (typeOfIRExpr(tyenv,stmt->Ist.PutI.data) == Ity_I1)
3248             sanityCheckFail(bb,stmt,"IRStmt.PutI.data: cannot PutI :: Ity_I1");
3249          if (typeOfIRExpr(tyenv,stmt->Ist.PutI.data)
3250              != stmt->Ist.PutI.descr->elemTy)
3251             sanityCheckFail(bb,stmt,"IRStmt.PutI.data: data ty != elem ty");
3252          if (typeOfIRExpr(tyenv,stmt->Ist.PutI.ix) != Ity_I32)
3253             sanityCheckFail(bb,stmt,"IRStmt.PutI.ix: not :: Ity_I32");
3254          if (!saneIRRegArray(stmt->Ist.PutI.descr))
3255             sanityCheckFail(bb,stmt,"IRStmt.PutI.descr: invalid descr");
3256          break;
3257       case Ist_WrTmp:
3258          tcExpr( bb, stmt, stmt->Ist.WrTmp.data, gWordTy );
3259          if (typeOfIRTemp(tyenv, stmt->Ist.WrTmp.tmp)
3260              != typeOfIRExpr(tyenv, stmt->Ist.WrTmp.data))
3261             sanityCheckFail(bb,stmt,"IRStmt.Put.Tmp: tmp and expr do not match");
3262          break;
3263       case Ist_Store:
3264          tcExpr( bb, stmt, stmt->Ist.Store.addr, gWordTy );
3265          tcExpr( bb, stmt, stmt->Ist.Store.data, gWordTy );
3266          if (typeOfIRExpr(tyenv, stmt->Ist.Store.addr) != gWordTy)
3267             sanityCheckFail(bb,stmt,"IRStmt.Store.addr: not :: guest word type");
3268          if (typeOfIRExpr(tyenv, stmt->Ist.Store.data) == Ity_I1)
3269             sanityCheckFail(bb,stmt,"IRStmt.Store.data: cannot Store :: Ity_I1");
3270          if (stmt->Ist.Store.end != Iend_LE && stmt->Ist.Store.end != Iend_BE)
3271             sanityCheckFail(bb,stmt,"Ist.Store.end: bogus endianness");
3272          break;
3273       case Ist_CAS:
3274          cas = stmt->Ist.CAS.details;
3275          /* make sure it's definitely either a CAS or a DCAS */
3276          if (cas->oldHi == IRTemp_INVALID
3277              && cas->expdHi == NULL && cas->dataHi == NULL) {
3278             /* fine; it's a single cas */
3279          }
3280          else
3281          if (cas->oldHi != IRTemp_INVALID
3282              && cas->expdHi != NULL && cas->dataHi != NULL) {
3283             /* fine; it's a double cas */
3284          }
3285          else {
3286             /* it's some el-mutanto hybrid */
3287             goto bad_cas;
3288          }
3289          /* check the address type */
3290          tcExpr( bb, stmt, cas->addr, gWordTy );
3291          if (typeOfIRExpr(tyenv, cas->addr) != gWordTy) goto bad_cas;
3292          /* check types on the {old,expd,data}Lo components agree */
3293          tyExpd = typeOfIRExpr(tyenv, cas->expdLo);
3294          tyData = typeOfIRExpr(tyenv, cas->dataLo);
3295          if (tyExpd != tyData) goto bad_cas;
3296          if (tyExpd != typeOfIRTemp(tyenv, cas->oldLo))
3297             goto bad_cas;
3298          /* check the base element type is sane */
3299          if (tyExpd == Ity_I8 || tyExpd == Ity_I16 || tyExpd == Ity_I32
3300              || (gWordTy == Ity_I64 && tyExpd == Ity_I64)) {
3301             /* fine */
3302          } else {
3303             goto bad_cas;
3304          }
3305          /* If it's a DCAS, check types on the {old,expd,data}Hi
3306             components too */
3307          if (cas->oldHi != IRTemp_INVALID) {
3308             tyExpd = typeOfIRExpr(tyenv, cas->expdHi);
3309             tyData = typeOfIRExpr(tyenv, cas->dataHi);
3310             if (tyExpd != tyData) goto bad_cas;
3311             if (tyExpd != typeOfIRTemp(tyenv, cas->oldHi))
3312                goto bad_cas;
3313             /* and finally check that oldLo and oldHi have the same
3314                type.  This forces equivalence amongst all 6 types. */
3315             if (typeOfIRTemp(tyenv, cas->oldHi)
3316                 != typeOfIRTemp(tyenv, cas->oldLo))
3317                goto bad_cas;
3318          }
3319          break;
3320          bad_cas:
3321          sanityCheckFail(bb,stmt,"IRStmt.CAS: ill-formed");
3322          break;
3323       case Ist_LLSC: {
3324          IRType tyRes;
3325          if (typeOfIRExpr(tyenv, stmt->Ist.LLSC.addr) != gWordTy)
3326             sanityCheckFail(bb,stmt,"IRStmt.LLSC.addr: not :: guest word type");
3327          if (stmt->Ist.LLSC.end != Iend_LE && stmt->Ist.LLSC.end != Iend_BE)
3328             sanityCheckFail(bb,stmt,"Ist.LLSC.end: bogus endianness");
3329          tyRes = typeOfIRTemp(tyenv, stmt->Ist.LLSC.result);
3330          if (stmt->Ist.LLSC.storedata == NULL) {
3331             /* it's a LL */
3332             if (tyRes != Ity_I64 && tyRes != Ity_I32 && tyRes != Ity_I8)
3333                sanityCheckFail(bb,stmt,"Ist.LLSC(LL).result :: bogus");
3334          } else {
3335             /* it's a SC */
3336             if (tyRes != Ity_I1)
3337                sanityCheckFail(bb,stmt,"Ist.LLSC(SC).result: not :: Ity_I1");
3338             tyData = typeOfIRExpr(tyenv, stmt->Ist.LLSC.storedata);
3339             if (tyData != Ity_I64 && tyData != Ity_I32 && tyData != Ity_I8)
3340                sanityCheckFail(bb,stmt,
3341                                "Ist.LLSC(SC).result :: storedata bogus");
3342          }
3343          break;
3344       }
3345       case Ist_Dirty:
3346          /* Mostly check for various kinds of ill-formed dirty calls. */
3347          d = stmt->Ist.Dirty.details;
3348          if (d->cee == NULL) goto bad_dirty;
3349          if (!saneIRCallee(d->cee)) goto bad_dirty;
3350          if (d->cee->regparms > countArgs(d->args)) goto bad_dirty;
3351          if (d->mFx == Ifx_None) {
3352             if (d->mAddr != NULL || d->mSize != 0)
3353                goto bad_dirty;
3354          } else {
3355             if (d->mAddr == NULL || d->mSize == 0)
3356                goto bad_dirty;
3357          }
3358          if (d->nFxState < 0 || d->nFxState > VEX_N_FXSTATE)
3359             goto bad_dirty;
3360          if (d->nFxState == 0 && d->needsBBP)
3361             goto bad_dirty;
3362          for (i = 0; i < d->nFxState; i++) {
3363             if (d->fxState[i].fx == Ifx_None) goto bad_dirty;
3364             if (d->fxState[i].size <= 0) goto bad_dirty;
3365          }
3366          /* check types, minimally */
3367          if (d->guard == NULL) goto bad_dirty;
3368          tcExpr( bb, stmt, d->guard, gWordTy );
3369          if (typeOfIRExpr(tyenv, d->guard) != Ity_I1)
3370             sanityCheckFail(bb,stmt,"IRStmt.Dirty.guard not :: Ity_I1");
3371          if (d->tmp != IRTemp_INVALID
3372              && typeOfIRTemp(tyenv, d->tmp) == Ity_I1)
3373             sanityCheckFail(bb,stmt,"IRStmt.Dirty.dst :: Ity_I1");
3374          for (i = 0; d->args[i] != NULL; i++) {
3375             if (i >= 32)
3376                sanityCheckFail(bb,stmt,"IRStmt.Dirty: > 32 args");
3377             if (typeOfIRExpr(tyenv, d->args[i]) == Ity_I1)
3378                sanityCheckFail(bb,stmt,"IRStmt.Dirty.arg[i] :: Ity_I1");
3379          }
3380          break;
3381          bad_dirty:
3382          sanityCheckFail(bb,stmt,"IRStmt.Dirty: ill-formed");
3383          break;
3384       case Ist_NoOp:
3385          break;
3386       case Ist_MBE:
3387          switch (stmt->Ist.MBE.event) {
3388             case Imbe_Fence:
3389                break;
3390             default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown");
3391                break;
3392          }
3393          break;
3394       case Ist_Exit:
3395          tcExpr( bb, stmt, stmt->Ist.Exit.guard, gWordTy );
3396          if (typeOfIRExpr(tyenv,stmt->Ist.Exit.guard) != Ity_I1)
3397             sanityCheckFail(bb,stmt,"IRStmt.Exit.guard: not :: Ity_I1");
3398          if (!saneIRConst(stmt->Ist.Exit.dst))
3399             sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: bad dst");
3400          if (typeOfIRConst(stmt->Ist.Exit.dst) != gWordTy)
3401             sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: not :: guest word type");
3402          break;
3403       default:
3404          vpanic("tcStmt");
3405    }
3406 }
3407
3408 void sanityCheckIRSB ( IRSB* bb,          HChar* caller,
3409                        Bool require_flat, IRType guest_word_size )
3410 {
3411    Int     i;
3412    IRStmt* stmt;
3413    Int     n_temps    = bb->tyenv->types_used;
3414    Int*    def_counts = LibVEX_Alloc(n_temps * sizeof(Int));
3415
3416    if (0)
3417       vex_printf("sanityCheck: %s\n", caller);
3418
3419    vassert(guest_word_size == Ity_I32
3420            || guest_word_size == Ity_I64);
3421
3422    if (bb->stmts_used < 0 || bb->stmts_size < 8
3423        || bb->stmts_used > bb->stmts_size)
3424       /* this BB is so strange we can't even print it */
3425       vpanic("sanityCheckIRSB: stmts array limits wierd");
3426
3427    /* Ensure each temp has a plausible type. */
3428    for (i = 0; i < n_temps; i++) {
3429       IRType ty = typeOfIRTemp(bb->tyenv,(IRTemp)i);
3430       if (!isPlausibleIRType(ty)) {
3431          vex_printf("Temp t%d declared with implausible type 0x%x\n",
3432                     i, (UInt)ty);
3433          sanityCheckFail(bb,NULL,"Temp declared with implausible type");
3434       }
3435    }
3436
3437    /* Check for flatness, if required. */
3438    if (require_flat) {
3439       for (i = 0; i < bb->stmts_used; i++) {
3440          stmt = bb->stmts[i];
3441          if (!stmt)
3442             sanityCheckFail(bb, stmt, "IRStmt: is NULL");
3443          if (!isFlatIRStmt(stmt))
3444             sanityCheckFail(bb, stmt, "IRStmt: is not flat");
3445       }
3446       if (!isIRAtom(bb->next))
3447          sanityCheckFail(bb, NULL, "bb->next is not an atom");
3448    }
3449
3450    /* Count the defs of each temp.  Only one def is allowed.
3451       Also, check that each used temp has already been defd. */
3452
3453    for (i = 0; i < n_temps; i++)
3454       def_counts[i] = 0;
3455
3456    for (i = 0; i < bb->stmts_used; i++) {
3457       IRDirty* d;
3458       IRCAS*   cas;
3459       stmt = bb->stmts[i];
3460       /* Check any temps used by this statement. */
3461       useBeforeDef_Stmt(bb,stmt,def_counts);
3462
3463       /* Now make note of any temps defd by this statement. */
3464       switch (stmt->tag) {
3465       case Ist_WrTmp:
3466          if (stmt->Ist.WrTmp.tmp < 0 || stmt->Ist.WrTmp.tmp >= n_temps)
3467             sanityCheckFail(bb, stmt,
3468                "IRStmt.Tmp: destination tmp is out of range");
3469          def_counts[stmt->Ist.WrTmp.tmp]++;
3470          if (def_counts[stmt->Ist.WrTmp.tmp] > 1)
3471             sanityCheckFail(bb, stmt,
3472                "IRStmt.Tmp: destination tmp is assigned more than once");
3473          break;
3474       case Ist_Store:
3475          break;
3476       case Ist_Dirty:
3477          if (stmt->Ist.Dirty.details->tmp != IRTemp_INVALID) {
3478             d = stmt->Ist.Dirty.details;
3479             if (d->tmp < 0 || d->tmp >= n_temps)
3480                sanityCheckFail(bb, stmt,
3481                   "IRStmt.Dirty: destination tmp is out of range");
3482             def_counts[d->tmp]++;
3483             if (def_counts[d->tmp] > 1)
3484                sanityCheckFail(bb, stmt,
3485                   "IRStmt.Dirty: destination tmp is assigned more than once");
3486          }
3487          break;
3488       case Ist_CAS:
3489          cas = stmt->Ist.CAS.details;
3490          if (cas->oldHi != IRTemp_INVALID) {
3491             if (cas->oldHi < 0 || cas->oldHi >= n_temps)
3492                 sanityCheckFail(bb, stmt,
3493                    "IRStmt.CAS: destination tmpHi is out of range");
3494              def_counts[cas->oldHi]++;
3495              if (def_counts[cas->oldHi] > 1)
3496                 sanityCheckFail(bb, stmt,
3497                    "IRStmt.CAS: destination tmpHi is assigned more than once");
3498          }
3499          if (cas->oldLo < 0 || cas->oldLo >= n_temps)
3500             sanityCheckFail(bb, stmt,
3501                "IRStmt.CAS: destination tmpLo is out of range");
3502          def_counts[cas->oldLo]++;
3503          if (def_counts[cas->oldLo] > 1)
3504             sanityCheckFail(bb, stmt,
3505                "IRStmt.CAS: destination tmpLo is assigned more than once");
3506          break;
3507       case Ist_LLSC:
3508          if (stmt->Ist.LLSC.result < 0 || stmt->Ist.LLSC.result >= n_temps)
3509             sanityCheckFail(bb, stmt,
3510                "IRStmt.LLSC: destination tmp is out of range");
3511          def_counts[stmt->Ist.LLSC.result]++;
3512          if (def_counts[stmt->Ist.LLSC.result] > 1)
3513             sanityCheckFail(bb, stmt,
3514                "IRStmt.LLSC: destination tmp is assigned more than once");
3515          break;
3516       default:
3517          /* explicitly handle the rest, so as to keep gcc quiet */
3518          break;
3519       }
3520    }
3521
3522    /* Typecheck everything. */
3523    for (i = 0; i < bb->stmts_used; i++)
3524       if (bb->stmts[i])
3525          tcStmt( bb, bb->stmts[i], guest_word_size );
3526    if (typeOfIRExpr(bb->tyenv,bb->next) != guest_word_size)
3527       sanityCheckFail(bb, NULL, "bb->next field has wrong type");
3528 }
3529
3530 /*---------------------------------------------------------------*/
3531 /*--- Misc helper functions                                   ---*/
3532 /*---------------------------------------------------------------*/
3533
3534 Bool eqIRConst ( IRConst* c1, IRConst* c2 )
3535 {
3536    if (c1->tag != c2->tag)
3537       return False;
3538
3539    switch (c1->tag) {
3540       case Ico_U1:  return toBool( (1 & c1->Ico.U1) == (1 & c2->Ico.U1) );
3541       case Ico_U8:  return toBool( c1->Ico.U8  == c2->Ico.U8 );
3542       case Ico_U16: return toBool( c1->Ico.U16 == c2->Ico.U16 );
3543       case Ico_U32: return toBool( c1->Ico.U32 == c2->Ico.U32 );
3544       case Ico_U64: return toBool( c1->Ico.U64 == c2->Ico.U64 );
3545       case Ico_F32: return toBool( c1->Ico.F32 == c2->Ico.F32 );
3546       case Ico_F32i: return toBool( c1->Ico.F32i == c2->Ico.F32i );
3547       case Ico_F64: return toBool( c1->Ico.F64 == c2->Ico.F64 );
3548       case Ico_F64i: return toBool( c1->Ico.F64i == c2->Ico.F64i );
3549       case Ico_V128: return toBool( c1->Ico.V128 == c2->Ico.V128 );
3550       default: vpanic("eqIRConst");
3551    }
3552 }
3553
3554 Bool eqIRRegArray ( IRRegArray* descr1, IRRegArray* descr2 )
3555 {
3556    return toBool( descr1->base == descr2->base
3557                   && descr1->elemTy == descr2->elemTy
3558                   && descr1->nElems == descr2->nElems );
3559 }
3560
3561 Int sizeofIRType ( IRType ty )
3562 {
3563    switch (ty) {
3564       case Ity_I8:   return 1;
3565       case Ity_I16:  return 2;
3566       case Ity_I32:  return 4;
3567       case Ity_I64:  return 8;
3568       case Ity_I128: return 16;
3569       case Ity_F32:  return 4;
3570       case Ity_F64:  return 8;
3571       case Ity_F128: return 16;
3572       case Ity_V128: return 16;
3573       default: vex_printf("\n"); ppIRType(ty); vex_printf("\n");
3574                vpanic("sizeofIRType");
3575    }
3576 }
3577
3578 IRExpr* mkIRExpr_HWord ( HWord hw )
3579 {
3580    vassert(sizeof(void*) == sizeof(HWord));
3581    if (sizeof(HWord) == 4)
3582       return IRExpr_Const(IRConst_U32((UInt)hw));
3583    if (sizeof(HWord) == 8)
3584       return IRExpr_Const(IRConst_U64((ULong)hw));
3585    vpanic("mkIRExpr_HWord");
3586 }
3587
3588 IRDirty* unsafeIRDirty_0_N ( Int regparms, HChar* name, void* addr,
3589                              IRExpr** args )
3590 {
3591    IRDirty* d = emptyIRDirty();
3592    d->cee   = mkIRCallee ( regparms, name, addr );
3593    d->guard = IRExpr_Const(IRConst_U1(True));
3594    d->args  = args;
3595    return d;
3596 }
3597
3598 IRDirty* unsafeIRDirty_1_N ( IRTemp dst,
3599                              Int regparms, HChar* name, void* addr,
3600                              IRExpr** args )
3601 {
3602    IRDirty* d = emptyIRDirty();
3603    d->cee   = mkIRCallee ( regparms, name, addr );
3604    d->guard = IRExpr_Const(IRConst_U1(True));
3605    d->args  = args;
3606    d->tmp   = dst;
3607    return d;
3608 }
3609
3610 IRExpr* mkIRExprCCall ( IRType retty,
3611                         Int regparms, HChar* name, void* addr,
3612                         IRExpr** args )
3613 {
3614    return IRExpr_CCall ( mkIRCallee ( regparms, name, addr ),
3615                          retty, args );
3616 }
3617
3618 Bool eqIRAtom ( IRExpr* a1, IRExpr* a2 )
3619 {
3620    vassert(isIRAtom(a1));
3621    vassert(isIRAtom(a2));
3622    if (a1->tag == Iex_RdTmp && a2->tag == Iex_RdTmp)
3623       return toBool(a1->Iex.RdTmp.tmp == a2->Iex.RdTmp.tmp);
3624    if (a1->tag == Iex_Const && a2->tag == Iex_Const)
3625       return eqIRConst(a1->Iex.Const.con, a2->Iex.Const.con);
3626    return False;
3627 }
3628
3629 /*---------------------------------------------------------------*/
3630 /*--- end                                           ir_defs.c ---*/
3631 /*---------------------------------------------------------------*/