1 /* -*- mode: C; c-basic-offset: 3; -*- */
3 /*---------------------------------------------------------------*/
4 /*--- begin host_s390_disasm.c ---*/
5 /*---------------------------------------------------------------*/
8 This file is part of Valgrind, a dynamic binary instrumentation
11 Copyright IBM Corp. 2010-2011
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
28 The GNU General Public License is contained in the file COPYING.
31 /* Contributed by Florian Krohm */
34 #include "libvex_basictypes.h"
35 #include "main_util.h" // vassert
36 #include "main_globals.h" // vex_traceflags
37 #include "host_s390_disasm.h"
39 /* The format that is used to write out a mnemonic.
40 These should be declared as 'const HChar' but vex_printf needs
41 to be changed for that first */
42 static HChar s390_mnm_fmt[] = "%-8s";
45 /* Return the name of a general purpose register for dis-assembly purposes. */
47 gpr_operand(UInt archreg)
49 static const HChar names[16][5] = {
50 "%r0", "%r1", "%r2", "%r3",
51 "%r4", "%r5", "%r6", "%r7",
52 "%r8", "%r9", "%r10", "%r11",
53 "%r12", "%r13", "%r14", "%r15",
56 vassert(archreg < 16);
58 return names[archreg];
62 /* Return the name of a floating point register for dis-assembly purposes. */
64 fpr_operand(UInt archreg)
66 static const HChar names[16][5] = {
67 "%f0", "%f1", "%f2", "%f3",
68 "%f4", "%f5", "%f6", "%f7",
69 "%f8", "%f9", "%f10", "%f11",
70 "%f12", "%f13", "%f14", "%f15",
73 vassert(archreg < 16);
75 return names[archreg];
79 /* Return the name of an access register for dis-assembly purposes. */
81 ar_operand(UInt archreg)
83 static const HChar names[16][5] = {
84 "%a0", "%a1", "%a2", "%a3",
85 "%a4", "%a5", "%a6", "%a7",
86 "%a8", "%a9", "%a10", "%a11",
87 "%a12", "%a13", "%a14", "%a15",
90 vassert(archreg < 16);
92 return names[archreg];
96 /* Build and return the extended mnemonic for the compare and branch
97 opcodes as introduced by z10. See also the opcodes in file
98 opcodes/s390-opc.txt (from binutils) that have a '$' in their name. */
100 cab_operand(const HChar *base, UInt mask)
105 static HChar buf[10]; /* Maximum is 6 + 2 */
107 static HChar *suffix[] = {
108 "", "h", "l", "ne", "e", "nl", "nh", ""
111 /* strcpy(buf, from); */
112 for (from = base, to = buf; *from; ++from, ++to) {
115 /* strcat(buf, suffix); */
116 for (from = suffix[mask >> 1]; *from; ++from, ++to) {
124 /* Common function used to construct a mnemonic based on a condition code
127 construct_mnemonic(const HChar *prefix, const HChar *suffix, UInt mask)
132 static HChar buf[10];
134 static HChar mask_id[16][4] = {
135 "", /* 0 -> unused */
136 "o", "h", "nle", "l", "nhe", "lh", "ne",
137 "e", "nlh", "he", "nl", "le", "nh", "no",
138 "" /* 15 -> unused */
141 /* Guard against buffer overflow */
142 vassert(vex_strlen(prefix) + vex_strlen(suffix) + sizeof mask_id[0] <= sizeof buf);
144 /* strcpy(buf, prefix); */
145 for (from = prefix, to = buf; *from; ++from, ++to) {
148 /* strcat(buf, mask_id); */
149 for (from = mask_id[mask]; *from; ++from, ++to) {
152 /* strcat(buf, suffix); */
153 for (from = suffix; *from; ++from, ++to) {
162 /* Return the special mnemonic for the BCR opcode */
166 if (m1 == 0) return "nopr";
167 if (m1 == 15) return "br";
169 return construct_mnemonic("b", "r", m1);
173 /* Return the special mnemonic for the BC opcode */
177 if (m1 == 0) return "nop";
178 if (m1 == 15) return "b";
180 return construct_mnemonic("b", "", m1);
184 /* Return the special mnemonic for the BRC opcode */
188 if (m1 == 0) return "brc";
189 if (m1 == 15) return "j";
191 return construct_mnemonic("j", "", m1);
195 /* Return the special mnemonic for the BRCL opcode */
197 brcl_operand(UInt m1)
199 if (m1 == 0) return "brcl";
200 if (m1 == 15) return "jg";
202 return construct_mnemonic("jg", "", m1);
206 /* Return the special mnemonic for a conditional load/store opcode */
208 cls_operand(Int kind, UInt mask)
213 case S390_XMNM_LOCR: prefix = "locr"; break;
214 case S390_XMNM_LOCGR: prefix = "locgr"; break;
215 case S390_XMNM_LOC: prefix = "loc"; break;
216 case S390_XMNM_LOCG: prefix = "locg"; break;
217 case S390_XMNM_STOC: prefix = "stoc"; break;
218 case S390_XMNM_STOCG: prefix = "stocg"; break;
220 vpanic("cls_operand");
223 return construct_mnemonic(prefix, "", mask);
227 /* An operand with a base register, an index register, and a displacement.
228 If the displacement is signed, the rightmost 20 bit of D need to be
231 dxb_operand(HChar *p, UInt d, UInt x, UInt b, Bool displacement_is_signed)
233 if (displacement_is_signed) {
234 Int displ = ((Int)d << 12) >> 12; /* sign extend */
236 p += vex_sprintf(p, "%d", displ);
238 p += vex_sprintf(p, "%u", d);
241 p += vex_sprintf(p, "(%s", gpr_operand(x));
243 p += vex_sprintf(p, ",%s", gpr_operand(b));
245 p += vex_sprintf(p, ")");
248 p += vex_sprintf(p, "(%s)", gpr_operand(b));
256 /* An operand with base register, unsigned length, and a 12-bit
257 unsigned displacement */
259 udlb_operand(HChar *p, UInt d, UInt length, UInt b)
261 p += vex_sprintf(p, "%u", d);
262 p += vex_sprintf(p, "(%u", length + 1); // actual length is +1
264 p += vex_sprintf(p, ",%s", gpr_operand(b));
266 p += vex_sprintf(p, ")");
272 /* The first argument is the command that says how to write the disassembled
273 insn. It is understood that the mnemonic comes first and that arguments
274 are separated by a ','. The command holds the arguments. Each argument is
275 encoded using a 4-bit S390_ARG_xyz value. The first argument is placed
276 in the least significant bits of the command and so on. There are at most
277 5 arguments in an insn and a sentinel (S390_ARG_DONE) is needed to identify
278 the end of the argument list. 6 * 4 = 24 bits are required for the
281 s390_disasm(UInt command, ...)
285 HChar buf[128]; /* holds the disassembled insn */
288 Int mask_suffix = -1;
290 va_start(args, command);
296 argkind = command & 0xF;
299 if (argkind == S390_ARG_DONE) goto done;
301 if (argkind == S390_ARG_CABM) separator = 0; /* optional */
303 /* Write out the separator */
304 if (separator) *p++ = separator;
309 p += vex_sprintf(p, s390_mnm_fmt, va_arg(args, HChar *));
313 case S390_ARG_XMNM: {
317 kind = va_arg(args, UInt);
323 mask = va_arg(args, UInt);
324 mnm = kind == S390_XMNM_BCR ? bcr_operand(mask) : bc_operand(mask);
325 p += vex_sprintf(p, s390_mnm_fmt, mnm);
326 /* mask == 0 is a NOP and has no argument */
327 if (mask == 0) goto done;
332 mask = va_arg(args, UInt);
333 mnm = kind == S390_XMNM_BRC ? brc_operand(mask) : brcl_operand(mask);
334 p += vex_sprintf(p, s390_mnm_fmt, mnm);
336 /* mask == 0 has no special mnemonic */
338 p += vex_sprintf(p, " 0");
344 mnm = va_arg(args, HChar *);
345 mask = va_arg(args, UInt);
346 p += vex_sprintf(p, s390_mnm_fmt, cab_operand(mnm, mask));
350 case S390_XMNM_LOCGR:
354 case S390_XMNM_STOCG:
355 mask = va_arg(args, UInt);
356 mnm = cls_operand(kind, mask);
357 p += vex_sprintf(p, s390_mnm_fmt, mnm);
358 /* There are no special opcodes when mask == 0 or 15. In that case
359 the integer mask is appended as the final operand */
360 if (mask == 0 || mask == 15) mask_suffix = mask;
367 p += vex_sprintf(p, "%s", gpr_operand(va_arg(args, UInt)));
371 p += vex_sprintf(p, "%s", fpr_operand(va_arg(args, UInt)));
375 p += vex_sprintf(p, "%s", ar_operand(va_arg(args, UInt)));
379 p += vex_sprintf(p, "%u", va_arg(args, UInt));
383 p += vex_sprintf(p, "%d", (Int)(va_arg(args, UInt)));
386 case S390_ARG_PCREL: {
387 Int offset = (Int)(va_arg(args, UInt));
389 /* Convert # halfwords to # bytes */
393 p += vex_sprintf(p, ".%d", offset);
395 p += vex_sprintf(p, ".+%u", offset);
400 case S390_ARG_SDXB: {
403 dh = va_arg(args, UInt);
404 dl = va_arg(args, UInt);
405 x = va_arg(args, UInt);
406 b = va_arg(args, UInt);
408 p = dxb_operand(p, (dh << 12) | dl, x, b, 1 /* signed_displacement */);
412 case S390_ARG_UDXB: {
415 d = va_arg(args, UInt);
416 x = va_arg(args, UInt);
417 b = va_arg(args, UInt);
419 p = dxb_operand(p, d, x, b, 0 /* signed_displacement */);
423 case S390_ARG_UDLB: {
426 d = va_arg(args, UInt);
427 l = va_arg(args, UInt);
428 b = va_arg(args, UInt);
430 p = udlb_operand(p, d, l, b);
434 case S390_ARG_CABM: {
437 mask = va_arg(args, UInt) & 0xE;
438 if (mask == 0 || mask == 14) {
439 p += vex_sprintf(p, ",%u", mask);
451 if (mask_suffix != -1)
452 p += vex_sprintf(p, ",%d", mask_suffix);
455 vassert(p < buf + sizeof buf); /* detect buffer overwrite */
457 /* Finally, write out the disassembled insn */
458 vex_printf("%s\n", buf);
461 /*---------------------------------------------------------------*/
462 /*--- end host_s390_disasm.c ---*/
463 /*---------------------------------------------------------------*/