3 mainmenu "Fiasco configuration"
7 option env="KERNELVERSION"
11 option env="INCLUDE_PPC32"
13 Use "INCLUDE_PPC32=y make config" to include ppc32 options.
15 menu "Target configuration"
22 bool "Intel IA-32 processor family"
25 bool "AMD64 processor family"
29 bool "ARM processor family"
32 bool "PowerPC 32 processor family (Caution: INCOMPLETE!)"
33 depends on EXPERIMENTAL && INCLUDE_PPC32
35 PPC32 testing version, mainly for MPC5200 (603e). Currently,
36 there is no support whatsoever.
47 default PF_INTEGRATOR if ARM
49 default PF_PC if AMD64
50 default PF_MP52CXX if PPC32
54 depends on IA32 || AMD64
57 bool "Linux Usermode Platform"
70 config PF_ARM_MP_CAPABLE
72 default y if ARM_MPCORE || ARM_CORTEX_A9
74 config CAN_ARM_CPU_SA1100
77 config CAN_ARM_CPU_XSCALE
80 config CAN_ARM_CPU_920T
83 config CAN_ARM_CPU_926
86 config CAN_ARM_CPU_1136
89 config CAN_ARM_CPU_1176
92 config CAN_ARM_CPU_MPCORE
95 config CAN_ARM_CPU_CORTEX_A8
98 config CAN_ARM_CPU_CORTEX_A9
104 default IA32_686 if IA32
105 default ARM_926 if ARM
106 default AMD64_K8 if AMD64
107 default PPC32_603e if PPC32
114 bool "Intel StrongARM"
118 bool "ARM 920T Processor"
119 depends on PF_S3C2410
122 bool "ARM 926 Processor"
123 depends on CAN_ARM_CPU_926
127 depends on CAN_ARM_CPU_1136
131 depends on CAN_ARM_CPU_1176
134 bool "ARM MPCore CPU"
135 depends on CAN_ARM_CPU_MPCORE
138 bool "ARM Cortex-A8 CPU"
139 depends on CAN_ARM_CPU_CORTEX_A8
142 bool "ARM Cortex-A9 CPU"
143 depends on CAN_ARM_CPU_CORTEX_A9
149 Choose this if you have an Intel 80486 or equivalent CPU (i486).
152 bool "Intel Pentium / AMD K5"
155 Choose this if you have an Intel Pentium or compatible i586 CPU.
158 bool "Intel Pentium Pro"
161 Choose this if you have an Intel Pentium Pro or compatible i686 CPU.
164 bool "Intel Pentium II / Celeron II"
167 Choose this if you have an Intel Pentium II or Pentium II based Celeron.
170 bool "Intel Pentium III / Celeron III"
173 Choose this if you have an Intel Pentium III or Pentium III based Celeron.
176 bool "Intel Pentium 4 / Celeron 4"
179 Choose this if you have an Intel Pentium 4 or Pentium 4 based Celeron.
182 bool "Intel Pentium M"
185 Choose this if you have an Intel Pentium M.
191 Choose this if you have an Intel Core 2.
197 Choose this if you have an Intel Atom.
200 bool "AMD K6 / K6-II / K6-III"
203 Choose this if you have an AMD K6 CPU.
206 bool "AMD Athlon / Duron"
209 Choose this if you have an AMD Athlon or Duron CPU.
212 bool "AMD Opteron / Athlon64"
215 Choose this if you have an AMD Opteron or Athlon64 CPU.
218 bool "AMD Barcelona (K10)"
221 Choose this if you have an AMD Barcelona based CPU.
225 bool "AMD Opteron / Athlon64"
228 Choose this if you have an AMD Opteron or Athlon64 CPU.
234 Choose this if you have an Intel Core 2.
240 Choose this if you have an Intel Atom.
243 bool "AMD Barcelona (K10)"
246 Choose this if you have an AMD Barcelona based CPU.
253 Choose this if you have an PowerPC 603e CPU.
260 bool "Enable CPU virtualization (SVM and VT)"
263 Support virtualization extensions that comes with x86 CPUs,
264 including nested paging. This feature allows you to run a virtual
265 machine monitor (VMM) on top of Fiasco.
267 config ARM_ALIGNMENT_CHECK
268 bool "Enable alignment check"
271 Enable if you want to have alignment check enabled.
274 bool "Enable ARM TrustZone support"
275 depends on (ARM_1176 || ARM_CORTEX_A8 || ARM_CORTEX_A9) && EXPERIMENTAL
277 Support ARM TrustZone security extension.
279 config ARM_CA9_ENABLE_SWP
280 bool "Enable the deprecated 'swp' instruction"
281 depends on ARM_CORTEX_A9
283 Enabling this option enables the deprecated 'swp' instruction.
287 prompt "Timer tick source"
288 depends on PF_PC || PF_UX
292 bool "Use PIT for scheduling"
293 depends on (PF_PC || PF_UX) && !MP
295 Normally, Fiasco uses the RTC at IRQ8 for scheduling. This can be
296 disadvantageous in certain circumstances, e.g. VMWare doesn't seem
297 to emulate the RTC good enough so that not enough timer interrupts
298 are produced. The PIT mode (using IRQ0) seems to work better in
299 this case. It is generally safe to use this option, so if you are
302 Consider that the interrupt priorities change: Using RTC, IRQ8 has
303 the highest priority. Using PIT, IRQ0 has the highest priority.
304 The only case where PIT scheduling does not work is with
305 profiling. If profiling is enabled the PIT is used for generating
306 the profiling interrupts.
309 bool "Use RTC for scheduling"
310 depends on PF_PC && !MP
312 'Yes' is the standard for this option. If this option is set
313 Fiasco uses the RTC on IRQ 8 for scheduling. This can be
314 disadvantageous in certain circumstances, e.g. VMWare doesn't seem
315 to emulate the RTC good enough so that not enough timer interrupts
316 are produced. The PIT (8254) mode (say 'no' here), seems to work
317 better in this case. It is generally safe to use the PIT, so if
318 you are unsure, say 'no'.
319 Consider that the interrupt priorities change: Using RTC, IRQ8 has
320 the highest priority. Using PIT, IRQ0 has the highest priority.
321 The only case where PIT scheduling does not work is with
322 profiling. If profiling is enabled the PIT is used for generating
323 the profiling interrupts and the RTC must be used for scheduling.
324 In the case where profiling shall be used within VMWare the
325 SLOW_RTC option must be set, so that the timer resolution of
326 Fiasco is reduced to 100Hz.
329 bool "Use APIC timer for scheduling"
332 Use the Local APIC for scheduling.
335 bool "Use HPET timer for scheduling (EXPERIMENTAL)"
336 depends on PF_PC && !MP && EXPERIMENTAL
338 Use the HPET timer for scheduling.
342 config WORKAROUND_AMD_FPU_LEAK
343 bool "Enables workaroud for AMD FPU security leak"
346 If you use Fiasco for high assurance, high security and use AMD
347 CPUs you should enable this option. In any other case it is no
351 bool "Compile with regparm=3"
353 depends on IA32 && PF_PC
355 Compile Fiasco with -mregparm=3. This uses a different ABI and
356 passes the first three arguments of a function call in registers.
359 bool "Enable FPU co-processor"
362 Enable this if your platform has hardware floating point support.
364 config ARM_1176_CACHE_ALIAS_FIX
365 bool "Use cache restriction to supress aliasing issue on ARM1176"
368 The ARM1176 processor might have a memory aliasing problem when
369 using cache sizes of more than 16kB cache. Enabling this option
370 enables the workaround of reducing the cache size to 16kB.
374 menu "Kernel options"
377 bool "Enable multi processor support"
378 depends on EXPERIMENTAL && (PF_PC || PF_UX || PF_ARM_MP_CAPABLE)
380 Enable support for machines with multiple processors.
383 int "Maximal supported number of CPUs"
389 The maximum number of CPUs the kernel supports.
391 #config ASSEMBLER_IPC_SHORTCUT
392 # bool "Assembler IPC shortcut"
394 # depends on (PF_PC || PF_UX) && !MP
396 # Use the assembler IPC shortcut to get even better short IPC
397 # performance in the common case.
400 bool #"TCB size of 4k"
403 Use this option to use 4K kernel stacks. Only disable this option
404 when you know what you're doing.
407 bool "Enable I/O port protection"
411 Enabling this option adds I/O port protection to the kernel. That
412 means that every thread starts running at IOPL 0 which means that
413 only the kernel has full access to all I/O ports. This includes
414 the right to set and clear the interrupt flags (that is using cli
415 and sti). Access rights to I/O ports can be mapped like memory. If
416 a task has access to the whole I/O port space, its IOPL is raised
417 to 3 allowing the task to use cli and sti.
419 config IO_PROT_IOPL_3
420 bool "Enable CLI/STI (IOPL 3)"
421 depends on PF_PC && IO_PROT
423 Enable IOPL 3 for tasks with access to all I/O ports, this is the
427 bool "Use RTC with 100 ticks per second"
430 This option should be enabled if you use VMWare and no PIT
431 scheduling. The timer resolution is lowered to 100 ticks per
435 bool "Use scheduling timer in one-shot mode"
436 depends on SCHED_APIC && SYNC_TSC
438 More costly than periodic but more fine-granular scheduling
439 possible. EXPERIMENTAL!
442 bool "Synchronize KIP time with time-stamp counter"
443 depends on PF_PC && IA32
445 Synchronize the internal kernel clock with the CPU time stamp
448 config FINE_GRAINED_CPUTIME
449 bool "Fine-grained CPU time"
451 Measure CPU time consumed by a thread from switching to the thread
452 until switching to another thread. Induces an overhead during each
453 thread switch, so only activate it for debugging.
456 bool "Graphical console (requires SDL library!)"
459 Fiasco-UX can supply a graphical console for the L4 program it is
460 running. Enabling this option will build the additional program
461 but needs the SDL library including development header files
465 bool "Network support"
468 Enabling this option makes Fiasco-UX provide network support for
475 config SCHED_FIXED_PRIO
476 bool "Fixed priority scheduler"
478 Choose this for the standard fixed priority scheduler with
482 bool "Weighted fair queueing scheduler"
483 depends on EXPERIMENTAL
485 Choose this scheduler for a weighted fair queueing scheduler
486 running with dynamic priorities.
489 bool "Combined fixed priority RT and WFQ scheduler"
490 depends on EXPERIMENTAL
492 Combination of Fixed priority and weighted fair queueing
497 config DISABLE_VIRT_OBJ_SPACE
498 bool "No virtually mapped array for cap tables"
499 depends on (PF_PC || ARM) && EXPERIMENTAL
502 endmenu # kernel options
507 bool "Generate inline code"
510 Inlining specifies that it is desirable for the compiler to
511 integrate functions declared 'inline' into the calling routine.
512 This usually leads to faster code, so unless you want to debug the
513 kernel you should say 'Y' here.
516 bool "Do not compile assertions"
518 Don't insert assertions into the code. Should be enabled for
519 kernels which are used for measurements.
522 bool #"Compile with profiling support"
523 depends on EXPERIMENTAL && PF_PC && IA32 && !ASSEMBLER_IPC_SHORTCUT && SCHED_RTC && !NO_FRAME_PTR
525 This option enables support for kernel profiling. This implies
526 that a special CPU lock is used, because profiling IRQ must be
527 enabled even in cases where a CPU lock is locked. So the
528 cpu_lock-pic module is used as implementation for the lock.
529 Further this option does not work with PIT scheduling
530 (CONFIG_SCHED_PIT) because the PIT is used for generating
534 bool "Compile without frame pointer"
537 Enabling this option optimizes for speed but makes debugging more
541 bool "Measure stack depth of threads"
543 When this option is enabled, each thread control block is marked
544 with magic numbers while creation. The function ``show thread
545 lists'' scans the TCB for these magic numbers and shows the
546 currently used depth of each thread.
549 bool "Read-Only Kernel Text and Data"
551 depends on IA32 || AMD64
553 Enable this option to enable read-only mappings for kernel code
554 and ro data. To really map things read only '-rotext' needs to be
555 given to the kernel command line.
556 NOTE: This may significantly increase the memory footprint of the
557 kernel. The use of '-rotext' with extendet logging results in
560 config LIST_ALLOC_SANITY
561 bool "Sanity checks in low level allocator"
563 When this option is enabled the low level memory allocator does
564 extra sanity checks on its data structures before and after every
565 operation. This can halp detect flaws like double frees or memory
566 corruption by other means.
568 These tests are very expensive so only enable them if a problem
569 with memory allocation is expected.
571 config BEFORE_IRET_SANITY
572 bool "Sanity checks at syscall entry/exit"
575 Perform the following additional sanity checks before returning to
577 - Does the thread hold any locks?
578 - Is the thread locked by any other thread?
579 - Does the thread have the right state:
580 * Thread_ready must be set.
581 * Thread_cancel and Thread_fpu_owner might be set.
582 * Any other state bit must not be set.
583 Don't use Fiasco compiled with this option for performance analysis!
586 bool "Compile with gstabs+ debugging information"
589 Enabling this option includes the debugging information using the
590 older gstabs+ format into the kernel image. This is necessary to
591 access line number information of the kernel from JDB.
594 bool "Display IRQ activity on VGA screen"
597 Display IRQ activity on VGA screen.
600 bool "Enable Watchdog support"
604 Enable support for watchdog using the builtin Local APIC and a
605 performance counter. The watchdog can be enabled using the
606 -watchdog command line option.
609 bool "Support for debugging over serial line"
610 depends on PF_PC || ARM || PPC32
613 This option enables support for input/output over serial interface.
616 bool "JDB kernel debugger"
619 The powerful Fiasco kernel debugger.
624 bool "JDB extended logging"
626 There are two classes of logging events: Basic events don't
627 consume any time if they are disabled (ipc, ipc result,
628 pagefaults, unmap). Extended logging events add an additional
629 overhead of most probably less than 10 cycles if they are
630 disabled. These events can be activated/deactivated by the 'O'
633 Should be disabled for kernels which are used for measurements.
636 bool "JDB disassembler"
640 Add support for disassembly. Increases memory foot-print, only
644 bool "GZIP compressed dumps"
648 Add supprt for gzip compressed dumps of the trace buffer.
649 Increases memory foot-print, only enabled when needed.
651 config JDB_ACCOUNTING
652 bool "JDB accounting"
655 Enable accounting information about IPCs, context switches, page
656 faults, and other events. The counters are accessible from
657 userland through the tbuf status page.
659 Should be disabled for kernels which are used for measurements.
662 bool "Miscellaneous JDB modules"
663 depends on PF_UX || PF_PC
668 config VMEM_ALLOC_TEST
669 bool "Run test for Vmem_alloc allocator"
672 config DEBUG_KERNEL_PAGE_FAULTS
673 bool "Debugging of kernel page-faults"
676 This option enables logging of kernel page-faults (aka page faults
677 from kernel mode). The page faults are logged to the normal
678 console in the format *KP[pfa, error_code, ip].
680 config POWERSAVE_GETCHAR
681 bool "Save power in getchar()"
685 This option uses a processor HALT in getchar() to save power and
686 prevent some P4 processors from being overheated. This option
687 requires a working timer IRQ to wakeup getchar periodically.
694 bool "Do not show show any kernel warning"
697 bool "Show messages of warning level"
700 bool "Show all kernel warnings"
702 endchoice # warn levels
712 Use this option to override the default C compiler (gcc).
715 string "C++ compiler"
718 Use this option to override the default C++ compiler (g++).
721 string "C host compiler"
724 Use this option to override the default C host compiler (gcc).
727 string "C++ host compiler"
730 Use this option to override the default C++ host compiler (g++).
733 bool "Verbose build process"
735 When enabled, this config option allows you to see more details of
738 config MAINTAINER_MODE
739 bool "Do additional checks at build time"
741 This enables the circular dependency and initcall checks.
742 Say 'Yes' here if you do kernel hacking.
745 string "Configuration label"
747 Text string with a name for this configuration. To be displayed in
753 bool "Prompt for experimental features"
755 Experimental features are available when enabling this option.
756 Enabling these features might be less than fully secure and may
757 disrupt the stability of your kernel.
762 def_bool y if JDB && (IA32 || AMD64 || ARM)
765 def_bool y if ARM || IA32 || PPC32
771 def_bool y if ARM_1136 || ARM_1176 || ARM_MPCORE
774 def_bool y if ARM_CORTEX_A8 || ARM_CORTEX_A9
777 def_bool y if ARM_V6 || ARM_V7
781 default 2 if WARN_ANY
782 default 1 if WARN_WARNING
783 default 0 if WARN_NONE
788 default "ux" if PF_UX
789 default "amd64" if AMD64 && PF_PC
790 default "ia32" if IA32 && PF_PC
791 default "ppc32" if PPC32
795 default "Intel 80486" if IA32_486
796 default "Intel Pentium" if IA32_586
797 default "Intel Pentium Pro" if IA32_686
798 default "Intel Pentium II" if IA32_P2
799 default "Intel Pentium III" if IA32_P3
800 default "Intel Pentium 4" if IA32_P4
801 default "Pentium M" if IA32_PM
802 default "AMD K6" if IA32_K6
803 default "AMD Athlon" if IA32_K7
804 default "Intel Core2" if IA32_CORE2 || AMD64_CORE2
805 default "Intel Atom" if IA32_ATOM || AMD64_ATOM
806 default "AMD Opteron" if IA32_K8 || AMD64_K8 || AMD64_K10 || IA32_K10