1 INTERFACE [arm && mp && tegra2]:
3 #include "mem_layout.h"
5 EXTENSION class Platform_control
10 Reset_vector_addr = Mem_layout::Devices1_map_base + 0xf100,
11 Clk_rst_ctrl_clk_cpu_cmplx = Mem_layout::Devices1_map_base + 0x604c,
12 Clk_rst_ctrl_rst_cpu_cmplx_clr = Mem_layout::Devices1_map_base + 0x6344,
13 Unhalt_addr = Mem_layout::Devices1_map_base + 0x7014,
16 static Mword _orig_reset_vector;
19 IMPLEMENTATION [arm && mp && tegra2]:
24 Mword Platform_control::_orig_reset_vector;
27 void Platform_control::reset_orig_reset_vector()
29 Io::write<Mword>(_orig_reset_vector, Reset_vector_addr);
34 Platform_control::boot_ap_cpus(Address phys_reset_vector)
36 // remember original reset vector
37 _orig_reset_vector = Io::read<Mword>(Reset_vector_addr);
39 // set (temporary) new reset vector
40 Io::write<Mword>(phys_reset_vector, Reset_vector_addr);
42 atexit(reset_orig_reset_vector);
44 // clocks on other cpu
45 Mword r = Io::read<Mword>(Clk_rst_ctrl_clk_cpu_cmplx);
46 Io::write<Mword>(r & ~(1 << 9), Clk_rst_ctrl_clk_cpu_cmplx);
47 Io::write<Mword>((1 << 13) | (1 << 9) | (1 << 5) | (1 << 1),
48 Clk_rst_ctrl_rst_cpu_cmplx_clr);
51 Io::write<Mword>(0, Unhalt_addr);