kernel/fiasco/src/kern/arm/bsp/tegra2/boot_mp-arm-tegra2.cpp

   1 INTERFACE [arm && mp && tegra2]:
   2
   3 #include "mem_layout.h"
   4
   5 class Boot_mp
   6 {
   7 private:
   8   enum
   9   {
  10     Reset_vector_addr              = Mem_layout::Devices1_map_base + 0xf100,
  11     Clk_rst_ctrl_clk_cpu_cmplx     = Mem_layout::Devices1_map_base + 0x604c,
  12     Clk_rst_ctrl_rst_cpu_cmplx_clr = Mem_layout::Devices1_map_base + 0x6344,
  13     Unhalt_addr                    = Mem_layout::Devices1_map_base + 0x7014,
  14   };
  15
  16   Mword _orig_reset_vector;
  17 };
  18
  19 IMPLEMENTATION [arm && mp && tegra2]:
  20
  21 #include "io.h"
  22
  23 PUBLIC
  24 void
  25 Boot_mp::start_ap_cpus(Address phys_reset_vector)
  26 {
  27   // remember original reset vector
  28   _orig_reset_vector = Io::read<Mword>(Reset_vector_addr);
  29
  30   // set (temporary) new reset vector
  31   Io::write<Mword>(phys_reset_vector, Reset_vector_addr);
  32
  33   // clocks on other cpu
  34   Mword r = Io::read<Mword>(Clk_rst_ctrl_clk_cpu_cmplx);
  35   Io::write<Mword>(r & ~(1 << 9), Clk_rst_ctrl_clk_cpu_cmplx);
  36   Io::write<Mword>((1 << 13) | (1 << 9) | (1 << 5) | (1 << 1),
  37                    Clk_rst_ctrl_rst_cpu_cmplx_clr);
  38
  39   // kick cpu1
  40   Io::write<Mword>(0, Unhalt_addr);
  41 }
  42
  43 PUBLIC
  44 void
  45 Boot_mp::cleanup()
  46 {
  47   Io::write<Mword>(_orig_reset_vector, Reset_vector_addr);
  48 }