kernel/fiasco/src/kern/arm/bsp/integrator/pic-arm-integrator.cpp

   1 // ---------------------------------------------------------------------
   2 INTERFACE [arm-integrator]:
   3
   4 #include "kmem.h"
   5
   6 class Irq_base;
   7
   8 EXTENSION class Pic
   9 {
  10 public:
  11   enum
  12   {
  13     Multi_irq_pending = 1,
  14     No_irq_pending = 0,
  15   };
  16
  17   enum
  18   {
  19     IRQ_STATUS       = Kmem::Pic_map_base + 0x00,
  20     IRQ_ENABLE_SET   = Kmem::Pic_map_base + 0x08,
  21     IRQ_ENABLE_CLEAR = Kmem::Pic_map_base + 0x0c,
  22
  23     FIQ_ENABLE_CLEAR = Kmem::Pic_map_base + 0x2c,
  24
  25     PIC_START = 0,
  26     PIC_END   = 31,
  27   };
  28 };
  29
  30 // ---------------------------------------------------------------------
  31 IMPLEMENTATION [arm && integrator]:
  32
  33 #include "boot_info.h"
  34 #include "config.h"
  35 #include "initcalls.h"
  36 #include "io.h"
  37 #include "irq.h"
  38 #include "irq_pin.h"
  39 #include "irq_chip_generic.h"
  40 #include "vkey.h"
  41
  42 class Integr_pin : public Irq_pin
  43 {
  44 public:
  45   explicit Integr_pin(unsigned irq) { payload()[0] = irq; }
  46   unsigned irq() const { return payload()[0]; }
  47 };
  48
  49 class Irq_chip_arm_integr : public Irq_chip_gen
  50 {
  51 };
  52
  53 PUBLIC
  54 void
  55 Irq_chip_arm_integr::setup(Irq_base *irq, unsigned irqnum)
  56 {
  57   irq->pin()->replace<Integr_pin>(irqnum);
  58 }
  59
  60 PUBLIC
  61 void
  62 Integr_pin::unbind_irq()
  63 {
  64   mask();
  65   disable();
  66   Irq_chip::hw_chip->free(Irq::self(this), irq());
  67   replace<Sw_irq_pin>();
  68 }
  69
  70 PUBLIC
  71 void
  72 Integr_pin::do_mask()
  73 {
  74   assert (cpu_lock.test());
  75   Io::write(1 << (irq() - Pic::PIC_START), Pic::IRQ_ENABLE_CLEAR);
  76 }
  77
  78 PUBLIC
  79 void
  80 Integr_pin::do_mask_and_ack()
  81 {
  82   assert (cpu_lock.test());
  83   __mask();
  84   Io::write(1 << (irq() - Pic::PIC_START), Pic::IRQ_ENABLE_CLEAR);
  85   // ack is empty
  86 }
  87
  88 PUBLIC
  89 void
  90 Integr_pin::ack()
  91 {
  92   // ack is empty
  93 }
  94 PUBLIC
  95 void
  96 Integr_pin::hit()
  97 {
  98   Irq::self(this)->Irq::hit();
  99 }
 100
 101 PUBLIC
 102 void
 103 Integr_pin::do_unmask()
 104 {
 105   assert (cpu_lock.test());
 106   Io::write(1 << (irq() - Pic::PIC_START), Pic::IRQ_ENABLE_SET);
 107 }
 108
 109 PUBLIC
 110 void
 111 Integr_pin::do_set_mode(unsigned)
 112 {
 113 }
 114
 115
 116 PUBLIC
 117 bool
 118 Integr_pin::check_debug_irq()
 119 {
 120   return !Vkey::check_(irq());
 121 }
 122
 123 PUBLIC
 124 void
 125 Integr_pin::set_cpu(unsigned)
 126 {
 127 }
 128
 129
 130 IMPLEMENT FIASCO_INIT
 131 void Pic::init()
 132 {
 133   static Irq_chip_arm_integr _ia;
 134   Irq_chip::hw_chip = &_ia;
 135   Io::write(0xffffffff, IRQ_ENABLE_CLEAR);
 136   Io::write(0xffffffff, FIQ_ENABLE_CLEAR);
 137 }
 138
 139
 140 IMPLEMENT inline
 141 Pic::Status Pic::disable_all_save()
 142 {
 143   Status s = 0;
 144   return s;
 145 }
 146
 147 IMPLEMENT inline
 148 void Pic::restore_all( Status /*s*/ )
 149 {
 150 }
 151
 152 PUBLIC static inline NEEDS["io.h"]
 153 Unsigned32 Pic::pending()
 154 {
 155   return Io::read<Mword>(IRQ_STATUS);
 156 }
 157
 158 PUBLIC static inline
 159 Mword Pic::is_pending(Mword &irqs, Mword irq)
 160 {
 161   Mword ret = irqs & (1 << irq);
 162   irqs &= ~(1 << irq);
 163   return ret;
 164 }
 165
 166 //---------------------------------------------------------------------------
 167 IMPLEMENTATION [debug && integrator]:
 168
 169 PUBLIC
 170 char const *
 171 Integr_pin::pin_type() const
 172 { return "HW Integrator IRQ"; }
 173