8 #include "dirq_pic_pin.h"
10 #include "static_init.h"
12 class Irq_pin_msi : public Irq_pin
20 explicit Irq_pin_msi(unsigned vect) { payload()[0] = vect; }
21 unsigned vector() const { return payload()[0]; }
25 class Irq_chip_msi : public Dirq_pic_pin::Chip
28 void disable_irq(unsigned irqnum);
33 Irq_chip_msi::nr_irqs() const
34 { return APIC_IRQ_BASE - 0x10 - Irq_pin_msi::Vector_offs; }
38 Irq_chip_msi::msg(unsigned irqn)
39 { return irqn + Irq_pin_msi::Vector_offs; }
43 Irq_chip_msi::setup(Irq_base *irq, unsigned irqnum)
45 unsigned v = irqnum + Irq_pin_msi::Vector_offs;
46 if (v >= APIC_IRQ_BASE - 0x10)
49 irq->pin()->replace<Irq_pin_msi>(v);
54 Irq_chip_msi::irq(unsigned irqnum)
56 unsigned v = irqnum + Irq_pin_msi::Vector_offs;
57 if (v >= APIC_IRQ_BASE - 0x10)
65 Irq_chip_msi::disable_irq(unsigned vector)
67 extern char entry_int_apic_ignore[];
68 Idt::set_entry(vector, Address(&entry_int_apic_ignore), false);
73 Irq_chip_msi::alloc(Irq_base *irq, unsigned irqnum)
75 unsigned v = irqnum + Irq_pin_msi::Vector_offs;
85 Irq_chip_msi::free(Irq_base *irq, unsigned irqnum)
87 return vfree(irq, irqnum + Irq_pin_msi::Vector_offs);
91 PUBLIC static FIASCO_INIT
95 static Irq_chip_msi _ia;
96 Irq_chip::hw_chip_msi = &_ia;
97 for (unsigned i = 0; i < _ia.nr_irqs(); ++i)
98 _ia.disable_irq(i + Irq_pin_msi::Vector_offs);
101 STATIC_INITIALIZE(Irq_chip_msi);
106 Irq_pin_msi::do_mask()
111 Irq_pin_msi::do_unmask()
116 Irq_pin_msi::do_mask_and_ack()
123 Irq_pin_msi::do_set_mode(unsigned)
135 Irq_pin_msi::set_cpu(unsigned)
140 Irq_pin_msi::unbind_irq()
142 Irq_chip::hw_chip_msi->free(Irq::self(this), vector() - Vector_offs);
143 replace<Sw_irq_pin>();
146 //--------------------------------------------------------------------------
147 IMPLEMENTATION [debug]:
151 Irq_pin_msi::pin_type() const
152 { return "HW IRQ (MSI)"; }