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[l4.git] / kernel / fiasco / src / kern / arm / bsp / realview / pic-arm-realview.cpp
1 INTERFACE [arm && realview]:
2
3 #include "gic.h"
4 #include "kmem.h"
5
6 class Irq_base;
7
8 EXTENSION class Pic
9 {
10 public:
11   enum
12   {
13     Multi_irq_pending = 0,
14
15     No_irq_pending = 1023,
16   };
17
18 private:
19   static Gic gic[2];
20 };
21
22 //-------------------------------------------------------------------
23 INTERFACE [arm && realview && (mpcore || armca9)]:
24
25 EXTENSION class Pic
26 {
27 private:
28   enum
29   {
30     INTMODE_NEW_NO_DDC = 1 << 23,
31   };
32 };
33
34 //-------------------------------------------------------------------
35 IMPLEMENTATION [arm && !(mpcore || armca9)]:
36
37 PRIVATE static inline
38 void Pic::configure_core()
39 {}
40
41 PUBLIC static inline
42 bool Pic::is_ipi(unsigned)
43 { return 0; }
44
45 //-------------------------------------------------------------------
46 IMPLEMENTATION [arm && pic_gic]:
47
48 #include <cstring>
49 #include <cstdio>
50
51 #include "config.h"
52 #include "initcalls.h"
53 #include "irq_chip.h"
54
55 Gic Gic_pin::_gic[2];
56
57 //-------------------------------------------------------------------
58 IMPLEMENTATION [arm && pic_gic && realview && (realview_pb11mp || (realview_eb && (mpcore || (armca9 && mp))))]:
59
60 PRIVATE static inline
61 void
62 Pic::init_gic_other()
63 {
64   Gic_pin::_gic[1].init(Kmem::Gic1_cpu_map_base,
65                         Kmem::Gic1_dist_map_base);
66 }
67
68 //-------------------------------------------------------------------
69 IMPLEMENTATION [arm && pic_gic && realview && realview_pbx]:
70
71 PRIVATE static inline
72 void
73 Pic::init_gic_other()
74 {
75   Gic_pin::_gic[1].init(Kmem::Gic2_cpu_map_base,
76                         Kmem::Gic2_dist_map_base);
77 }
78
79 //-------------------------------------------------------------------
80 IMPLEMENTATION [arm && pic_gic && realview && (realview_pbx || realview_pb11mp || (realview_eb && (mpcore || (armca9 && mp))))]:
81
82 #include "irq_chip_generic.h"
83
84 class Irq_chip_arm_rv : public Irq_chip_gen
85 {
86 };
87
88 PUBLIC
89 void
90 Irq_chip_arm_rv::setup(Irq_base *irq, unsigned irqnum)
91 {
92   if (irqnum < 64)
93     irq->pin()->replace<Gic_pin>(0, irqnum);
94   else if (irqnum < 96)
95     irq->pin()->replace<Gic_pin>(1, irqnum - 32);
96 }
97
98 PRIVATE static inline
99 void
100 Pic::init_other_gics()
101 {
102   init_gic_other();
103
104   static Gic_cascade_irq casc_irq(&Gic_pin::_gic[1], 32);
105
106   Irq_chip::hw_chip->alloc(&casc_irq, 42);
107
108   casc_irq.pin()->replace<Gic_cascade_pin>(0, 42);
109   casc_irq.pin()->unmask();
110 }
111
112 //-------------------------------------------------------------------
113 IMPLEMENTATION [arm && pic_gic && !(realview && (realview_pbx || realview_pb11mp || (realview_eb && (mpcore || (armca9 && mp)))))]:
114
115 #include "irq_chip_generic.h"
116
117 class Irq_chip_arm_rv : public Irq_chip_gen
118 {
119 };
120
121 PUBLIC
122 void
123 Irq_chip_arm_rv::setup(Irq_base *irq, unsigned irqnum)
124 {
125   if (irqnum < 64)
126     irq->pin()->replace<Gic_pin>(0, irqnum);
127 }
128
129 PRIVATE static inline
130 void
131 Pic::init_other_gics()
132 {}
133
134 //-------------------------------------------------------------------
135 IMPLEMENTATION [arm && pic_gic]:
136
137 IMPLEMENT FIASCO_INIT
138 void Pic::init()
139 {
140   configure_core();
141
142   static Irq_chip_arm_rv _ia;
143   Irq_chip::hw_chip = &_ia;
144
145   Gic_pin::_gic[0].init(Kmem::Gic_cpu_map_base, Kmem::Gic_dist_map_base);
146
147   init_other_gics();
148 }
149
150 IMPLEMENT inline
151 Pic::Status Pic::disable_all_save()
152 { return 0; }
153
154 IMPLEMENT inline
155 void Pic::restore_all( Status /*s*/ )
156 {}
157
158 PUBLIC static inline
159 Unsigned32 Pic::pending()
160 {
161   return Gic_pin::_gic[0].pending();
162 }
163
164 PUBLIC static inline
165 Mword Pic::is_pending(Mword &irqs, Mword irq)
166 { return irqs == irq; }
167
168 //-------------------------------------------------------------------
169 IMPLEMENTATION [arm && mp && pic_gic]:
170
171 PUBLIC static
172 void Pic::init_ap()
173 {
174   Gic_pin::_gic[0].init_ap();
175   Gic_pin::_gic[1].init_ap();
176 }
177
178 //-------------------------------------------------------------------
179 IMPLEMENTATION [arm && pic_gic && (mpcore || armca9)]:
180
181 #include "cpu.h"
182 #include "io.h"
183 #include "platform.h"
184
185 PRIVATE static
186 void Pic::unlock_config()
187 { Io::write<Mword>(0xa05f, Platform::Sys::Lock); }
188
189 PRIVATE static
190 void Pic::lock_config()
191 { Io::write<Mword>(0x0, Platform::Sys::Lock); }
192
193 PRIVATE static
194 void Pic::configure_core()
195 {
196   // Enable 'new' interrupt-mode, no DCC
197   unlock_config();
198   Io::write<Mword>(Io::read<Mword>(Platform::Sys::Pld_ctrl1) | INTMODE_NEW_NO_DDC,
199                    Platform::Sys::Pld_ctrl1);
200   lock_config();
201 }