kernel/fiasco/src/kern/arm/kern_lib_page.cpp

   1 INTERFACE [arm]:
   2
   3 class Kern_lib_page
   4 {
   5 public:
   6   static void init();
   7 };
   8
   9
  10 //---------------------------------------------------------------------------
  11 IMPLEMENTATION [arm]:
  12
  13 #include <panic.h>
  14
  15 #include "kmem_space.h"
  16 #include "pagetable.h"
  17 #include "ram_quota.h"
  18
  19 IMPLEMENT
  20 void Kern_lib_page::init()
  21 {
  22   extern char kern_lib_start;
  23
  24   Pte pte = Kmem_space::kdir()->walk((void*)Kmem_space::Kern_lib_base,
  25       Config::PAGE_SIZE, true, Ram_quota::root);
  26
  27   if (pte.lvl() == 0) // allocation of second level faild
  28     {
  29       panic("FATAL: Error mapping cpu page to %p\n",
  30             (void*)Kmem_space::Kern_lib_base);
  31     }
  32
  33   pte.set((Address)&kern_lib_start - Mem_layout::Map_base
  34       + Mem_layout::Sdram_phys_base,
  35       Config::PAGE_SIZE, Mem_page_attr(Page::USER_RO | Page::CACHEABLE), true);
  36
  37 }
  38
  39 //---------------------------------------------------------------------------
  40 IMPLEMENTATION [arm && !armv6plus]:
  41
  42 asm (
  43     ".p2align(12)                        \n"
  44     "kern_lib_start:                     \n"
  45
  46     // atomic add
  47     // r0: memory reference
  48     // r1: delta value
  49     "  ldr r2, [r0]                      \n"
  50     "  add r2, r2, r1                    \n"
  51     "  nop                               \n"
  52     "  str r2, [r0]                      \n"
  53     // forward point
  54     "  mov r0, r2                        \n"
  55     "  mov pc, lr                        \n"
  56     // return: always succeeds, new value
  57
  58     // compare exchange
  59     // r0: memory reference
  60     // r1: cmp value
  61     // r2: new value
  62     ".p2align(8)                         \n"
  63     "  ldr r3, [r0]                      \n"
  64     "  cmp r3, r1                        \n"
  65     "  nop                               \n"
  66     "  streq r2, [r0]                    \n"
  67     // forward point
  68     "  moveq r0, #1                      \n"
  69     "  movne r0, #0                      \n"
  70     "  mov pc, lr                        \n"
  71     // return result: 1 success, 0 failure
  72     );
  73
  74 //---------------------------------------------------------------------------
  75 IMPLEMENTATION [arm && armv6plus]:
  76
  77 asm (
  78     ".p2align(12)                        \n"
  79     "kern_lib_start:                     \n"
  80
  81     // no restart through kernel entry code
  82
  83     // atomic add
  84     // r0: memory reference
  85     // r1: delta value
  86     // r2: temp register
  87     // r3: temp register
  88     " 1:                                 \n"
  89     " ldrex r2, [r0]                     \n"
  90     " add   r2, r2, r1                   \n"
  91     " strex r3, r2, [r0]                 \n"
  92     " teq r3, #0                         \n"
  93     " bne 1b                             \n"
  94     " mov r0, r2                         \n"
  95     " mov pc, lr                         \n"
  96     // return: always succeeds, new value
  97
  98
  99     // compare exchange
 100     // r0: memory reference
 101     // r1: cmp value
 102     // r2: new value
 103     // r3: tmp reg
 104     ".p2align(8)                         \n"
 105     "  ldrex r3, [r0]                    \n"
 106     "  cmp r3, r1                        \n"
 107     "  strexeq r3, r2, [r0]              \n"
 108     "  teqeq r3, #0                      \n"
 109     "  moveq r0, #1                      \n"
 110     "  movne r0, #0                      \n"
 111     "  mov pc, lr                        \n"
 112     // return result: 1 success, 0 failure
 113     );