kernel/fiasco/src/kern/arm/bsp/kirkwood/timer-arm-kirkwood.cpp

   1 // --------------------------------------------------------------------------
   2 INTERFACE [arm && kirkwood]:
   3
   4 #include "kmem.h"
   5 #include "irq_chip.h"
   6
   7 EXTENSION class Timer
   8 {
   9 private:
  10   enum {
  11     Control_Reg  = Mem_layout::Reset_map_base + 0x20300,
  12     Reload0_Reg  = Mem_layout::Reset_map_base + 0x20310,
  13     Timer0_Reg   = Mem_layout::Reset_map_base + 0x20314,
  14     Reload1_Reg  = Mem_layout::Reset_map_base + 0x20318,
  15     Timer1_Reg   = Mem_layout::Reset_map_base + 0x2031c,
  16
  17     Bridge_cause = Mem_layout::Reset_map_base + 0x20110,
  18     Bridge_mask  = Mem_layout::Reset_map_base + 0x20114,
  19
  20     Timer0_enable = 1 << 0,
  21     Timer0_auto   = 1 << 1,
  22
  23     Timer0_bridge_num = 1 << 1,
  24     Timer1_bridge_num = 1 << 2,
  25
  26     Reload_value = 200000,
  27   };
  28 private:
  29   static Irq_base *irq;
  30 };
  31
  32 // ----------------------------------------------------------------------
  33 IMPLEMENTATION [arm && kirkwood]:
  34
  35 #include "config.h"
  36 #include "kip.h"
  37 #include "irq_chip.h"
  38 #include "irq_pin.h"
  39 #include "io.h"
  40
  41 #include <cstdio>
  42
  43 Irq_base *Timer::irq;
  44
  45 IMPLEMENT
  46 void Timer::init()
  47 {
  48   // Disable timer
  49   Io::write(0, Control_Reg);
  50
  51   // Set current timer value and reload value
  52   Io::write<Mword>(Reload_value, Timer0_Reg);
  53   Io::write<Mword>(Reload_value, Reload0_Reg);
  54
  55   Irq_chip::hw_chip->reserve(Config::Scheduling_irq);
  56
  57   static Irq_base ib;
  58   Irq_chip::hw_chip->setup(&ib, Config::Scheduling_irq);
  59   irq = &ib;
  60
  61   Io::set<Mword>(Timer0_enable | Timer0_auto, Control_Reg);
  62 }
  63
  64 static inline
  65 Unsigned64
  66 Timer::timer_to_us(Unsigned32 /*cr*/)
  67 { return 0; }
  68
  69 static inline
  70 Unsigned64
  71 Timer::us_to_timer(Unsigned64 us)
  72 { (void)us; return 0; }
  73
  74 IMPLEMENT inline NEEDS["io.h"]
  75 void Timer::acknowledge()
  76 {
  77   Io::clear<Unsigned32>(Timer0_bridge_num, Bridge_cause);
  78 }
  79
  80 IMPLEMENT inline NEEDS["irq_pin.h"]
  81 void Timer::enable()
  82 {
  83   Io::set<Unsigned32>(Timer0_bridge_num, Bridge_mask);
  84   irq->pin()->unmask();
  85 }
  86
  87 IMPLEMENT inline NEEDS["irq_pin.h"]
  88 void Timer::disable()
  89 {
  90   Io::clear<Unsigned32>(Timer0_bridge_num, Bridge_mask);
  91   irq->pin()->mask();
  92 }
  93
  94 IMPLEMENT inline NEEDS["kip.h", "io.h", Timer::timer_to_us, Timer::us_to_timer]
  95 void
  96 Timer::update_one_shot(Unsigned64 /*wakeup*/)
  97 {
  98 }
  99
 100 IMPLEMENT inline NEEDS["config.h", "kip.h", "io.h", Timer::timer_to_us]
 101 Unsigned64
 102 Timer::system_clock()
 103 {
 104   if (Config::scheduler_one_shot)
 105     return 0;
 106   return Kip::k()->clock;
 107 }