1 IMPLEMENTATION [ia32 || amd64]:
8 Timer_tick::setup(unsigned)
13 Timer_tick::enable(unsigned)
15 Apic::timer_enable_irq();
21 Timer_tick::disable(unsigned)
23 Apic::timer_disable_irq();
26 PUBLIC static inline NEEDS["apic.h"]
35 Timer_tick::set_vectors_stop()
37 extern char entry_int_timer_stop[];
38 // acknowledge timer interrupt once to keep timer interrupt alive because
39 // we could be called from thread_timer_interrupt_slow() before ack
42 // set timer interrupt to dummy doing nothing
43 Idt::set_entry(Config::scheduler_irq_vector, (Address)entry_int_timer_stop, false);
45 // From ``8259A PROGRAMMABLE INTERRUPT CONTROLLER (8259A 8259A-2)'': If no
46 // interrupt request is present at step 4 of either sequence (i. e. the
47 // request was too short in duration) the 8259A will issue an interrupt
48 // level 7. Both the vectoring bytes and the CAS lines will look like an
49 // interrupt level 7 was requested.
50 set_entry(0x27, (Address)entry_int_pic_ignore, false);
51 set_entry(0x2f, (Address)entry_int_pic_ignore, false);
55 // We are entering with disabled interrupts!
56 extern "C" FIASCO_FASTCALL
58 thread_timer_interrupt(Address ip)
61 Timer_tick::handler_all(0, 0); //Timer_tick::_glbl_timer);
64 /** Extra version of timer interrupt handler which is used when the jdb is
65 active to prevent busy waiting. */
68 thread_timer_interrupt_stop(void)