kernel/fiasco/src/kern/arm/bsp/omap/mem_layout-arm-omap.cpp

   1 INTERFACE [arm && omap3_35x]: //-------------------------------------------
   2
   3 EXTENSION class Mem_layout
   4 {
   5 public:
   6   enum Phys_layout_omap3_35x : Address {
   7     Wkup_cm_phys_base        = 0x48004c00,
   8     L4_addr_prot_phys_base   = 0x48040000,
   9     Uart1_phys_base          = 0x4806a000,
  10     Gptimer10_phys_base      = 0x48086000,
  11
  12     Intc_phys_base           = 0x48200000,
  13
  14     Prm_global_reg_phys_base = 0x48307200,
  15     Timer1ms_phys_base       = 0x48318000,
  16
  17     Uart3_phys_base          = 0x49020000,
  18   };
  19 };
  20
  21 INTERFACE [arm && omap3_35xevm]: //----------------------------------------
  22
  23 EXTENSION class Mem_layout
  24 {
  25 public:
  26   enum Phys_layout_omap3_35xevm : Address {
  27     Uart_phys_base           = Uart1_phys_base,
  28   };
  29 };
  30
  31 INTERFACE [arm && omap3_beagleboard]: //-----------------------------------
  32
  33 EXTENSION class Mem_layout
  34 {
  35 public:
  36   enum Phys_layout_omap3_beagleboard : Address {
  37     Uart_phys_base           = Uart3_phys_base,
  38   };
  39 };
  40
  41 INTERFACE [arm && omap3_am33xx]: //----------------------------------------
  42
  43 EXTENSION class Mem_layout
  44 {
  45 public:
  46   enum Phys_layout_omap3_335x : Address {
  47     Cm_per_phys_base         = 0x44e00000,
  48     Cm_wkup_phys_base        = 0x44e00400,
  49     Cm_dpll_phys_base        = 0x44e00500,
  50     Timergen_phys_base       = 0x44e05000, // DMTIMER0
  51     Timer1ms_phys_base       = 0x44e31000,
  52     Uart1_phys_base          = 0x44e09000,
  53     Prm_global_reg_phys_base = 0x48107200,
  54     Intc_phys_base           = 0x48200000,
  55     Uart_phys_base           = Uart1_phys_base,
  56   };
  57 };
  58
  59 INTERFACE [arm && omap4]: //-----------------------------------------------
  60
  61 EXTENSION class Mem_layout
  62 {
  63 public:
  64   enum Phys_layout_omap4_pandaboard : Address {
  65     Uart_phys_base          = 0x48020000,
  66     Mp_scu_phys_base        = 0x48240000,
  67     Gic_cpu_phys_base       = 0x48240100,
  68     Gic_dist_phys_base      = 0x48241000,
  69     L2cxx0_phys_base        = 0x48242000,
  70
  71     __Timer                 = 0x48240600,
  72
  73     Prm_phys_base           = 0x4a306000,
  74   };
  75 };