kernel/fiasco/src/kern/arm/bsp/integrator/pic-arm-integrator.cpp

   1 // ---------------------------------------------------------------------
   2 IMPLEMENTATION [arm && integrator]:
   3
   4 #include "assert.h"
   5 #include "initcalls.h"
   6 #include "irq_chip_generic.h"
   7 #include "irq_mgr.h"
   8 #include "mmio_register_block.h"
   9 #include "kmem.h"
  10
  11 class Irq_chip_arm_integr : public Irq_chip_gen, Mmio_register_block
  12 {
  13 private:
  14   enum
  15   {
  16     IRQ_STATUS       = 0x00,
  17     IRQ_ENABLE_SET   = 0x08,
  18     IRQ_ENABLE_CLEAR = 0x0c,
  19
  20     FIQ_ENABLE_CLEAR = 0x2c,
  21
  22     PIC_START = 0,
  23     PIC_END   = 31,
  24   };
  25
  26 public:
  27   unsigned set_mode(Mword, unsigned) { return Irq_base::Trigger_level; }
  28   void set_cpu(Mword, Cpu_number) {}
  29   void ack(Mword) { /* ack is empty */ }
  30 };
  31
  32 PUBLIC
  33 Irq_chip_arm_integr::Irq_chip_arm_integr()
  34 : Irq_chip_gen(32),
  35   Mmio_register_block(Kmem::mmio_remap(Mem_layout::Pic_phys_base))
  36 {
  37   write<Mword>(0xffffffff, IRQ_ENABLE_CLEAR);
  38   write<Mword>(0xffffffff, FIQ_ENABLE_CLEAR);
  39 }
  40
  41 PUBLIC
  42 void
  43 Irq_chip_arm_integr::mask(Mword irq)
  44 {
  45   assert(cpu_lock.test());
  46   write<Mword>(1 << (irq - PIC_START), IRQ_ENABLE_CLEAR);
  47 }
  48
  49 PUBLIC
  50 void
  51 Irq_chip_arm_integr::mask_and_ack(Mword irq)
  52 {
  53   assert(cpu_lock.test());
  54   write<Mword>(1 << (irq - PIC_START), IRQ_ENABLE_CLEAR);
  55   // ack is empty
  56 }
  57
  58 PUBLIC
  59 void
  60 Irq_chip_arm_integr::unmask(Mword irq)
  61 {
  62   assert(cpu_lock.test());
  63   write<Mword>(1 << (irq - PIC_START), IRQ_ENABLE_SET);
  64 }
  65
  66 static Static_object<Irq_mgr_single_chip<Irq_chip_arm_integr> > mgr;
  67
  68 IMPLEMENT FIASCO_INIT
  69 void Pic::init()
  70 {
  71   Irq_mgr::mgr = mgr.construct();
  72 }
  73
  74 IMPLEMENT inline
  75 Pic::Status Pic::disable_all_save()
  76 {
  77   Status s = 0;
  78   return s;
  79 }
  80
  81 IMPLEMENT inline
  82 void Pic::restore_all(Status)
  83 {}
  84
  85 PUBLIC inline
  86 Unsigned32 Irq_chip_arm_integr::pending()
  87 {
  88   return read<Mword>(IRQ_STATUS);
  89 }
  90
  91 extern "C"
  92 void irq_handler()
  93 { mgr->c.handle_multi_pending<Irq_chip_arm_integr>(0); }
  94
  95 //---------------------------------------------------------------------------
  96 IMPLEMENTATION [debug && integrator]:
  97
  98 PUBLIC
  99 char const *
 100 Irq_chip_arm_integr::chip_type() const
 101 { return "Integrator"; }