1 INTERFACE [arm && exynos]: // ------------------
3 #include "mmio_register_block.h"
7 class Mct_timer : public Mmio_register_block
10 explicit Mct_timer(Address virt) : Mmio_register_block(virt) {}
21 class Mct_core_timer : public Mmio_register_block
24 explicit Mct_core_timer(Address virt) : Mmio_register_block(virt) {}
45 Interval = Mct_freq / (1000000 / Config::Scheduler_granularity) / 2,
46 Maxinterval_mct = (1U << 31) - 1,
47 Maxinterval_us = Maxinterval_mct / (Mct_freq / 1000000),
53 IMPLEMENTATION [arm && exynos]: // ------------------
57 Mct_core_timer::wstat_poll(unsigned val)
59 while ((read<Mword>(Reg::L_WSTAT) & val) == 0)
61 write<Mword>(val, Reg::L_WSTAT);
64 PUBLIC inline NEEDS[Mct_core_timer::wstat_poll]
66 Mct_core_timer::set_interval(Mword interval)
68 write<Mword>((1 << 31) | interval, Reg::L_ICNTB);
74 Mct_core_timer::configure()
76 write<Mword>(1, Reg::L_TCNTB);
78 set_interval(Interval);
81 write<Mword>(1, Reg::L_TCON);
85 write<Mword>(1, Reg::L_INT_ENB);
86 write<Mword>(7, Reg::L_TCON);
92 Mct_core_timer::acknowledge() const
94 write<Mword>(1, Reg::L_INT_CSTAT);