1 IMPLEMENTATION [arm && omap4 && outer_cache_l2cxx0]:
3 EXTENSION class Outer_cache
7 Omap_l2cache_set_debug_reg = 0x100,
8 Omap_l2cache_clean_and_inv_range = 0x101,
9 Omap_l2cache_enable = 0x102,
10 Omap_l2cache_aux_reg = 0x109,
11 Omap_l2cache_tag_and_data_ram_lat_ctrl = 0x112,
12 Omap_l2cache_prefetch_ctrl = 0x113,
18 Outer_cache::smc(Mword func, Mword val)
20 register Mword _func asm("r12") = func;
21 register Mword _val asm("r0") = val;
22 asm volatile("dsb; smc #0"
24 : "r" (_func), "r" (_val)
25 : "memory", "cc", "r1", "r2", "r3", "r4", "r5",
26 "r6", "r7", "r8", "r9", "r10", "r11");
31 Outer_cache::platform_init(Mword aux_control)
33 aux_control = (1 << 16) // 16-way associativity
34 | (3 << 17) // 64k waysize
35 | (1 << 22) // shared attrib override
36 | (1 << 25) // reserved
37 | (1 << 26) // ns lockdown enable
38 | (1 << 27) // ns irq access enable
39 | (1 << 28) // data prefetch
40 | (1 << 29) // insn prefetch
41 | (1 << 30) // early BRESP enable
44 smc(Omap_l2cache_aux_reg, aux_control);
45 smc(Omap_l2cache_enable, 1);