1 IMPLEMENTATION [arm && imx21]:
6 void __attribute__ ((noreturn))
10 WCR = Kmem::Watchdog_map_base + 0,
11 WCR_SRS = 1 << 4, // Software Reset Signal
13 PLL_PCCR1 = Kmem::Pll_map_base + 0x24,
14 PLL_PCCR1_WDT_EN = 1 << 24,
18 Io::write<Unsigned32>(Io::read<Unsigned32>(PLL_PCCR1) | PLL_PCCR1_WDT_EN, PLL_PCCR1);
20 // Assert Software reset signal by making the bit zero
21 Io::write<Unsigned16>(Io::read<Unsigned16>(WCR) & ~WCR_SRS, WCR);
27 // ------------------------------------------------------------------------
28 IMPLEMENTATION [arm && (imx35 || imx51 || imx53)]:
30 void platform_imx_cpus_off()
33 // ------------------------------------------------------------------------
34 IMPLEMENTATION [arm && imx6]:
36 void platform_imx_cpus_off()
39 Io::clear<Mword>(7 << 22, Mem_layout::Src_map_base + 0);
42 // ------------------------------------------------------------------------
43 IMPLEMENTATION [arm && (imx35 || imx51 || imx53 || imx6)]:
48 void __attribute__ ((noreturn))
52 WCR = Kmem::Watchdog_map_base + 0,
53 WCR_SRS = 1 << 4, // Software Reset Signal
56 platform_imx_cpus_off();
58 // Assert Software reset signal by making the bit zero
59 Io::write<Unsigned16>(Io::read<Unsigned16>(WCR) & ~WCR_SRS, WCR);