3 mainmenu "Fiasco configuration"
7 option env="KERNELVERSION"
11 option env="INCLUDE_PPC32"
13 Use "INCLUDE_PPC32=y make config" to include ppc32 options.
15 menu "Target configuration"
22 bool "Intel IA-32 processor family"
25 bool "AMD64 processor family"
29 bool "ARM processor family"
32 bool "PowerPC 32 processor family (Caution: INCOMPLETE!)"
33 depends on EXPERIMENTAL && INCLUDE_PPC32
35 PPC32 testing version, mainly for MPC5200 (603e). Currently,
36 there is no support whatsoever.
47 default PF_INTEGRATOR if ARM
49 default PF_PC if AMD64
50 default PF_MP52CXX if PPC32
54 depends on IA32 || AMD64
57 bool "Linux Usermode Platform"
70 config PF_ARM_MP_CAPABLE
72 default y if ARM_MPCORE || ARM_CORTEX_A9
74 config CAN_ARM_CPU_SA1100
77 config CAN_ARM_CPU_XSCALE
80 config CAN_ARM_CPU_920T
83 config CAN_ARM_CPU_926
86 config CAN_ARM_CPU_1176
89 config CAN_ARM_CPU_MPCORE
92 config CAN_ARM_CPU_CORTEX_A8
95 config CAN_ARM_CPU_CORTEX_A9
101 default IA32_686 if IA32
102 default ARM_926 if ARM
103 default AMD64_K8 if AMD64
104 default PPC32_603e if PPC32
111 bool "Intel StrongARM"
115 bool "ARM 920T Processor"
116 depends on PF_S3C2410
119 bool "ARM 926 Processor"
120 depends on CAN_ARM_CPU_926
124 depends on CAN_ARM_CPU_1176
127 bool "ARM MPCore CPU"
128 depends on CAN_ARM_CPU_MPCORE
131 bool "ARM Cortex-A8 CPU"
132 depends on CAN_ARM_CPU_CORTEX_A8
135 bool "ARM Cortex-A9 CPU"
136 depends on CAN_ARM_CPU_CORTEX_A9
142 Choose this if you have an Intel 80486 or equivalent CPU (i486).
145 bool "Intel Pentium / AMD K5"
148 Choose this if you have an Intel Pentium or compatible i586 CPU.
151 bool "Intel Pentium Pro"
154 Choose this if you have an Intel Pentium Pro or compatible i686 CPU.
157 bool "Intel Pentium II / Celeron II"
160 Choose this if you have an Intel Pentium II or Pentium II based Celeron.
163 bool "Intel Pentium III / Celeron III"
166 Choose this if you have an Intel Pentium III or Pentium III based Celeron.
169 bool "Intel Pentium 4 / Celeron 4"
172 Choose this if you have an Intel Pentium 4 or Pentium 4 based Celeron.
175 bool "Intel Pentium M"
178 Choose this if you have an Intel Pentium M.
184 Choose this if you have an Intel Core 2.
190 Choose this if you have an Intel Atom.
193 bool "AMD K6 / K6-II / K6-III"
196 Choose this if you have an AMD K6 CPU.
199 bool "AMD Athlon / Duron"
202 Choose this if you have an AMD Athlon or Duron CPU.
205 bool "AMD Opteron / Athlon64"
208 Choose this if you have an AMD Opteron or Athlon64 CPU.
211 bool "AMD Barcelona (K10)"
214 Choose this if you have an AMD Barcelona based CPU.
218 bool "AMD Opteron / Athlon64"
221 Choose this if you have an AMD Opteron or Athlon64 CPU.
227 Choose this if you have an Intel Core 2.
233 Choose this if you have an Intel Atom.
236 bool "AMD Barcelona (K10)"
239 Choose this if you have an AMD Barcelona based CPU.
246 Choose this if you have an PowerPC 603e CPU.
253 bool "Enable CPU virtualization (SVM and VT)"
256 Support virtualization extensions that comes with x86 CPUs,
257 including nested paging. This feature allows you to run a virtual
258 machine monitor (VMM) on top of Fiasco.
260 config ARM_ALIGNMENT_CHECK
261 bool "Enable alignment check"
264 Enable if you want to have alignment check enabled.
267 bool "Enable ARM TrustZone support"
268 depends on (ARM_1176 || ARM_CORTEX_A8 || ARM_CORTEX_A9) && EXPERIMENTAL
270 Support ARM TrustZone security extension.
272 config ARM_CA9_ENABLE_SWP
273 bool "Enable the deprecated 'swp' instruction"
274 depends on ARM_CORTEX_A9
276 Enabling this option enables the deprecated 'swp' instruction.
280 prompt "Timer tick source"
281 depends on PF_PC || PF_UX
285 bool "Use PIT for scheduling"
286 depends on (PF_PC || PF_UX) && !MP
288 Normally, Fiasco uses the RTC at IRQ8 for scheduling. This can be
289 disadvantageous in certain circumstances, e.g. VMWare doesn't seem
290 to emulate the RTC good enough so that not enough timer interrupts
291 are produced. The PIT mode (using IRQ0) seems to work better in
292 this case. It is generally safe to use this option, so if you are
295 Consider that the interrupt priorities change: Using RTC, IRQ8 has
296 the highest priority. Using PIT, IRQ0 has the highest priority.
297 The only case where PIT scheduling does not work is with
298 profiling. If profiling is enabled the PIT is used for generating
299 the profiling interrupts.
302 bool "Use RTC for scheduling"
303 depends on PF_PC && !MP
305 'Yes' is the standard for this option. If this option is set
306 Fiasco uses the RTC on IRQ 8 for scheduling. This can be
307 disadvantageous in certain circumstances, e.g. VMWare doesn't seem
308 to emulate the RTC good enough so that not enough timer interrupts
309 are produced. The PIT (8254) mode (say 'no' here), seems to work
310 better in this case. It is generally safe to use the PIT, so if
311 you are unsure, say 'no'.
312 Consider that the interrupt priorities change: Using RTC, IRQ8 has
313 the highest priority. Using PIT, IRQ0 has the highest priority.
314 The only case where PIT scheduling does not work is with
315 profiling. If profiling is enabled the PIT is used for generating
316 the profiling interrupts and the RTC must be used for scheduling.
317 In the case where profiling shall be used within VMWare the
318 SLOW_RTC option must be set, so that the timer resolution of
319 Fiasco is reduced to 100Hz.
322 bool "Use APIC timer for scheduling"
325 Use the Local APIC for scheduling.
328 bool "Use HPET timer for scheduling (EXPERIMENTAL)"
329 depends on PF_PC && !MP && EXPERIMENTAL
331 Use the HPET timer for scheduling.
335 config WORKAROUND_AMD_FPU_LEAK
336 bool "Enables workaroud for AMD FPU security leak"
339 If you use Fiasco for high assurance, high security and use AMD
340 CPUs you should enable this option. In any other case it is no
344 bool "Compile with regparm=3"
346 depends on IA32 && PF_PC
348 Compile Fiasco with -mregparm=3. This uses a different ABI and
349 passes the first three arguments of a function call in registers.
352 bool "Enable FPU co-processor"
355 Enable this if your platform has hardware floating point support.
357 config ARM_1176_CACHE_ALIAS_FIX
358 bool "Use cache restriction to supress aliasing issue on ARM1176"
361 The ARM1176 processor might have a memory aliasing problem when
362 using cache sizes of more than 16kB cache. Enabling this option
363 enables the workaround of reducing the cache size to 16kB.
367 menu "Kernel options"
369 config HANDLE_SEGMENTS
370 bool "Handle and preserve segments"
371 depends on (PF_PC || PF_UX) && !AMD64
373 This function preserves the values of segment registers across
374 thread and task switches and allows to configure segments for user
378 bool "Enable multi processor support"
379 depends on EXPERIMENTAL && (PF_PC || PF_UX || PF_ARM_MP_CAPABLE)
381 Enable support for machines with multiple processors.
384 int "Maximal supported number of CPUs"
390 The maximum number of CPUs the kernel supports.
392 #config ASSEMBLER_IPC_SHORTCUT
393 # bool "Assembler IPC shortcut"
395 # depends on (PF_PC || PF_UX) && !MP
397 # Use the assembler IPC shortcut to get even better short IPC
398 # performance in the common case.
401 bool #"TCB size of 4k"
404 Use this option to use 4K kernel stacks. Only disable this option
405 when you know what you're doing.
408 bool "Enable I/O port protection"
412 Enabling this option adds I/O port protection to the kernel. That
413 means that every thread starts running at IOPL 0 which means that
414 only the kernel has full access to all I/O ports. This includes
415 the right to set and clear the interrupt flags (that is using cli
416 and sti). Access rights to I/O ports can be mapped like memory. If
417 a task has access to the whole I/O port space, its IOPL is raised
418 to 3 allowing the task to use cli and sti.
420 config IO_PROT_IOPL_3
421 bool "Enable CLI/STI (IOPL 3)"
422 depends on PF_PC && IO_PROT
424 Enable IOPL 3 for tasks with access to all I/O ports, this is the
428 bool "Use RTC with 100 ticks per second"
431 This option should be enabled if you use VMWare and no PIT
432 scheduling. The timer resolution is lowered to 100 ticks per
436 bool "Use scheduling timer in one-shot mode"
437 depends on SCHED_APIC && SYNC_TSC
439 More costly than periodic but more fine-granular scheduling
440 possible. EXPERIMENTAL!
443 bool "Synchronize KIP time with time-stamp counter"
444 depends on PF_PC && IA32
446 Synchronize the internal kernel clock with the CPU time stamp
449 config FINE_GRAINED_CPUTIME
450 bool "Fine-grained CPU time"
452 Measure CPU time consumed by a thread from switching to the thread
453 until switching to another thread. Induces an overhead during each
454 thread switch, so only activate it for debugging.
457 bool "Graphical console (requires SDL library!)"
460 Fiasco-UX can supply a graphical console for the L4 program it is
461 running. Enabling this option will build the additional program
462 but needs the SDL library including development header files
466 bool "Network support"
469 Enabling this option makes Fiasco-UX provide network support for
476 config SCHED_FIXED_PRIO
477 bool "Fixed priority scheduler"
479 Choose this for the standard fixed priority scheduler with
483 bool "Weighted fair queueing scheduler"
484 depends on EXPERIMENTAL
486 Choose this scheduler for a weighted fair queueing scheduler
487 running with dynamic priorities.
490 bool "Combined fixed priority RT and WFQ scheduler"
491 depends on EXPERIMENTAL
493 Combination of Fixed priority and weighted fair queueing
498 config DISABLE_VIRT_OBJ_SPACE
499 bool "No virtually mapped array for cap tables"
500 depends on (PF_PC || ARM) && EXPERIMENTAL
503 endmenu # kernel options
508 bool "Generate inline code"
511 Inlining specifies that it is desirable for the compiler to
512 integrate functions declared 'inline' into the calling routine.
513 This usually leads to faster code, so unless you want to debug the
514 kernel you should say 'Y' here.
517 bool "Do not compile assertions"
519 Don't insert assertions into the code. Should be enabled for
520 kernels which are used for measurements.
523 bool #"Compile with profiling support"
524 depends on EXPERIMENTAL && PF_PC && IA32 && !ASSEMBLER_IPC_SHORTCUT && SCHED_RTC && !NO_FRAME_PTR
526 This option enables support for kernel profiling. This implies
527 that a special CPU lock is used, because profiling IRQ must be
528 enabled even in cases where a CPU lock is locked. So the
529 cpu_lock-pic module is used as implementation for the lock.
530 Further this option does not work with PIT scheduling
531 (CONFIG_SCHED_PIT) because the PIT is used for generating
535 bool "Compile without frame pointer"
538 Enabling this option optimizes for speed but makes debugging more
542 bool "Measure stack depth of threads"
544 When this option is enabled, each thread control block is marked
545 with magic numbers while creation. The function ``show thread
546 lists'' scans the TCB for these magic numbers and shows the
547 currently used depth of each thread.
550 bool "Read-Only Kernel Text and Data"
552 depends on IA32 || AMD64
554 Enable this option to enable read-only mappings for kernel code
555 and ro data. To really map things read only '-rotext' needs to be
556 given to the kernel command line.
557 NOTE: This may significantly increase the memory footprint of the
558 kernel. The use of '-rotext' with extendet logging results in
561 config LIST_ALLOC_SANITY
562 bool "Sanity checks in low level allocator"
564 When this option is enabled the low level memory allocator does
565 extra sanity checks on its data structures before and after every
566 operation. This can halp detect flaws like double frees or memory
567 corruption by other means.
569 These tests are very expensive so only enable them if a problem
570 with memory allocation is expected.
572 config BEFORE_IRET_SANITY
573 bool "Sanity checks at syscall entry/exit"
576 Perform the following additional sanity checks before returning to
578 - Does the thread hold any locks?
579 - Is the thread locked by any other thread?
580 - Does the thread have the right state:
581 * Thread_ready must be set.
582 * Thread_cancel and Thread_fpu_owner might be set.
583 * Any other state bit must not be set.
584 Don't use Fiasco compiled with this option for performance analysis!
587 bool "Compile with gstabs+ debugging information"
590 Enabling this option includes the debugging information using the
591 older gstabs+ format into the kernel image. This is necessary to
592 access line number information of the kernel from JDB.
595 bool "Display IRQ activity on VGA screen"
598 Display IRQ activity on VGA screen.
601 bool "Enable Watchdog support"
605 Enable support for watchdog using the builtin Local APIC and a
606 performance counter. The watchdog can be enabled using the
607 -watchdog command line option.
610 bool "Support for debugging over serial line"
611 depends on PF_PC || ARM || PPC32
614 This option enables support for input/output over serial interface.
617 bool "JDB kernel debugger"
620 The powerful Fiasco kernel debugger.
625 bool "JDB extended logging"
627 There are two classes of logging events: Basic events don't
628 consume any time if they are disabled (ipc, ipc result,
629 pagefaults, unmap). Extended logging events add an additional
630 overhead of most probably less than 10 cycles if they are
631 disabled. These events can be activated/deactivated by the 'O'
634 Should be disabled for kernels which are used for measurements.
637 bool "JDB disassembler"
641 Add support for disassembly. Increases memory foot-print, only
645 bool "GZIP compressed dumps"
649 Add supprt for gzip compressed dumps of the trace buffer.
650 Increases memory foot-print, only enabled when needed.
652 config JDB_ACCOUNTING
653 bool "JDB accounting"
656 Enable accounting information about IPCs, context switches, page
657 faults, and other events. The counters are accessible from
658 userland through the tbuf status page.
660 Should be disabled for kernels which are used for measurements.
663 bool "Miscellaneous JDB modules"
664 depends on PF_UX || PF_PC
669 config VMEM_ALLOC_TEST
670 bool "Run test for Vmem_alloc allocator"
673 config DEBUG_KERNEL_PAGE_FAULTS
674 bool "Debugging of kernel page-faults"
677 This option enables logging of kernel page-faults (aka page faults
678 from kernel mode). The page faults are logged to the normal
679 console in the format *KP[pfa, error_code, ip].
681 config POWERSAVE_GETCHAR
682 bool "Save power in getchar()"
686 This option uses a processor HALT in getchar() to save power and
687 prevent some P4 processors from being overheated. This option
688 requires a working timer IRQ to wakeup getchar periodically.
695 bool "Do not show show any kernel warning"
698 bool "Show messages of warning level"
701 bool "Show all kernel warnings"
703 endchoice # warn levels
713 Use this option to override the default C compiler (gcc).
716 string "C++ compiler"
719 Use this option to override the default C++ compiler (g++).
722 string "C host compiler"
725 Use this option to override the default C host compiler (gcc).
728 string "C++ host compiler"
731 Use this option to override the default C++ host compiler (g++).
734 bool "Verbose build process"
736 When enabled, this config option allows you to see more details of
739 config MAINTAINER_MODE
740 bool "Do additional checks at build time"
742 This enables the circular dependency and initcall checks.
743 Say 'Yes' here if you do kernel hacking.
746 string "Configuration label"
748 Text string with a name for this configuration. To be displayed in
754 bool "Prompt for experimental features"
756 Experimental features are available when enabling this option.
757 Enabling these features might be less than fully secure and may
758 disrupt the stability of your kernel.
763 def_bool y if JDB && (IA32 || AMD64 || ARM)
766 def_bool y if ARM || IA32 || PPC32
772 def_bool y if ARM_1176 || ARM_MPCORE
775 def_bool y if ARM_CORTEX_A8 || ARM_CORTEX_A9
778 def_bool y if ARM_V6 || ARM_V7
782 default 2 if WARN_ANY
783 default 1 if WARN_WARNING
784 default 0 if WARN_NONE
789 default "ux" if PF_UX
790 default "amd64" if AMD64 && PF_PC
791 default "ia32" if IA32 && PF_PC
792 default "ppc32" if PPC32
796 default "Intel 80486" if IA32_486
797 default "Intel Pentium" if IA32_586
798 default "Intel Pentium Pro" if IA32_686
799 default "Intel Pentium II" if IA32_P2
800 default "Intel Pentium III" if IA32_P3
801 default "Intel Pentium 4" if IA32_P4
802 default "Pentium M" if IA32_PM
803 default "AMD K6" if IA32_K6
804 default "AMD Athlon" if IA32_K7
805 default "Intel Core2" if IA32_CORE2 || AMD64_CORE2
806 default "Intel Atom" if IA32_ATOM || AMD64_ATOM
807 default "AMD Opteron" if IA32_K8 || AMD64_K8 || AMD64_K10 || IA32_K10