l4/pkg/linux-26-headers/include/linux/perf_event.h

   1 /*
   2  * Performance events:
   3  *
   4  *    Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
   5  *    Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
   6  *    Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
   7  *
   8  * Data type definitions, declarations, prototypes.
   9  *
  10  *    Started by: Thomas Gleixner and Ingo Molnar
  11  *
  12  * For licencing details see kernel-base/COPYING
  13  */
  14 #ifndef _LINUX_PERF_EVENT_H
  15 #define _LINUX_PERF_EVENT_H
  16
  17 #include <linux/types.h>
  18 #include <linux/ioctl.h>
  19 #include <asm/byteorder.h>
  20
  21 /*
  22  * User-space ABI bits:
  23  */
  24
  25 /*
  26  * attr.type
  27  */
  28 enum perf_type_id {
  29         PERF_TYPE_HARDWARE                      = 0,
  30         PERF_TYPE_SOFTWARE                      = 1,
  31         PERF_TYPE_TRACEPOINT                    = 2,
  32         PERF_TYPE_HW_CACHE                      = 3,
  33         PERF_TYPE_RAW                           = 4,
  34         PERF_TYPE_BREAKPOINT                    = 5,
  35
  36         PERF_TYPE_MAX,                          /* non-ABI */
  37 };
  38
  39 /*
  40  * Generalized performance event event_id types, used by the
  41  * attr.event_id parameter of the sys_perf_event_open()
  42  * syscall:
  43  */
  44 enum perf_hw_id {
  45         /*
  46          * Common hardware events, generalized by the kernel:
  47          */
  48         PERF_COUNT_HW_CPU_CYCLES                = 0,
  49         PERF_COUNT_HW_INSTRUCTIONS              = 1,
  50         PERF_COUNT_HW_CACHE_REFERENCES          = 2,
  51         PERF_COUNT_HW_CACHE_MISSES              = 3,
  52         PERF_COUNT_HW_BRANCH_INSTRUCTIONS       = 4,
  53         PERF_COUNT_HW_BRANCH_MISSES             = 5,
  54         PERF_COUNT_HW_BUS_CYCLES                = 6,
  55         PERF_COUNT_HW_STALLED_CYCLES_FRONTEND   = 7,
  56         PERF_COUNT_HW_STALLED_CYCLES_BACKEND    = 8,
  57         PERF_COUNT_HW_REF_CPU_CYCLES            = 9,
  58
  59         PERF_COUNT_HW_MAX,                      /* non-ABI */
  60 };
  61
  62 /*
  63  * Generalized hardware cache events:
  64  *
  65  *       { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
  66  *       { read, write, prefetch } x
  67  *       { accesses, misses }
  68  */
  69 enum perf_hw_cache_id {
  70         PERF_COUNT_HW_CACHE_L1D                 = 0,
  71         PERF_COUNT_HW_CACHE_L1I                 = 1,
  72         PERF_COUNT_HW_CACHE_LL                  = 2,
  73         PERF_COUNT_HW_CACHE_DTLB                = 3,
  74         PERF_COUNT_HW_CACHE_ITLB                = 4,
  75         PERF_COUNT_HW_CACHE_BPU                 = 5,
  76         PERF_COUNT_HW_CACHE_NODE                = 6,
  77
  78         PERF_COUNT_HW_CACHE_MAX,                /* non-ABI */
  79 };
  80
  81 enum perf_hw_cache_op_id {
  82         PERF_COUNT_HW_CACHE_OP_READ             = 0,
  83         PERF_COUNT_HW_CACHE_OP_WRITE            = 1,
  84         PERF_COUNT_HW_CACHE_OP_PREFETCH         = 2,
  85
  86         PERF_COUNT_HW_CACHE_OP_MAX,             /* non-ABI */
  87 };
  88
  89 enum perf_hw_cache_op_result_id {
  90         PERF_COUNT_HW_CACHE_RESULT_ACCESS       = 0,
  91         PERF_COUNT_HW_CACHE_RESULT_MISS         = 1,
  92
  93         PERF_COUNT_HW_CACHE_RESULT_MAX,         /* non-ABI */
  94 };
  95
  96 /*
  97  * Special "software" events provided by the kernel, even if the hardware
  98  * does not support performance events. These events measure various
  99  * physical and sw events of the kernel (and allow the profiling of them as
 100  * well):
 101  */
 102 enum perf_sw_ids {
 103         PERF_COUNT_SW_CPU_CLOCK                 = 0,
 104         PERF_COUNT_SW_TASK_CLOCK                = 1,
 105         PERF_COUNT_SW_PAGE_FAULTS               = 2,
 106         PERF_COUNT_SW_CONTEXT_SWITCHES          = 3,
 107         PERF_COUNT_SW_CPU_MIGRATIONS            = 4,
 108         PERF_COUNT_SW_PAGE_FAULTS_MIN           = 5,
 109         PERF_COUNT_SW_PAGE_FAULTS_MAJ           = 6,
 110         PERF_COUNT_SW_ALIGNMENT_FAULTS          = 7,
 111         PERF_COUNT_SW_EMULATION_FAULTS          = 8,
 112         PERF_COUNT_SW_DUMMY                     = 9,
 113
 114         PERF_COUNT_SW_MAX,                      /* non-ABI */
 115 };
 116
 117 /*
 118  * Bits that can be set in attr.sample_type to request information
 119  * in the overflow packets.
 120  */
 121 enum perf_event_sample_format {
 122         PERF_SAMPLE_IP                          = 1U << 0,
 123         PERF_SAMPLE_TID                         = 1U << 1,
 124         PERF_SAMPLE_TIME                        = 1U << 2,
 125         PERF_SAMPLE_ADDR                        = 1U << 3,
 126         PERF_SAMPLE_READ                        = 1U << 4,
 127         PERF_SAMPLE_CALLCHAIN                   = 1U << 5,
 128         PERF_SAMPLE_ID                          = 1U << 6,
 129         PERF_SAMPLE_CPU                         = 1U << 7,
 130         PERF_SAMPLE_PERIOD                      = 1U << 8,
 131         PERF_SAMPLE_STREAM_ID                   = 1U << 9,
 132         PERF_SAMPLE_RAW                         = 1U << 10,
 133         PERF_SAMPLE_BRANCH_STACK                = 1U << 11,
 134         PERF_SAMPLE_REGS_USER                   = 1U << 12,
 135         PERF_SAMPLE_STACK_USER                  = 1U << 13,
 136         PERF_SAMPLE_WEIGHT                      = 1U << 14,
 137         PERF_SAMPLE_DATA_SRC                    = 1U << 15,
 138         PERF_SAMPLE_IDENTIFIER                  = 1U << 16,
 139         PERF_SAMPLE_TRANSACTION                 = 1U << 17,
 140         PERF_SAMPLE_REGS_INTR                   = 1U << 18,
 141
 142         PERF_SAMPLE_MAX = 1U << 19,             /* non-ABI */
 143 };
 144
 145 /*
 146  * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set
 147  *
 148  * If the user does not pass priv level information via branch_sample_type,
 149  * the kernel uses the event's priv level. Branch and event priv levels do
 150  * not have to match. Branch priv level is checked for permissions.
 151  *
 152  * The branch types can be combined, however BRANCH_ANY covers all types
 153  * of branches and therefore it supersedes all the other types.
 154  */
 155 enum perf_branch_sample_type_shift {
 156         PERF_SAMPLE_BRANCH_USER_SHIFT           = 0, /* user branches */
 157         PERF_SAMPLE_BRANCH_KERNEL_SHIFT         = 1, /* kernel branches */
 158         PERF_SAMPLE_BRANCH_HV_SHIFT             = 2, /* hypervisor branches */
 159
 160         PERF_SAMPLE_BRANCH_ANY_SHIFT            = 3, /* any branch types */
 161         PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT       = 4, /* any call branch */
 162         PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT     = 5, /* any return branch */
 163         PERF_SAMPLE_BRANCH_IND_CALL_SHIFT       = 6, /* indirect calls */
 164         PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT       = 7, /* transaction aborts */
 165         PERF_SAMPLE_BRANCH_IN_TX_SHIFT          = 8, /* in transaction */
 166         PERF_SAMPLE_BRANCH_NO_TX_SHIFT          = 9, /* not in transaction */
 167         PERF_SAMPLE_BRANCH_COND_SHIFT           = 10, /* conditional branches */
 168
 169         PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT     = 11, /* call/ret stack */
 170         PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT       = 12, /* indirect jumps */
 171
 172         PERF_SAMPLE_BRANCH_MAX_SHIFT            /* non-ABI */
 173 };
 174
 175 enum perf_branch_sample_type {
 176         PERF_SAMPLE_BRANCH_USER         = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT,
 177         PERF_SAMPLE_BRANCH_KERNEL       = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT,
 178         PERF_SAMPLE_BRANCH_HV           = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT,
 179
 180         PERF_SAMPLE_BRANCH_ANY          = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT,
 181         PERF_SAMPLE_BRANCH_ANY_CALL     = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT,
 182         PERF_SAMPLE_BRANCH_ANY_RETURN   = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT,
 183         PERF_SAMPLE_BRANCH_IND_CALL     = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT,
 184         PERF_SAMPLE_BRANCH_ABORT_TX     = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT,
 185         PERF_SAMPLE_BRANCH_IN_TX        = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT,
 186         PERF_SAMPLE_BRANCH_NO_TX        = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT,
 187         PERF_SAMPLE_BRANCH_COND         = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,
 188
 189         PERF_SAMPLE_BRANCH_CALL_STACK   = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT,
 190         PERF_SAMPLE_BRANCH_IND_JUMP     = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT,
 191
 192         PERF_SAMPLE_BRANCH_MAX          = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT,
 193 };
 194
 195 #define PERF_SAMPLE_BRANCH_PLM_ALL \
 196         (PERF_SAMPLE_BRANCH_USER|\
 197          PERF_SAMPLE_BRANCH_KERNEL|\
 198          PERF_SAMPLE_BRANCH_HV)
 199
 200 /*
 201  * Values to determine ABI of the registers dump.
 202  */
 203 enum perf_sample_regs_abi {
 204         PERF_SAMPLE_REGS_ABI_NONE       = 0,
 205         PERF_SAMPLE_REGS_ABI_32         = 1,
 206         PERF_SAMPLE_REGS_ABI_64         = 2,
 207 };
 208
 209 /*
 210  * Values for the memory transaction event qualifier, mostly for
 211  * abort events. Multiple bits can be set.
 212  */
 213 enum {
 214         PERF_TXN_ELISION        = (1 << 0), /* From elision */
 215         PERF_TXN_TRANSACTION    = (1 << 1), /* From transaction */
 216         PERF_TXN_SYNC           = (1 << 2), /* Instruction is related */
 217         PERF_TXN_ASYNC          = (1 << 3), /* Instruction not related */
 218         PERF_TXN_RETRY          = (1 << 4), /* Retry possible */
 219         PERF_TXN_CONFLICT       = (1 << 5), /* Conflict abort */
 220         PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */
 221         PERF_TXN_CAPACITY_READ  = (1 << 7), /* Capacity read abort */
 222
 223         PERF_TXN_MAX            = (1 << 8), /* non-ABI */
 224
 225         /* bits 32..63 are reserved for the abort code */
 226
 227         PERF_TXN_ABORT_MASK  = (0xffffffffULL << 32),
 228         PERF_TXN_ABORT_SHIFT = 32,
 229 };
 230
 231 /*
 232  * The format of the data returned by read() on a perf event fd,
 233  * as specified by attr.read_format:
 234  *
 235  * struct read_format {
 236  *      { u64           value;
 237  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
 238  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
 239  *        { u64         id;           } && PERF_FORMAT_ID
 240  *      } && !PERF_FORMAT_GROUP
 241  *
 242  *      { u64           nr;
 243  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
 244  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
 245  *        { u64         value;
 246  *          { u64       id;           } && PERF_FORMAT_ID
 247  *        }             cntr[nr];
 248  *      } && PERF_FORMAT_GROUP
 249  * };
 250  */
 251 enum perf_event_read_format {
 252         PERF_FORMAT_TOTAL_TIME_ENABLED          = 1U << 0,
 253         PERF_FORMAT_TOTAL_TIME_RUNNING          = 1U << 1,
 254         PERF_FORMAT_ID                          = 1U << 2,
 255         PERF_FORMAT_GROUP                       = 1U << 3,
 256
 257         PERF_FORMAT_MAX = 1U << 4,              /* non-ABI */
 258 };
 259
 260 #define PERF_ATTR_SIZE_VER0     64      /* sizeof first published struct */
 261 #define PERF_ATTR_SIZE_VER1     72      /* add: config2 */
 262 #define PERF_ATTR_SIZE_VER2     80      /* add: branch_sample_type */
 263 #define PERF_ATTR_SIZE_VER3     96      /* add: sample_regs_user */
 264                                         /* add: sample_stack_user */
 265 #define PERF_ATTR_SIZE_VER4     104     /* add: sample_regs_intr */
 266 #define PERF_ATTR_SIZE_VER5     112     /* add: aux_watermark */
 267
 268 /*
 269  * Hardware event_id to monitor via a performance monitoring event:
 270  */
 271 struct perf_event_attr {
 272
 273         /*
 274          * Major type: hardware/software/tracepoint/etc.
 275          */
 276         __u32                   type;
 277
 278         /*
 279          * Size of the attr structure, for fwd/bwd compat.
 280          */
 281         __u32                   size;
 282
 283         /*
 284          * Type specific configuration information.
 285          */
 286         __u64                   config;
 287
 288         union {
 289                 __u64           sample_period;
 290                 __u64           sample_freq;
 291         };
 292
 293         __u64                   sample_type;
 294         __u64                   read_format;
 295
 296         __u64                   disabled       :  1, /* off by default        */
 297                                 inherit        :  1, /* children inherit it   */
 298                                 pinned         :  1, /* must always be on PMU */
 299                                 exclusive      :  1, /* only group on PMU     */
 300                                 exclude_user   :  1, /* don't count user      */
 301                                 exclude_kernel :  1, /* ditto kernel          */
 302                                 exclude_hv     :  1, /* ditto hypervisor      */
 303                                 exclude_idle   :  1, /* don't count when idle */
 304                                 mmap           :  1, /* include mmap data     */
 305                                 comm           :  1, /* include comm data     */
 306                                 freq           :  1, /* use freq, not period  */
 307                                 inherit_stat   :  1, /* per task counts       */
 308                                 enable_on_exec :  1, /* next exec enables     */
 309                                 task           :  1, /* trace fork/exit       */
 310                                 watermark      :  1, /* wakeup_watermark      */
 311                                 /*
 312                                  * precise_ip:
 313                                  *
 314                                  *  0 - SAMPLE_IP can have arbitrary skid
 315                                  *  1 - SAMPLE_IP must have constant skid
 316                                  *  2 - SAMPLE_IP requested to have 0 skid
 317                                  *  3 - SAMPLE_IP must have 0 skid
 318                                  *
 319                                  *  See also PERF_RECORD_MISC_EXACT_IP
 320                                  */
 321                                 precise_ip     :  2, /* skid constraint       */
 322                                 mmap_data      :  1, /* non-exec mmap data    */
 323                                 sample_id_all  :  1, /* sample_type all events */
 324
 325                                 exclude_host   :  1, /* don't count in host   */
 326                                 exclude_guest  :  1, /* don't count in guest  */
 327
 328                                 exclude_callchain_kernel : 1, /* exclude kernel callchains */
 329                                 exclude_callchain_user   : 1, /* exclude user callchains */
 330                                 mmap2          :  1, /* include mmap with inode data     */
 331                                 comm_exec      :  1, /* flag comm events that are due to an exec */
 332                                 use_clockid    :  1, /* use @clockid for time fields */
 333                                 __reserved_1   : 38;
 334
 335         union {
 336                 __u32           wakeup_events;    /* wakeup every n events */
 337                 __u32           wakeup_watermark; /* bytes before wakeup   */
 338         };
 339
 340         __u32                   bp_type;
 341         union {
 342                 __u64           bp_addr;
 343                 __u64           config1; /* extension of config */
 344         };
 345         union {
 346                 __u64           bp_len;
 347                 __u64           config2; /* extension of config1 */
 348         };
 349         __u64   branch_sample_type; /* enum perf_branch_sample_type */
 350
 351         /*
 352          * Defines set of user regs to dump on samples.
 353          * See asm/perf_regs.h for details.
 354          */
 355         __u64   sample_regs_user;
 356
 357         /*
 358          * Defines size of the user stack to dump on samples.
 359          */
 360         __u32   sample_stack_user;
 361
 362         __s32   clockid;
 363         /*
 364          * Defines set of regs to dump for each sample
 365          * state captured on:
 366          *  - precise = 0: PMU interrupt
 367          *  - precise > 0: sampled instruction
 368          *
 369          * See asm/perf_regs.h for details.
 370          */
 371         __u64   sample_regs_intr;
 372
 373         /*
 374          * Wakeup watermark for AUX area
 375          */
 376         __u32   aux_watermark;
 377         __u32   __reserved_2;   /* align to __u64 */
 378 };
 379
 380 #define perf_flags(attr)        (*(&(attr)->read_format + 1))
 381
 382 /*
 383  * Ioctls that can be done on a perf event fd:
 384  */
 385 #define PERF_EVENT_IOC_ENABLE           _IO ('$', 0)
 386 #define PERF_EVENT_IOC_DISABLE          _IO ('$', 1)
 387 #define PERF_EVENT_IOC_REFRESH          _IO ('$', 2)
 388 #define PERF_EVENT_IOC_RESET            _IO ('$', 3)
 389 #define PERF_EVENT_IOC_PERIOD           _IOW('$', 4, __u64)
 390 #define PERF_EVENT_IOC_SET_OUTPUT       _IO ('$', 5)
 391 #define PERF_EVENT_IOC_SET_FILTER       _IOW('$', 6, char *)
 392 #define PERF_EVENT_IOC_ID               _IOR('$', 7, __u64 *)
 393 #define PERF_EVENT_IOC_SET_BPF          _IOW('$', 8, __u32)
 394
 395 enum perf_event_ioc_flags {
 396         PERF_IOC_FLAG_GROUP             = 1U << 0,
 397 };
 398
 399 /*
 400  * Structure of the page that can be mapped via mmap
 401  */
 402 struct perf_event_mmap_page {
 403         __u32   version;                /* version number of this structure */
 404         __u32   compat_version;         /* lowest version this is compat with */
 405
 406         /*
 407          * Bits needed to read the hw events in user-space.
 408          *
 409          *   u32 seq, time_mult, time_shift, index, width;
 410          *   u64 count, enabled, running;
 411          *   u64 cyc, time_offset;
 412          *   s64 pmc = 0;
 413          *
 414          *   do {
 415          *     seq = pc->lock;
 416          *     barrier()
 417          *
 418          *     enabled = pc->time_enabled;
 419          *     running = pc->time_running;
 420          *
 421          *     if (pc->cap_usr_time && enabled != running) {
 422          *       cyc = rdtsc();
 423          *       time_offset = pc->time_offset;
 424          *       time_mult   = pc->time_mult;
 425          *       time_shift  = pc->time_shift;
 426          *     }
 427          *
 428          *     index = pc->index;
 429          *     count = pc->offset;
 430          *     if (pc->cap_user_rdpmc && index) {
 431          *       width = pc->pmc_width;
 432          *       pmc = rdpmc(index - 1);
 433          *     }
 434          *
 435          *     barrier();
 436          *   } while (pc->lock != seq);
 437          *
 438          * NOTE: for obvious reason this only works on self-monitoring
 439          *       processes.
 440          */
 441         __u32   lock;                   /* seqlock for synchronization */
 442         __u32   index;                  /* hardware event identifier */
 443         __s64   offset;                 /* add to hardware event value */
 444         __u64   time_enabled;           /* time event active */
 445         __u64   time_running;           /* time event on cpu */
 446         union {
 447                 __u64   capabilities;
 448                 struct {
 449                         __u64   cap_bit0                : 1, /* Always 0, deprecated, see commit 860f085b74e9 */
 450                                 cap_bit0_is_deprecated  : 1, /* Always 1, signals that bit 0 is zero */
 451
 452                                 cap_user_rdpmc          : 1, /* The RDPMC instruction can be used to read counts */
 453                                 cap_user_time           : 1, /* The time_* fields are used */
 454                                 cap_user_time_zero      : 1, /* The time_zero field is used */
 455                                 cap_____res             : 59;
 456                 };
 457         };
 458
 459         /*
 460          * If cap_user_rdpmc this field provides the bit-width of the value
 461          * read using the rdpmc() or equivalent instruction. This can be used
 462          * to sign extend the result like:
 463          *
 464          *   pmc <<= 64 - width;
 465          *   pmc >>= 64 - width; // signed shift right
 466          *   count += pmc;
 467          */
 468         __u16   pmc_width;
 469
 470         /*
 471          * If cap_usr_time the below fields can be used to compute the time
 472          * delta since time_enabled (in ns) using rdtsc or similar.
 473          *
 474          *   u64 quot, rem;
 475          *   u64 delta;
 476          *
 477          *   quot = (cyc >> time_shift);
 478          *   rem = cyc & ((1 << time_shift) - 1);
 479          *   delta = time_offset + quot * time_mult +
 480          *              ((rem * time_mult) >> time_shift);
 481          *
 482          * Where time_offset,time_mult,time_shift and cyc are read in the
 483          * seqcount loop described above. This delta can then be added to
 484          * enabled and possible running (if index), improving the scaling:
 485          *
 486          *   enabled += delta;
 487          *   if (index)
 488          *     running += delta;
 489          *
 490          *   quot = count / running;
 491          *   rem  = count % running;
 492          *   count = quot * enabled + (rem * enabled) / running;
 493          */
 494         __u16   time_shift;
 495         __u32   time_mult;
 496         __u64   time_offset;
 497         /*
 498          * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated
 499          * from sample timestamps.
 500          *
 501          *   time = timestamp - time_zero;
 502          *   quot = time / time_mult;
 503          *   rem  = time % time_mult;
 504          *   cyc = (quot << time_shift) + (rem << time_shift) / time_mult;
 505          *
 506          * And vice versa:
 507          *
 508          *   quot = cyc >> time_shift;
 509          *   rem  = cyc & ((1 << time_shift) - 1);
 510          *   timestamp = time_zero + quot * time_mult +
 511          *               ((rem * time_mult) >> time_shift);
 512          */
 513         __u64   time_zero;
 514         __u32   size;                   /* Header size up to __reserved[] fields. */
 515
 516                 /*
 517                  * Hole for extension of the self monitor capabilities
 518                  */
 519
 520         __u8    __reserved[118*8+4];    /* align to 1k. */
 521
 522         /*
 523          * Control data for the mmap() data buffer.
 524          *
 525          * User-space reading the @data_head value should issue an smp_rmb(),
 526          * after reading this value.
 527          *
 528          * When the mapping is PROT_WRITE the @data_tail value should be
 529          * written by userspace to reflect the last read data, after issueing
 530          * an smp_mb() to separate the data read from the ->data_tail store.
 531          * In this case the kernel will not over-write unread data.
 532          *
 533          * See perf_output_put_handle() for the data ordering.
 534          *
 535          * data_{offset,size} indicate the location and size of the perf record
 536          * buffer within the mmapped area.
 537          */
 538         __u64   data_head;              /* head in the data section */
 539         __u64   data_tail;              /* user-space written tail */
 540         __u64   data_offset;            /* where the buffer starts */
 541         __u64   data_size;              /* data buffer size */
 542
 543         /*
 544          * AUX area is defined by aux_{offset,size} fields that should be set
 545          * by the userspace, so that
 546          *
 547          *   aux_offset >= data_offset + data_size
 548          *
 549          * prior to mmap()ing it. Size of the mmap()ed area should be aux_size.
 550          *
 551          * Ring buffer pointers aux_{head,tail} have the same semantics as
 552          * data_{head,tail} and same ordering rules apply.
 553          */
 554         __u64   aux_head;
 555         __u64   aux_tail;
 556         __u64   aux_offset;
 557         __u64   aux_size;
 558 };
 559
 560 #define PERF_RECORD_MISC_CPUMODE_MASK           (7 << 0)
 561 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN        (0 << 0)
 562 #define PERF_RECORD_MISC_KERNEL                 (1 << 0)
 563 #define PERF_RECORD_MISC_USER                   (2 << 0)
 564 #define PERF_RECORD_MISC_HYPERVISOR             (3 << 0)
 565 #define PERF_RECORD_MISC_GUEST_KERNEL           (4 << 0)
 566 #define PERF_RECORD_MISC_GUEST_USER             (5 << 0)
 567
 568 /*
 569  * Indicates that /proc/PID/maps parsing are truncated by time out.
 570  */
 571 #define PERF_RECORD_MISC_PROC_MAP_PARSE_TIMEOUT (1 << 12)
 572 /*
 573  * PERF_RECORD_MISC_MMAP_DATA and PERF_RECORD_MISC_COMM_EXEC are used on
 574  * different events so can reuse the same bit position.
 575  */
 576 #define PERF_RECORD_MISC_MMAP_DATA              (1 << 13)
 577 #define PERF_RECORD_MISC_COMM_EXEC              (1 << 13)
 578 /*
 579  * Indicates that the content of PERF_SAMPLE_IP points to
 580  * the actual instruction that triggered the event. See also
 581  * perf_event_attr::precise_ip.
 582  */
 583 #define PERF_RECORD_MISC_EXACT_IP               (1 << 14)
 584 /*
 585  * Reserve the last bit to indicate some extended misc field
 586  */
 587 #define PERF_RECORD_MISC_EXT_RESERVED           (1 << 15)
 588
 589 struct perf_event_header {
 590         __u32   type;
 591         __u16   misc;
 592         __u16   size;
 593 };
 594
 595 enum perf_event_type {
 596
 597         /*
 598          * If perf_event_attr.sample_id_all is set then all event types will
 599          * have the sample_type selected fields related to where/when
 600          * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU,
 601          * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed
 602          * just after the perf_event_header and the fields already present for
 603          * the existing fields, i.e. at the end of the payload. That way a newer
 604          * perf.data file will be supported by older perf tools, with these new
 605          * optional fields being ignored.
 606          *
 607          * struct sample_id {
 608          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
 609          *      { u64                   time;     } && PERF_SAMPLE_TIME
 610          *      { u64                   id;       } && PERF_SAMPLE_ID
 611          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
 612          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
 613          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
 614          * } && perf_event_attr::sample_id_all
 615          *
 616          * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.  The
 617          * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed
 618          * relative to header.size.
 619          */
 620
 621         /*
 622          * The MMAP events record the PROT_EXEC mappings so that we can
 623          * correlate userspace IPs to code. They have the following structure:
 624          *
 625          * struct {
 626          *      struct perf_event_header        header;
 627          *
 628          *      u32                             pid, tid;
 629          *      u64                             addr;
 630          *      u64                             len;
 631          *      u64                             pgoff;
 632          *      char                            filename[];
 633          *      struct sample_id                sample_id;
 634          * };
 635          */
 636         PERF_RECORD_MMAP                        = 1,
 637
 638         /*
 639          * struct {
 640          *      struct perf_event_header        header;
 641          *      u64                             id;
 642          *      u64                             lost;
 643          *      struct sample_id                sample_id;
 644          * };
 645          */
 646         PERF_RECORD_LOST                        = 2,
 647
 648         /*
 649          * struct {
 650          *      struct perf_event_header        header;
 651          *
 652          *      u32                             pid, tid;
 653          *      char                            comm[];
 654          *      struct sample_id                sample_id;
 655          * };
 656          */
 657         PERF_RECORD_COMM                        = 3,
 658
 659         /*
 660          * struct {
 661          *      struct perf_event_header        header;
 662          *      u32                             pid, ppid;
 663          *      u32                             tid, ptid;
 664          *      u64                             time;
 665          *      struct sample_id                sample_id;
 666          * };
 667          */
 668         PERF_RECORD_EXIT                        = 4,
 669
 670         /*
 671          * struct {
 672          *      struct perf_event_header        header;
 673          *      u64                             time;
 674          *      u64                             id;
 675          *      u64                             stream_id;
 676          *      struct sample_id                sample_id;
 677          * };
 678          */
 679         PERF_RECORD_THROTTLE                    = 5,
 680         PERF_RECORD_UNTHROTTLE                  = 6,
 681
 682         /*
 683          * struct {
 684          *      struct perf_event_header        header;
 685          *      u32                             pid, ppid;
 686          *      u32                             tid, ptid;
 687          *      u64                             time;
 688          *      struct sample_id                sample_id;
 689          * };
 690          */
 691         PERF_RECORD_FORK                        = 7,
 692
 693         /*
 694          * struct {
 695          *      struct perf_event_header        header;
 696          *      u32                             pid, tid;
 697          *
 698          *      struct read_format              values;
 699          *      struct sample_id                sample_id;
 700          * };
 701          */
 702         PERF_RECORD_READ                        = 8,
 703
 704         /*
 705          * struct {
 706          *      struct perf_event_header        header;
 707          *
 708          *      #
 709          *      # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.
 710          *      # The advantage of PERF_SAMPLE_IDENTIFIER is that its position
 711          *      # is fixed relative to header.
 712          *      #
 713          *
 714          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
 715          *      { u64                   ip;       } && PERF_SAMPLE_IP
 716          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
 717          *      { u64                   time;     } && PERF_SAMPLE_TIME
 718          *      { u64                   addr;     } && PERF_SAMPLE_ADDR
 719          *      { u64                   id;       } && PERF_SAMPLE_ID
 720          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
 721          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
 722          *      { u64                   period;   } && PERF_SAMPLE_PERIOD
 723          *
 724          *      { struct read_format    values;   } && PERF_SAMPLE_READ
 725          *
 726          *      { u64                   nr,
 727          *        u64                   ips[nr];  } && PERF_SAMPLE_CALLCHAIN
 728          *
 729          *      #
 730          *      # The RAW record below is opaque data wrt the ABI
 731          *      #
 732          *      # That is, the ABI doesn't make any promises wrt to
 733          *      # the stability of its content, it may vary depending
 734          *      # on event, hardware, kernel version and phase of
 735          *      # the moon.
 736          *      #
 737          *      # In other words, PERF_SAMPLE_RAW contents are not an ABI.
 738          *      #
 739          *
 740          *      { u32                   size;
 741          *        char                  data[size];}&& PERF_SAMPLE_RAW
 742          *
 743          *      { u64                   nr;
 744          *        { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK
 745          *
 746          *      { u64                   abi; # enum perf_sample_regs_abi
 747          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER
 748          *
 749          *      { u64                   size;
 750          *        char                  data[size];
 751          *        u64                   dyn_size; } && PERF_SAMPLE_STACK_USER
 752          *
 753          *      { u64                   weight;   } && PERF_SAMPLE_WEIGHT
 754          *      { u64                   data_src; } && PERF_SAMPLE_DATA_SRC
 755          *      { u64                   transaction; } && PERF_SAMPLE_TRANSACTION
 756          *      { u64                   abi; # enum perf_sample_regs_abi
 757          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR
 758          * };
 759          */
 760         PERF_RECORD_SAMPLE                      = 9,
 761
 762         /*
 763          * The MMAP2 records are an augmented version of MMAP, they add
 764          * maj, min, ino numbers to be used to uniquely identify each mapping
 765          *
 766          * struct {
 767          *      struct perf_event_header        header;
 768          *
 769          *      u32                             pid, tid;
 770          *      u64                             addr;
 771          *      u64                             len;
 772          *      u64                             pgoff;
 773          *      u32                             maj;
 774          *      u32                             min;
 775          *      u64                             ino;
 776          *      u64                             ino_generation;
 777          *      u32                             prot, flags;
 778          *      char                            filename[];
 779          *      struct sample_id                sample_id;
 780          * };
 781          */
 782         PERF_RECORD_MMAP2                       = 10,
 783
 784         /*
 785          * Records that new data landed in the AUX buffer part.
 786          *
 787          * struct {
 788          *      struct perf_event_header        header;
 789          *
 790          *      u64                             aux_offset;
 791          *      u64                             aux_size;
 792          *      u64                             flags;
 793          *      struct sample_id                sample_id;
 794          * };
 795          */
 796         PERF_RECORD_AUX                         = 11,
 797
 798         /*
 799          * Indicates that instruction trace has started
 800          *
 801          * struct {
 802          *      struct perf_event_header        header;
 803          *      u32                             pid;
 804          *      u32                             tid;
 805          * };
 806          */
 807         PERF_RECORD_ITRACE_START                = 12,
 808
 809         /*
 810          * Records the dropped/lost sample number.
 811          *
 812          * struct {
 813          *      struct perf_event_header        header;
 814          *
 815          *      u64                             lost;
 816          *      struct sample_id                sample_id;
 817          * };
 818          */
 819         PERF_RECORD_LOST_SAMPLES                = 13,
 820
 821         PERF_RECORD_MAX,                        /* non-ABI */
 822 };
 823
 824 #define PERF_MAX_STACK_DEPTH            127
 825
 826 enum perf_callchain_context {
 827         PERF_CONTEXT_HV                 = (__u64)-32,
 828         PERF_CONTEXT_KERNEL             = (__u64)-128,
 829         PERF_CONTEXT_USER               = (__u64)-512,
 830
 831         PERF_CONTEXT_GUEST              = (__u64)-2048,
 832         PERF_CONTEXT_GUEST_KERNEL       = (__u64)-2176,
 833         PERF_CONTEXT_GUEST_USER         = (__u64)-2560,
 834
 835         PERF_CONTEXT_MAX                = (__u64)-4095,
 836 };
 837
 838 /**
 839  * PERF_RECORD_AUX::flags bits
 840  */
 841 #define PERF_AUX_FLAG_TRUNCATED         0x01    /* record was truncated to fit */
 842 #define PERF_AUX_FLAG_OVERWRITE         0x02    /* snapshot from overwrite mode */
 843
 844 #define PERF_FLAG_FD_NO_GROUP           (1UL << 0)
 845 #define PERF_FLAG_FD_OUTPUT             (1UL << 1)
 846 #define PERF_FLAG_PID_CGROUP            (1UL << 2) /* pid=cgroup id, per-cpu mode only */
 847 #define PERF_FLAG_FD_CLOEXEC            (1UL << 3) /* O_CLOEXEC */
 848
 849 union perf_mem_data_src {
 850         __u64 val;
 851         struct {
 852                 __u64   mem_op:5,       /* type of opcode */
 853                         mem_lvl:14,     /* memory hierarchy level */
 854                         mem_snoop:5,    /* snoop mode */
 855                         mem_lock:2,     /* lock instr */
 856                         mem_dtlb:7,     /* tlb access */
 857                         mem_rsvd:31;
 858         };
 859 };
 860
 861 /* type of opcode (load/store/prefetch,code) */
 862 #define PERF_MEM_OP_NA          0x01 /* not available */
 863 #define PERF_MEM_OP_LOAD        0x02 /* load instruction */
 864 #define PERF_MEM_OP_STORE       0x04 /* store instruction */
 865 #define PERF_MEM_OP_PFETCH      0x08 /* prefetch */
 866 #define PERF_MEM_OP_EXEC        0x10 /* code (execution) */
 867 #define PERF_MEM_OP_SHIFT       0
 868
 869 /* memory hierarchy (memory level, hit or miss) */
 870 #define PERF_MEM_LVL_NA         0x01  /* not available */
 871 #define PERF_MEM_LVL_HIT        0x02  /* hit level */
 872 #define PERF_MEM_LVL_MISS       0x04  /* miss level  */
 873 #define PERF_MEM_LVL_L1         0x08  /* L1 */
 874 #define PERF_MEM_LVL_LFB        0x10  /* Line Fill Buffer */
 875 #define PERF_MEM_LVL_L2         0x20  /* L2 */
 876 #define PERF_MEM_LVL_L3         0x40  /* L3 */
 877 #define PERF_MEM_LVL_LOC_RAM    0x80  /* Local DRAM */
 878 #define PERF_MEM_LVL_REM_RAM1   0x100 /* Remote DRAM (1 hop) */
 879 #define PERF_MEM_LVL_REM_RAM2   0x200 /* Remote DRAM (2 hops) */
 880 #define PERF_MEM_LVL_REM_CCE1   0x400 /* Remote Cache (1 hop) */
 881 #define PERF_MEM_LVL_REM_CCE2   0x800 /* Remote Cache (2 hops) */
 882 #define PERF_MEM_LVL_IO         0x1000 /* I/O memory */
 883 #define PERF_MEM_LVL_UNC        0x2000 /* Uncached memory */
 884 #define PERF_MEM_LVL_SHIFT      5
 885
 886 /* snoop mode */
 887 #define PERF_MEM_SNOOP_NA       0x01 /* not available */
 888 #define PERF_MEM_SNOOP_NONE     0x02 /* no snoop */
 889 #define PERF_MEM_SNOOP_HIT      0x04 /* snoop hit */
 890 #define PERF_MEM_SNOOP_MISS     0x08 /* snoop miss */
 891 #define PERF_MEM_SNOOP_HITM     0x10 /* snoop hit modified */
 892 #define PERF_MEM_SNOOP_SHIFT    19
 893
 894 /* locked instruction */
 895 #define PERF_MEM_LOCK_NA        0x01 /* not available */
 896 #define PERF_MEM_LOCK_LOCKED    0x02 /* locked transaction */
 897 #define PERF_MEM_LOCK_SHIFT     24
 898
 899 /* TLB access */
 900 #define PERF_MEM_TLB_NA         0x01 /* not available */
 901 #define PERF_MEM_TLB_HIT        0x02 /* hit level */
 902 #define PERF_MEM_TLB_MISS       0x04 /* miss level */
 903 #define PERF_MEM_TLB_L1         0x08 /* L1 */
 904 #define PERF_MEM_TLB_L2         0x10 /* L2 */
 905 #define PERF_MEM_TLB_WK         0x20 /* Hardware Walker*/
 906 #define PERF_MEM_TLB_OS         0x40 /* OS fault handler */
 907 #define PERF_MEM_TLB_SHIFT      26
 908
 909 #define PERF_MEM_S(a, s) \
 910         (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
 911
 912 /*
 913  * single taken branch record layout:
 914  *
 915  *      from: source instruction (may not always be a branch insn)
 916  *        to: branch target
 917  *   mispred: branch target was mispredicted
 918  * predicted: branch target was predicted
 919  *
 920  * support for mispred, predicted is optional. In case it
 921  * is not supported mispred = predicted = 0.
 922  *
 923  *     in_tx: running in a hardware transaction
 924  *     abort: aborting a hardware transaction
 925  */
 926 struct perf_branch_entry {
 927         __u64   from;
 928         __u64   to;
 929         __u64   mispred:1,  /* target mispredicted */
 930                 predicted:1,/* target predicted */
 931                 in_tx:1,    /* in transaction */
 932                 abort:1,    /* transaction abort */
 933                 reserved:60;
 934 };
 935
 936 #endif /* _LINUX_PERF_EVENT_H */