1 /* $Id: memset.S,v 1.1 2000/04/14 16:49:01 mjd Exp $
3 * "memset" implementation of SuperH
5 * Copyright (C) 1999 Niibe Yutaka
7 * Copyright (c) 2009 STMicroelectronics Ltd
8 * Optimised using 64bit data transfer (via FPU) and the movca.l inst.
9 * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
11 * Licensed under the LGPL v2.1, see the file COPYING.LIB in this tarball.
15 * void *memset(void *s, int c, size_t n);
20 #if defined (__LITTLE_ENDIAN__) && defined (__SH_FPU_ANY__)
21 #define MEMSET_USES_FPU
22 /* Use paired single precision load or store mode for 64-bit tranfering.
23 * FPSCR.SZ=1,FPSCR.SZ=0 is well defined on both SH4-200 and SH4-300.
24 * Currenlty it has been only implemented and tested for little endian mode. */
25 .macro FPU_SET_PAIRED_PREC
27 mov #0x10, r1 ! PR=0 SZ=1
40 bt/s 40f ! if it's too small, set a byte at once
44 bt/s 2f ! It's aligned
57 ! Check if enough bytes need to be copied to be worth the big loop
59 cmp/gt r6,r0 ! (MT) 64 > len => slow loop
64 ! align the dst to the cache block size if necessary
71 bt/s 11f ! dst is already aligned
72 sub r1, r3 ! r3-r1 -> r3
73 shlr2 r3 ! number of loops
80 11: ! dst is 32byte aligned
83 shld r0,r2 ! number of loops
88 #ifdef MEMSET_USES_FPU
90 fsts fpul, fr0 ! Dr0 will be 'VVVVVVVV'
131 shlr r0 ! r0 = r6 >> 3
134 mov.l r5,@-r4 ! set 8-byte at once
141 ! fill bytes (length may be zero)
152 libc_hidden_def (memset)