This fixes a leak on cell destruction because we left the GICv2 mapped,
thus didn't free all paging structures. This also means we need to run
the irqchip cleanup before the cell MMU destruction.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
unsigned int cpu;
struct per_cpu *percpu;
- arch_mmu_cell_destroy(cell);
-
for_each_cpu(cpu, cell->cpu_set) {
percpu = per_cpu(cpu);
/* Re-assign the physical IDs for the root cell */
}
irqchip_cell_exit(cell);
+
+ arch_mmu_cell_destroy(cell);
}
/* Note: only supports synchronous flushing as triggered by config_commit! */
static void gic_cell_exit(struct cell *cell)
{
+ paging_destroy(&cell->arch.mm, (unsigned long)gicc_base, gicc_size,
+ PAGING_NON_COHERENT);
/* Reset interrupt routing of the cell's spis */
gic_target_spis(cell, &root_cell);
}