core: add load barrier for serialization

Introduce a memory load barrier function.

Signed-off-by: Henning Schild <henning.schild@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

diff --git a/hypervisor/arch/arm/include/asm/processor.h b/hypervisor/arch/arm/include/asm/processor.h
index d42be81dc300f56f575174029bda83c5f4f02087..4c5c54fa5e3e882bd3bc80528293fce9b28b5b4d 100644 (file)
--- a/hypervisor/arch/arm/include/asm/processor.h
+++ b/hypervisor/arch/arm/include/asm/processor.h
@@ -26,6 +26,10 @@ static inline void memory_barrier(void)
 {
 }
 
+static inline void memory_load_barrier(void)
+{
+}
+
 #endif /* !__ASSEMBLY__ */
 
 #endif /* !_JAILHOUSE_ASM_PROCESSOR_H */

diff --git a/hypervisor/arch/x86/include/asm/processor.h b/hypervisor/arch/x86/include/asm/processor.h
index b75e16ac2e3266610861ff2072f3ac56b1f0997d..ba9cbf26131a421fa2da90a12c50d3be8668cf84 100644 (file)
--- a/hypervisor/arch/x86/include/asm/processor.h
+++ b/hypervisor/arch/x86/include/asm/processor.h
@@ -161,6 +161,11 @@ static inline void memory_barrier(void)
        asm volatile("mfence" : : : "memory");
 }
 
+static inline void memory_load_barrier(void)
+{
+       asm volatile("lfence" : : : "memory");
+}
+
 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
                           unsigned int *ecx, unsigned int *edx)
 {