x86: Remove guest registers parameter from vcpu_handle_msr_read/write

The function only works against the current CPU, thus should avoid to
take the misleading parameter. The necessary reference can be obtained
from the per-cpu data structure now.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

diff --git a/hypervisor/arch/x86/include/asm/vcpu.h b/hypervisor/arch/x86/include/asm/vcpu.h
index f43e6ef3480aafc87309cfc048d55d0118137798..a42d8af41815339be2ba9a2d155ccace6c8d4b60 100644 (file)
--- a/hypervisor/arch/x86/include/asm/vcpu.h
+++ b/hypervisor/arch/x86/include/asm/vcpu.h
@@ -110,8 +110,8 @@ void vcpu_handle_hypercall(void);
 bool vcpu_handle_io_access(void);
 bool vcpu_handle_mmio_access(void);
 
-bool vcpu_handle_msr_read(union registers *guest_regs);
-bool vcpu_handle_msr_write(union registers *guest_regs);
+bool vcpu_handle_msr_read(void);
+bool vcpu_handle_msr_write(void);
 
 bool vcpu_handle_xsetbv(void);
 

diff --git a/hypervisor/arch/x86/svm.c b/hypervisor/arch/x86/svm.c
index 69ccb635c1a564ccd304f9d0d708891b29cfa8d2..0299cc19918da47d9c28c73dbbcf3a7f5681e98e 100644 (file)
--- a/hypervisor/arch/x86/svm.c
+++ b/hypervisor/arch/x86/svm.c
@@ -838,7 +838,7 @@ static bool svm_handle_msr_write(union registers *guest_regs,
                return true;
        }
 
-       return vcpu_handle_msr_write(guest_regs);
+       return vcpu_handle_msr_write();
 }
 
 /*
@@ -962,7 +962,7 @@ void vcpu_handle_exit(struct per_cpu *cpu_data)
        case VMEXIT_MSR:
                cpu_data->stats[JAILHOUSE_CPU_STAT_VMEXITS_MSR]++;
                if (!vmcb->exitinfo1)
-                       res = vcpu_handle_msr_read(guest_regs);
+                       res = vcpu_handle_msr_read();
                else
                        res = svm_handle_msr_write(guest_regs, cpu_data);
                if (res)

diff --git a/hypervisor/arch/x86/vcpu.c b/hypervisor/arch/x86/vcpu.c
index 12cf5cbc975a145c650892123c0d53f21b8a60eb..0bb6bb76d0d0c8b0ad8f2706469549222789f8ee 100644 (file)
--- a/hypervisor/arch/x86/vcpu.c
+++ b/hypervisor/arch/x86/vcpu.c
@@ -239,23 +239,24 @@ invalid_access:
        return false;
 }
 
-bool vcpu_handle_msr_read(union registers *guest_regs)
+bool vcpu_handle_msr_read(void)
 {
        struct per_cpu *cpu_data = this_cpu_data();
 
-       switch (guest_regs->rcx) {
+       switch (cpu_data->guest_regs.rcx) {
        case MSR_X2APIC_BASE ... MSR_X2APIC_END:
                x2apic_handle_read();
                break;
        case MSR_IA32_PAT:
-               set_rdmsr_value(guest_regs, cpu_data->pat);
+               set_rdmsr_value(&cpu_data->guest_regs, cpu_data->pat);
                break;
        case MSR_IA32_MTRR_DEF_TYPE:
-               set_rdmsr_value(guest_regs, cpu_data->mtrr_def_type);
+               set_rdmsr_value(&cpu_data->guest_regs,
+                               cpu_data->mtrr_def_type);
                break;
        default:
                panic_printk("FATAL: Unhandled MSR read: %x\n",
-                            guest_regs->rcx);
+                            cpu_data->guest_regs.rcx);
                return false;
        }
 
@@ -263,19 +264,19 @@ bool vcpu_handle_msr_read(union registers *guest_regs)
        return true;
 }
 
-bool vcpu_handle_msr_write(union registers *guest_regs)
+bool vcpu_handle_msr_write(void)
 {
        struct per_cpu *cpu_data = this_cpu_data();
        unsigned int bit_pos, pa;
        unsigned long val;
 
-       switch (guest_regs->rcx) {
+       switch (cpu_data->guest_regs.rcx) {
        case MSR_X2APIC_BASE ... MSR_X2APIC_END:
                if (!x2apic_handle_write())
                        return false;
                break;
        case MSR_IA32_PAT:
-               val = get_wrmsr_value(guest_regs);
+               val = get_wrmsr_value(&cpu_data->guest_regs);
                for (bit_pos = 0; bit_pos < 64; bit_pos += 8) {
                        pa = (val >> bit_pos) & 0xff;
                        /* filter out reserved memory types */
@@ -295,14 +296,14 @@ bool vcpu_handle_msr_write(union registers *guest_regs)
                 * setting the guest PAT to 0. When enabled, guest PAT +
                 * host-controlled MTRRs define the guest's memory types.
                 */
-               val = get_wrmsr_value(guest_regs);
+               val = get_wrmsr_value(&cpu_data->guest_regs);
                cpu_data->mtrr_def_type = val;
                vcpu_vendor_set_guest_pat(val & MTRR_ENABLE ?
                                          cpu_data->pat : 0);
                break;
        default:
                panic_printk("FATAL: Unhandled MSR write: %x\n",
-                            guest_regs->rcx);
+                            cpu_data->guest_regs.rcx);
                return false;
        }
 

diff --git a/hypervisor/arch/x86/vmx.c b/hypervisor/arch/x86/vmx.c
index b17ad2febb7e0d28f34584551a25b31e02f2de22..2d2c0366b4e3ce80424fc7fc166236e32984b8fe 100644 (file)
--- a/hypervisor/arch/x86/vmx.c
+++ b/hypervisor/arch/x86/vmx.c
@@ -1078,7 +1078,7 @@ void vcpu_handle_exit(struct per_cpu *cpu_data)
                break;
        case EXIT_REASON_MSR_READ:
                cpu_data->stats[JAILHOUSE_CPU_STAT_VMEXITS_MSR]++;
-               if (vcpu_handle_msr_read(guest_regs))
+               if (vcpu_handle_msr_read())
                        return;
                break;
        case EXIT_REASON_MSR_WRITE:
@@ -1087,7 +1087,7 @@ void vcpu_handle_exit(struct per_cpu *cpu_data)
                        /* ignore writes */
                        vcpu_skip_emulated_instruction(X86_INST_LEN_WRMSR);
                        return;
-               } else if (vcpu_handle_msr_write(guest_regs))
+               } else if (vcpu_handle_msr_write())
                        return;
                break;
        case EXIT_REASON_APIC_ACCESS: