They are all harmless. At least TCSEL is used on device initialization.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
struct jailhouse_irqchip irqchips[1];
__u8 pio_bitmap[0x2000];
struct jailhouse_pci_device pci_devices[13];
struct jailhouse_irqchip irqchips[1];
__u8 pio_bitmap[0x2000];
struct jailhouse_pci_device pci_devices[13];
- struct jailhouse_pci_capability pci_caps[27];
+ struct jailhouse_pci_capability pci_caps[28];
} __attribute__((packed)) config = {
.header = {
.hypervisor_memory = {
} __attribute__((packed)) config = {
.header = {
.hypervisor_memory = {
.domain = 0x0,
.bdf = 0xd8,
.caps_start = 21,
.domain = 0x0,
.bdf = 0xd8,
.caps_start = 21,
.num_msi_vectors = 1,
.msi_64bits = 1,
},
.num_msi_vectors = 1,
.msi_64bits = 1,
},
.iommu = 1,
.domain = 0x0,
.bdf = 0xfa,
.iommu = 1,
.domain = 0x0,
.bdf = 0xfa,
.num_caps = 3,
.num_msi_vectors = 1,
},
.num_caps = 3,
.num_msi_vectors = 1,
},
+ { /* non-cap registers: HDCTL, TCSEL, DCKCTL,DCKSTS */
+ .start = 0x40,
+ .len = 0x10,
+ .flags = JAILHOUSE_PCICAPS_WRITE,
+ },
/* PCIDevice: 00:1f.2 */
{
.id = 0x5,
/* PCIDevice: 00:1f.2 */
{
.id = 0x5,