core: ivshmem: Simplify pci_ivshmem_cfg_read

Masking of the returned value is already done by the callers. So we just
need to shift the DWORD according to the access address.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

diff --git a/hypervisor/include/jailhouse/pci.h b/hypervisor/include/jailhouse/pci.h
index a4afeead5b28b9cf201aae727a0663565425959a..cf7439119432ac8265964cb880b562abd6619fe8 100644 (file)
--- a/hypervisor/include/jailhouse/pci.h
+++ b/hypervisor/include/jailhouse/pci.h
@@ -252,7 +252,7 @@ int pci_ivshmem_update_msix(struct pci_device *dev);
 enum pci_access pci_ivshmem_cfg_write(struct pci_device *dev, unsigned int row,
                                      u32 mask, u32 value);
 enum pci_access pci_ivshmem_cfg_read(struct pci_device *dev, u16 address,
-                                    u8 sz, u32 *value);
+                                    u32 *value);
 int ivshmem_mmio_access_handler(const struct cell *cell, bool is_write,
                                u64 addr, u32 *value);
 /** @} PCI-IVSHMEM */

diff --git a/hypervisor/pci.c b/hypervisor/pci.c
index f31b8d6c72d6f790e4df40a26e3c6ce195ec488e..5dbc91d52262f5ae8fab81c0e362818764d0779e 100644 (file)
--- a/hypervisor/pci.c
+++ b/hypervisor/pci.c
@@ -207,7 +207,7 @@ enum pci_access pci_cfg_read_moderate(struct pci_device *device, u16 address,
        }
 
        if (device->info->type == JAILHOUSE_PCI_TYPE_IVSHMEM)
-               return pci_ivshmem_cfg_read(device, address, size, value);
+               return pci_ivshmem_cfg_read(device, address, value);
 
        if (address < PCI_CONFIG_HEADER_SIZE)
                return PCI_ACCESS_PERFORM;

diff --git a/hypervisor/pci_ivshmem.c b/hypervisor/pci_ivshmem.c
index c5b2a2c4de8f5b4dfe96484e44276915060819e1..281587d8e2e55f2ea3472d8ef928ffdefe40b39d 100644 (file)
--- a/hypervisor/pci_ivshmem.c
+++ b/hypervisor/pci_ivshmem.c
@@ -95,25 +95,6 @@ static const struct virt_pci_bar default_bars[3] = {
        }
 };
 
-static u32 ivshmem_cfg_read32(struct pci_ivshmem_endpoint *ive, u8 reg)
-{
-       return ive->cspace[reg / 4];
-}
-
-static u16 ivshmem_cfg_read16(struct pci_ivshmem_endpoint *ive, u8 reg)
-{
-       unsigned int bias = reg % 4;
-
-       return (u16)(ivshmem_cfg_read32(ive, reg - bias) >> (bias * 8));
-}
-
-static u8 ivshmem_cfg_read8(struct pci_ivshmem_endpoint *ive, u8 reg)
-{
-       unsigned int bias = reg % 4;
-
-       return (u8)(ivshmem_cfg_read32(ive, reg - bias) >> (bias * 8));
-}
-
 static bool ivshmem_is_msix_masked(struct pci_ivshmem_endpoint *ive)
 {
        union pci_msix_registers c;
@@ -428,7 +409,6 @@ enum pci_access pci_ivshmem_cfg_write(struct pci_device *dev, unsigned int row,
  * Handler for MMIO-read-accesses to PCI config space of this virtual device.
  * @param dev          The device that access should be performed on.
  * @param address      Config space address accessed.
- * @param sz           The amount of bytes to read.
  * @param value                Pointer to the return value.
  *
  * @return PCI_ACCESS_DONE.
@@ -436,31 +416,14 @@ enum pci_access pci_ivshmem_cfg_write(struct pci_device *dev, unsigned int row,
  * @see pci_cfg_read_moderate
  */
 enum pci_access pci_ivshmem_cfg_read(struct pci_device *dev, u16 address,
-                                    u8 sz, u32 *value)
+                                    u32 *value)
 {
        struct pci_ivshmem_endpoint *ive = dev->ivshmem_endpoint;
 
-       if (address > (sizeof(default_cspace) - sz))
-               goto fail;
-
-       switch (sz) {
-       case 1:
-               *value = (u32)ivshmem_cfg_read8(ive, address);
-               break;
-       case 2:
-               *value = (u32)ivshmem_cfg_read16(ive, address);
-               break;
-       case 4:
-               *value = ivshmem_cfg_read32(ive, address);
-               break;
-       default:
-               goto fail;
-       }
-       return PCI_ACCESS_DONE;
-
-fail:
-       *value = -1;
-       /* the caller can not deal with PCI_ACCESS_REJECT for reads */
+       if (address < sizeof(default_cspace))
+               *value = ive->cspace[address / 4] >> ((address % 4) * 8);
+       else
+               *value = -1;
        return PCI_ACCESS_DONE;
 }