x86: Hand over the APIC in soft-disabled state

This brings the Spurious-Interrupt Vector Register into its well-defined
reset state before handing the APIC over. Avoids surprises for cells and
the need for additional explanations.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

diff --git a/hypervisor/arch/x86/apic.c b/hypervisor/arch/x86/apic.c
index 1cfd543534ce79be3c22fe5a7d4b5b8b6fb87373..9f88fe63068fe749826ee981dcfdeef829b5e9e7 100644 (file)
--- a/hypervisor/arch/x86/apic.c
+++ b/hypervisor/arch/x86/apic.c
@@ -326,8 +326,9 @@ void apic_clear(void)
        cpu_relax();
        disable_irq();
 
-       /* Finally, reset the TPR again */
+       /* Finally, reset the TPR again and disable the APIC */
        apic_ops.write(APIC_REG_TPR, 0);
+       apic_ops.write(APIC_REG_SVR, 0xff);
 }
 
 static bool apic_valid_ipi_mode(u32 lo_val)