arm: Remove return codes from gic[v3]_handle_sgir_write

Those services always succeed.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

diff --git a/hypervisor/arch/arm/gic-common.c b/hypervisor/arch/arm/gic-common.c
index 40e8c37a757a474ee16ad469f7a04acd3c529557..87c1102bf9a95c9de5adf49f43be50bbbe0ddf3a 100644 (file)
--- a/hypervisor/arch/arm/gic-common.c
+++ b/hypervisor/arch/arm/gic-common.c
@@ -234,7 +234,8 @@ static int handle_sgir_access(struct mmio_access *mmio)
        sgi.aff3 = 0;
        sgi.id = val & 0xf;
 
-       return gic_handle_sgir_write(&sgi, false);
+       gic_handle_sgir_write(&sgi, false);
+       return TRAP_HANDLED;
 }
 
 /*
@@ -259,7 +260,7 @@ int gic_probe_cpu_id(unsigned int cpu)
        return 0;
 }
 
-int gic_handle_sgir_write(struct sgi *sgi, bool virt_input)
+void gic_handle_sgir_write(struct sgi *sgi, bool virt_input)
 {
        struct per_cpu *cpu_data = this_cpu_data();
        unsigned int cpu;
@@ -296,8 +297,6 @@ int gic_handle_sgir_write(struct sgi *sgi, bool virt_input)
        /* Let the other CPUS inject their SGIs */
        sgi->id = SGI_INJECT;
        irqchip_send_sgi(sgi);
-
-       return TRAP_HANDLED;
 }
 
 int gic_handle_dist_access(struct mmio_access *mmio)

diff --git a/hypervisor/arch/arm/gic-v3.c b/hypervisor/arch/arm/gic-v3.c
index 7014f8345c0dfd0b3b9b672032c05e859c6aa86b..a0f60cbc73bae31f5b0274747dbd1e2143c6ffde 100644 (file)
--- a/hypervisor/arch/arm/gic-v3.c
+++ b/hypervisor/arch/arm/gic-v3.c
@@ -318,7 +318,7 @@ static int gic_send_sgi(struct sgi *sgi)
        return 0;
 }
 
-int gicv3_handle_sgir_write(u64 sgir)
+void gicv3_handle_sgir_write(u64 sgir)
 {
        struct sgi sgi;
        unsigned long routing_mode = !!(sgir & ICC_SGIR_ROUTING_BIT);
@@ -331,7 +331,7 @@ int gicv3_handle_sgir_write(u64 sgir)
        sgi.aff3 = sgir >> ICC_SGIR_AFF3_SHIFT & 0xff;
        sgi.id = sgir >> ICC_SGIR_IRQN_SHIFT & 0xf;
 
-       return gic_handle_sgir_write(&sgi, true);
+       gic_handle_sgir_write(&sgi, true);
 }
 
 static void gic_eoi_irq(u32 irq_id, bool deactivate)

diff --git a/hypervisor/arch/arm/include/asm/gic_common.h b/hypervisor/arch/arm/include/asm/gic_common.h
index 4dd735a3d463e733dbcfd2773f2191caa2d17b7b..a49fbfe9cd231763cd927b8bc3e8c6623e497149 100644 (file)
--- a/hypervisor/arch/arm/include/asm/gic_common.h
+++ b/hypervisor/arch/arm/include/asm/gic_common.h
@@ -50,7 +50,7 @@ struct sgi;
 
 int gic_probe_cpu_id(unsigned int cpu);
 int gic_handle_dist_access(struct mmio_access *access);
-int gic_handle_sgir_write(struct sgi *sgi, bool virt_input);
+void gic_handle_sgir_write(struct sgi *sgi, bool virt_input);
 void gic_handle_irq(struct per_cpu *cpu_data);
 void gic_target_spis(struct cell *config_cell, struct cell *dest_cell);
 

diff --git a/hypervisor/arch/arm/include/asm/gic_v3.h b/hypervisor/arch/arm/include/asm/gic_v3.h
index b9771ebc2db89bcfa5a5834029bf854c945e3f2b..4bf2bbadb05a7257f4d76505a902d24ba2525c48 100644 (file)
--- a/hypervisor/arch/arm/include/asm/gic_v3.h
+++ b/hypervisor/arch/arm/include/asm/gic_v3.h
@@ -260,7 +260,7 @@ static inline u32 gic_read_iar(void)
        return irq_id;
 }
 
-int gicv3_handle_sgir_write(u64 sgir);
+void gicv3_handle_sgir_write(u64 sgir);
 
 #endif /* __ASSEMBLY__ */
 #endif /* _JAILHOUSE_ASM_GIC_V3_H */

diff --git a/hypervisor/arch/arm/traps.c b/hypervisor/arch/arm/traps.c
index 924aaa6520fdc2e2726b9cc119d37ff0415f5a5d..71246e934ef8d8c1e7d6f19903721871e731a693 100644 (file)
--- a/hypervisor/arch/arm/traps.c
+++ b/hypervisor/arch/arm/traps.c
@@ -273,7 +273,8 @@ static int arch_handle_cp15_64(struct trap_context *ctx)
        /* Trapped ICC_SGI1R write */
        if (!read && opc1 == 0 && crm == 12) {
                arch_skip_instruction(ctx);
-               return gicv3_handle_sgir_write((u64)rt2_val << 32 | rt_val);
+               gicv3_handle_sgir_write((u64)rt2_val << 32 | rt_val);
+               return TRAP_HANDLED;
        }
 #else
        /* Avoid `unused' warning... */