#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
-struct {
- struct jailhouse_cell_desc cell;
- __u64 cpus[1];
- struct jailhouse_memory mem_regions[1];
- struct jailhouse_irqchip irqchips[0];
- __u8 pio_bitmap[0x2000];
- struct jailhouse_pci_device pci_devices[0];
-} __attribute__((packed)) config = {
- .cell = {
- .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
- .name = "fiasco-demo",
- .flags = 0/*JAILHOUSE_CELL_PASSIVE_COMMREG*/,
+ struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[1];
+ struct jailhouse_irqchip irqchips[0];
+ struct jailhouse_cache cache_regions[1];
+ __u8 pio_bitmap[0x2000];
+ struct jailhouse_pci_device pci_devices[0];
+ } __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .name = "fiasco-demo",
+ .flags = 0/*JAILHOUSE_CELL_PASSIVE_COMMREG*/,
- .cpu_set_size = sizeof(config.cpus),
- .num_memory_regions = ARRAY_SIZE(config.mem_regions),
- .num_irqchips = ARRAY_SIZE(config.irqchips),
- .pio_bitmap_size = ARRAY_SIZE(config.pio_bitmap),
- .num_pci_devices = ARRAY_SIZE(config.pci_devices),
- .num_pci_caps = 0,
- },
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_cache_regions = ARRAY_SIZE(config.cache_regions),
+ .pio_bitmap_size = ARRAY_SIZE(config.pio_bitmap),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .num_pci_caps = 0,
+ },
- .cpus = {
- 0b000010,
- },
+ .cpus = {
+ 0b000010,
+ },
+
+ .mem_regions = {
+ /* low RAM */ {
+ .phys_start = 0x3b600000,
+ .virt_start = 0,
+ .size = 0x3c00000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
+ JAILHOUSE_MEM_LOADABLE,
+ },
+ },
- .mem_regions = {
- /* low RAM */ {
- .phys_start = 0x3b600000,
- .virt_start = 0,
- .size = 0x3c00000,
- .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
- JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
- JAILHOUSE_MEM_LOADABLE,
+ .cache_regions = {
+ {
+ .start = 0,
+ .size = 2,
+ .type = JAILHOUSE_CACHE_L3,
},
- },
+ },
+
+ .pio_bitmap = {
- .pio_bitmap = {
-
- [ 0/8 ... 0x3f/8] = -1,
- [ 0x20/8 ... 0x28/8] = 0xfc, /* PIC Master 0x20 0x21 */
- [ 0x29/8 ... 0x3f/8] = -1,
+ [ 0/8 ... 0x1f/8] = -1,
+ [ 0x20/8 ... 0x27/8] = 0xfc, /* PIC Master 0x20 0x21 */
+ [ 0x28/8 ... 0x3f/8] = -1,
[ 0x40/8 ... 0x47/8] = 0xf0, /* PIT */
- [ 0x48/8 ... 0x5f/8] = -1,
- [ 0x60/8 ... 0x67/8] = 0,
- [ 0x68/8 ... 0x7f/8] = -1,
- [ 0x80/8 ... 0x88/8] = 0xfe, //delay
- [ 0x89/8 ... 0x99/8] = -1,
- [ 0xA0/8 ... 0xA8/8] = 0xfc, /* PIC Slave 0xA0 0xA1 */
- [ 0xA9/8 ... 0x3f7/8] = -1,
+ [ 0x48/8 ... 0x5f/8] = -1,
+ [ 0x60/8 ... 0x67/8] = 0,
+ [ 0x68/8 ... 0x7f/8] = -1,
+ [ 0x80/8 ... 0x87/8] = 0xfe, //delay
+ [ 0x88/8 ... 0x99/8] = -1,
+ [ 0xa0/8 ... 0xa7/8] = 0xfc, /* PIC Slave 0xA0 0xA1 */
+ [ 0xa8/8 ... 0x3f7/8] = -1,
[ 0x3f8/8 ... 0x3ff/8] = 0, /* serial0 */
[ 0x400/8 ... 0xe00f/8] = -1,
[0xe010/8 ... 0xe017/8] = -1, /* OXPCIe952 serial1 */
.phys_start = 0x37600000,
.size = 0x4000000,
},
+ .debug_console = {
+ .phys_start = 0x3f8,
+ },
.platform_info.x86 = {
.mmconfig_base = 0xf8000000,
.mmconfig_end_bus = 0x3f,
.pm_timer_address = 0x408,
-
- .iommu_base = {
- 0xfed90000,
- 0xfed91000,
- },
-
+ .iommu_units = {
+ {
+ .base = 0xfed90000,
+ .size = 0x1000,
+ },
+ {
+ .base = 0xfed91000,
+ .size = 0x1000,
+ },
+ },
},
- .device_limit = 128,
.interrupt_limit = 256,
.root_cell = {
.name = "RootCell",
{
.address = 0xfec00000,
.id = 0x1f0f8,
- .pin_bitmap = 0xffffff,
+ .pin_bitmap = {
+ 0xffffff
+ },
},
},
[ 0x60/8 ... 0x67/8] = 0xec, /* HACK: NMI status/control */
[ 0x68/8 ... 0x6f/8] = -1,
[ 0x70/8 ... 0x77/8] = 0xfc, /* RTC */
- [ 0x78/8 ... 0x7f/7] = -1,
+ [ 0x78/8 ... 0x7f/8] = -1,
[ 0x80/8 ... 0x87/8] = 0xfe, /* Linux: native_io_delay() */
- [ 0x88/8 ... 0xec/8] = -1,
- [ 0xed/8 ... 0xf5/8] = 0xfe, /*port 0xed delay experimental*/
- [ 0xf6/8 ... 0x2f7/8] = -1,
+ [ 0x88/8 ... 0xe7/8] = -1,
+ [ 0xe8/8 ... 0xef/8] = 0xdf, /*port 0xed delay experimental*/
+ [ 0xf0/8 ... 0x2f7/8] = -1,
[ 0x2f8/8 ... 0x2ff/8] = 0,/*serial 1*/
[ 0x300/8 ... 0x3af/8] = -1,
- [ 0x3b0/8 ... 0x3df/8] = 0x00, /* VGA */
+ [ 0x3b0/8 ... 0x3df/8] = 0x00, /* VGA */
[ 0x3e0/8 ... 0x3f7/8] = -1,
[ 0x3f8/8 ... 0x3ff/8] = -1,/*serial 0*/
- [ 0x400/8 ... 0xeff/8] = -1,
- [ 0xd00/8 ... 0xffff/8] = 0, /* HACK: PCI bus */
+ [ 0x400/8 ... 0xcff/8] = -1,
+ [ 0xd00/8 ... 0xffff/8] = 0, /* HACK: full PCI */
},
.pci_devices = {
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
-
+
/* MemRegion: fed00000-fed003ff : PNP0103:00 */
{
.phys_start = 0xfed00000,
[ 0x78/8 ... 0x7f/8] = -1,
[ 0x80/8 ... 0x87/8] = 0xfe, /* port 80 (delays) */
- [ 0x88/8 ... 0xec/8] = -1,
- [ 0xed/8 ... 0xf5/8] = 0xfe, /*port 0xed delay experimental*/
- [ 0xf6/8 ... 0x1c7/8] = -1,
-
+ [ 0x88/8 ... 0xe7/8] = -1,
+ [ 0xe8/8 ... 0xef/8] = 0xdf, /*port 0xed delay experimental*/
+ [ 0xf0/8 ... 0x1c7/8] = -1,
+
[ 0x1c8/8 ... 0x1cf/8] = 0x3f, /* vbe */
[ 0x1d0/8 ... 0x1d7/8] = 0xfe, /* vbe */
[ 0x1d8/8 ... 0x2f7/8] = -1,
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.domain = 0x0000,
.bdf = 0x00ea,
- },
+ },
{/*ehci_pci 00:1d.7*/
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.domain = 0x0000,
.shmem_region = 12,
.num_msix_vectors = 1,
},
-
+
},
.pci_caps = {