2 * Jailhouse, a Linux-based partitioning hypervisor
4 * Copyright (c) Siemens AG, 2014
7 * Ivan Kolchin <ivan.kolchin@siemens.com>
8 * Jan Kiszka <jan.kiszka@siemens.com>
10 * This work is licensed under the terms of the GNU GPL, version 2. See
11 * the COPYING file in the top-level directory.
14 #include <jailhouse/acpi.h>
15 #include <jailhouse/control.h>
16 #include <jailhouse/mmio.h>
17 #include <jailhouse/pci.h>
18 #include <jailhouse/printk.h>
19 #include <jailhouse/utils.h>
21 #define PCI_CONFIG_HEADER_SIZE 0x40
23 struct acpi_mcfg_alloc {
29 } __attribute__((packed));
31 struct acpi_mcfg_table {
32 struct acpi_table_header header;
34 struct acpi_mcfg_alloc alloc_structs[];
35 } __attribute__((packed));
37 #define for_each_configured_pci_device(dev, cell) \
38 for ((dev) = (cell)->pci_devices; \
39 (dev) - (cell)->pci_devices < (cell)->config->num_pci_devices; \
42 /* entry for PCI config space whitelist (granting access) */
43 struct pci_cfg_access {
44 u32 reg_num; /** Register number (4-byte aligned) */
45 u32 mask; /** Bit set: access allowed */
48 /* --- Whilelist for writing to PCI config space registers --- */
49 /* Type 1: Endpoints */
50 static const struct pci_cfg_access endpoint_write_access[] = {
51 { 0x04, 0xffffffff }, /* Command, Status */
52 { 0x0c, 0xff00ffff }, /* BIST, Latency Timer, Cacheline */
53 { 0x3c, 0x000000ff }, /* Int Line */
56 static const struct pci_cfg_access bridge_write_access[] = {
57 { 0x04, 0xffffffff }, /* Command, Status */
58 { 0x0c, 0xff00ffff }, /* BIST, Latency Timer, Cacheline */
59 { 0x3c, 0xffff00ff }, /* Int Line, Bridge Control */
62 static void *pci_space;
63 static u64 pci_mmcfg_addr;
64 static u32 pci_mmcfg_size;
67 static void *pci_get_device_mmcfg_base(u16 bdf)
69 return pci_space + ((unsigned long)bdf << 12);
73 * pci_read_config() - Read from PCI config space
74 * @bdf: 16-bit bus/device/function ID of target
75 * @address: Config space access address
76 * @size: Access size (1, 2 or 4 bytes)
80 u32 pci_read_config(u16 bdf, u16 address, unsigned int size)
82 void *mmcfg_addr = pci_get_device_mmcfg_base(bdf) + address;
84 if (!pci_space || PCI_BUS(bdf) > end_bus)
85 return arch_pci_read_config(bdf, address, size);
88 return mmio_read8(mmcfg_addr);
90 return mmio_read16(mmcfg_addr);
92 return mmio_read32(mmcfg_addr);
96 * pci_write_config() - Write to PCI config space
97 * @bdf: 16-bit bus/device/function ID of target
98 * @address: Config space access address
99 * @value: Value to be written
100 * @size: Access size (1, 2 or 4 bytes)
102 void pci_write_config(u16 bdf, u16 address, u32 value, unsigned int size)
104 void *mmcfg_addr = pci_get_device_mmcfg_base(bdf) + address;
106 if (!pci_space || PCI_BUS(bdf) > end_bus)
107 return arch_pci_write_config(bdf, address, value, size);
110 mmio_write8(mmcfg_addr, value);
112 mmio_write16(mmcfg_addr, value);
114 mmio_write32(mmcfg_addr, value);
118 * pci_get_assigned_device() - Look up device owned by a cell
120 * @bdf: 16-bit bus/device/function ID
122 * Return: Pointer to owned PCI device or NULL.
124 struct pci_device *pci_get_assigned_device(const struct cell *cell, u16 bdf)
126 const struct jailhouse_pci_device *dev_info =
127 jailhouse_cell_pci_devices(cell->config);
130 /* We iterate over the static device information to increase cache
132 for (n = 0; n < cell->config->num_pci_devices; n++)
133 if (dev_info[n].bdf == bdf)
134 return cell->pci_devices[n].cell ?
135 &cell->pci_devices[n] : NULL;
141 * pci_find_capability() - Look up capability at given config space address
142 * @device: The device to be accessed
143 * @address: Config space access address
145 * Return: Corresponding capability structure or NULL if none found.
147 static const struct jailhouse_pci_capability *
148 pci_find_capability(struct pci_device *device, u16 address)
150 const struct jailhouse_pci_capability *cap =
151 jailhouse_cell_pci_caps(device->cell->config) +
152 device->info->caps_start;
155 for (n = 0; n < device->info->num_caps; n++, cap++)
156 if (cap->start <= address && cap->start + cap->len > address)
163 * pci_cfg_read_moderate() - Moderate config space read access
164 * @device: The device to be accessed; if NULL, access will be emulated,
165 * returning a value of -1
166 * @address: Config space address
167 * @size: Access size (1, 2 or 4 bytes)
168 * @value: Pointer to buffer to receive the emulated value if
169 * PCI_ACCESS_DONE is returned
171 * Return: PCI_ACCESS_PERFORM or PCI_ACCESS_DONE.
173 enum pci_access pci_cfg_read_moderate(struct pci_device *device, u16 address,
174 unsigned int size, u32 *value)
176 const struct jailhouse_pci_capability *cap;
180 return PCI_ACCESS_DONE;
183 if (address < PCI_CONFIG_HEADER_SIZE)
184 return PCI_ACCESS_PERFORM;
186 cap = pci_find_capability(device, address);
188 return PCI_ACCESS_PERFORM;
190 // TODO: Emulate MSI/MSI-X etc.
192 return PCI_ACCESS_PERFORM;
196 * pci_cfg_write_moderate() - Moderate config space write access
197 * @device: The device to be accessed; if NULL, access will be rejected
198 * @address: Config space address
199 * @size: Access size (1, 2 or 4 bytes)
200 * @value: Value to be written
202 * Return: PCI_ACCESS_REJECT, PCI_ACCESS_PERFORM or PCI_ACCESS_DONE.
204 enum pci_access pci_cfg_write_moderate(struct pci_device *device, u16 address,
205 unsigned int size, u32 value)
207 const struct jailhouse_pci_capability *cap;
208 /* initialize list to work around wrong compiler warning */
209 const struct pci_cfg_access *list = NULL;
210 unsigned int n, bias_shift, len = 0;
214 return PCI_ACCESS_REJECT;
216 if (address < PCI_CONFIG_HEADER_SIZE) {
217 if (device->info->type == JAILHOUSE_PCI_TYPE_DEVICE) {
218 list = endpoint_write_access;
219 len = ARRAY_SIZE(endpoint_write_access);
220 } else if (device->info->type == JAILHOUSE_PCI_TYPE_BRIDGE) {
221 list = bridge_write_access;
222 len = ARRAY_SIZE(bridge_write_access);
225 bias_shift = (address & 0x003) * 8;
226 mask = BYTE_MASK(size);
228 for (n = 0; n < len; n++) {
229 if (list[n].reg_num == (address & 0xffc) &&
230 ((list[n].mask >> bias_shift) & mask) == mask)
231 return PCI_ACCESS_PERFORM;
234 return PCI_ACCESS_REJECT;
237 cap = pci_find_capability(device, address);
238 if (!cap || !(cap->flags & JAILHOUSE_PCICAPS_WRITE))
239 return PCI_ACCESS_REJECT;
241 return PCI_ACCESS_PERFORM;
245 * pci_init() - Initialization of PCI module
247 * Return: 0 - success, error code - if error.
251 struct acpi_mcfg_table *mcfg;
254 err = pci_cell_init(&root_cell);
258 mcfg = (struct acpi_mcfg_table *)acpi_find_table("MCFG", NULL);
262 if (mcfg->header.length !=
263 sizeof(struct acpi_mcfg_table) + sizeof(struct acpi_mcfg_alloc))
266 pci_mmcfg_addr = mcfg->alloc_structs[0].base_addr;
267 pci_mmcfg_size = (mcfg->alloc_structs[0].end_bus + 1) * 256 * 4096;
268 pci_space = page_alloc(&remap_pool, pci_mmcfg_size / PAGE_SIZE);
272 end_bus = mcfg->alloc_structs[0].end_bus;
274 return page_map_create(&hv_paging_structs,
275 mcfg->alloc_structs[0].base_addr,
276 pci_mmcfg_size, (unsigned long)pci_space,
277 PAGE_DEFAULT_FLAGS | PAGE_FLAG_UNCACHED,
278 PAGE_MAP_NON_COHERENT);
282 * pci_mmio_access_handler() - Handler for MMIO-accesses to PCI config space
283 * @cell: Request issuing cell
284 * @is_write: True if write access
285 * @addr: Address accessed
286 * @value: Pointer to value for reading/writing
288 * Return: 1 if handled successfully, 0 if unhandled, -1 on access error
290 int pci_mmio_access_handler(const struct cell *cell, bool is_write,
291 u64 addr, u32 *value)
293 u32 mmcfg_offset, reg_addr;
294 struct pci_device *device;
295 enum pci_access access;
297 if (!pci_space || addr < pci_mmcfg_addr ||
298 addr >= (pci_mmcfg_addr + pci_mmcfg_size - 4))
301 mmcfg_offset = addr - pci_mmcfg_addr;
302 reg_addr = mmcfg_offset & 0xfff;
303 device = pci_get_assigned_device(cell, mmcfg_offset >> 12);
306 access = pci_cfg_write_moderate(device, reg_addr, 4, *value);
307 if (access == PCI_ACCESS_REJECT)
309 if (access == PCI_ACCESS_PERFORM)
310 mmio_write32(pci_space + mmcfg_offset, *value);
312 access = pci_cfg_read_moderate(device, reg_addr, 4, value);
313 if (access == PCI_ACCESS_PERFORM)
314 *value = mmio_read32(pci_space + mmcfg_offset);
320 panic_printk("FATAL: Invalid PCI MMCONFIG write, device %02x:%02x.%x, "
321 "reg: %\n", PCI_BDF_PARAMS(mmcfg_offset >> 12), reg_addr);
326 static int pci_add_device(struct cell *cell, struct pci_device *device)
328 printk("Adding PCI device %02x:%02x.%x to cell \"%s\"\n",
329 PCI_BDF_PARAMS(device->info->bdf), cell->config->name);
330 return arch_pci_add_device(cell, device);
333 static void pci_remove_device(struct pci_device *device)
335 printk("Removing PCI device %02x:%02x.%x from cell \"%s\"\n",
336 PCI_BDF_PARAMS(device->info->bdf), device->cell->config->name);
337 arch_pci_remove_device(device);
340 int pci_cell_init(struct cell *cell)
342 unsigned long array_size = PAGE_ALIGN(cell->config->num_pci_devices *
343 sizeof(struct pci_device));
344 const struct jailhouse_pci_device *dev_infos =
345 jailhouse_cell_pci_devices(cell->config);
346 struct pci_device *device, *root_device;
350 cell->pci_devices = page_alloc(&mem_pool, array_size / PAGE_SIZE);
351 if (!cell->pci_devices)
355 * We order device states in the same way as the static information
356 * so that we can use the index of the latter to find the former. For
357 * the other way around and for obtaining the owner cell, we use more
358 * handy pointers. The cell pointer also encodes active ownership.
360 for (ndev = 0; ndev < cell->config->num_pci_devices; ndev++) {
361 device = &cell->pci_devices[ndev];
362 device->info = &dev_infos[ndev];
364 root_device = pci_get_assigned_device(&root_cell,
365 dev_infos[ndev].bdf);
367 pci_remove_device(root_device);
368 root_device->cell = NULL;
371 err = pci_add_device(cell, device);
383 static void pci_return_device_to_root_cell(struct pci_device *device)
385 struct pci_device *root_device;
387 for_each_configured_pci_device(root_device, &root_cell)
388 if (root_device->info->domain == device->info->domain &&
389 root_device->info->bdf == device->info->bdf) {
390 if (pci_add_device(&root_cell, root_device) < 0)
391 printk("WARNING: Failed to re-assign PCI "
392 "device to root cell\n");
394 root_device->cell = &root_cell;
399 void pci_cell_exit(struct cell *cell)
401 unsigned long array_size = PAGE_ALIGN(cell->config->num_pci_devices *
402 sizeof(struct pci_device));
403 struct pci_device *device;
406 * Do not destroy the root cell. We will shut down the complete
407 * hypervisor instead.
409 if (cell == &root_cell)
412 for_each_configured_pci_device(device, cell) {
415 pci_remove_device(device);
416 pci_return_device_to_root_cell(device);
419 page_free(&mem_pool, cell->pci_devices, array_size / PAGE_SIZE);