configs/jetson-tk1.c

   1 /*
   2  * Jailhouse, a Linux-based partitioning hypervisor
   3  *
   4  * Test configuration for Jetson TK1 board
   5  * (NVIDIA Tegra K1 quad-core Cortex-A15, 2G RAM)
   6  *
   7  * Copyright (c) Siemens AG, 2015
   8  *
   9  * Authors:
  10  *  Jan Kiszka <jan.kiszka@siemens.com>
  11  *
  12  * This work is licensed under the terms of the GNU GPL, version 2.  See
  13  * the COPYING file in the top-level directory.
  14  *
  15  * NOTE: Add "mem=1984M vmalloc=512M" to the kernel command line.
  16  */
  17
  18 #include <linux/types.h>
  19 #include <jailhouse/cell-config.h>
  20
  21 #define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
  22
  23 struct {
  24         struct jailhouse_system header;
  25         __u64 cpus[1];
  26         struct jailhouse_memory mem_regions[10];
  27         struct jailhouse_irqchip irqchips[1];
  28 } __attribute__((packed)) config = {
  29         .header = {
  30                 .signature = JAILHOUSE_SYSTEM_SIGNATURE,
  31                 .hypervisor_memory = {
  32                         .phys_start = 0xfc000000,
  33                         .size = 0x4000000 - 0x100000, /* -1MB (PSCI) */
  34                 },
  35                 .debug_console = {
  36                         .phys_start = 0x70006000,
  37                         .size = 0x1000,
  38                         .flags = JAILHOUSE_MEM_IO,
  39                 },
  40                 .root_cell = {
  41                         .name = "Jetson-TK1",
  42
  43                         .cpu_set_size = sizeof(config.cpus),
  44                         .num_memory_regions = ARRAY_SIZE(config.mem_regions),
  45                         .num_irqchips = 1,
  46                 },
  47         },
  48
  49         .cpus = {
  50                 0xf,
  51         },
  52
  53         .mem_regions = {
  54                 /* PCIe */ {
  55                         .phys_start = 0x01000000,
  56                         .virt_start = 0x01000000,
  57                         .size = 0x3f000000,
  58                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  59                                 JAILHOUSE_MEM_IO,
  60                 },
  61                 /* HACK: Legacy Interrupt Controller */ {
  62                         .phys_start = 0x60004000,
  63                         .virt_start = 0x60004000,
  64                         .size = 0x00001000,
  65                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  66                                 JAILHOUSE_MEM_IO,
  67                 },
  68                 /* HACK: Clock and Reset Controller */ {
  69                         .phys_start = 0x60006000,
  70                         .virt_start = 0x60006000,
  71                         .size = 0x00001000,
  72                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  73                                 JAILHOUSE_MEM_IO,
  74                 },
  75                 /* I2C5/6, SPI */ {
  76                         .phys_start = 0x7000d000,
  77                         .virt_start = 0x7000d000,
  78                         .size = 0x00001000,
  79                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  80                                 JAILHOUSE_MEM_IO,
  81                 },
  82                 /* HACK: Memory Controller */ {
  83                         .phys_start = 0x70019000,
  84                         .virt_start = 0x70019000,
  85                         .size = 0x00001000,
  86                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  87                                 JAILHOUSE_MEM_IO,
  88                 },
  89                 /* MMC0/1 */ {
  90                         .phys_start = 0x700b0000,
  91                         .virt_start = 0x700b0000,
  92                         .size = 0x00001000,
  93                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  94                                 JAILHOUSE_MEM_IO,
  95                 },
  96                 /* RTC + PMC */ {
  97                         .phys_start = 0x7000e000,
  98                         .virt_start = 0x7000e000,
  99                         .size = 0x00001000,
 100                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 101                                 JAILHOUSE_MEM_IO,
 102                 },
 103                 /* USB */ {
 104                         .phys_start = 0x7d004000,
 105                         .virt_start = 0x7d004000,
 106                         .size = 0x00008000,
 107                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 108                                 JAILHOUSE_MEM_IO,
 109                 },
 110                 /* UART */ {
 111                         .phys_start = 0x70006000,
 112                         .virt_start = 0x70006000,
 113                         .size = 0x1000,
 114                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 115                                 JAILHOUSE_MEM_IO,
 116                 },
 117                 /* RAM */ {
 118                         .phys_start = 0x80000000,
 119                         .virt_start = 0x80000000,
 120                         .size = 0x7c000000,
 121                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 122                                 JAILHOUSE_MEM_EXECUTE,
 123                 },
 124         },
 125         .irqchips = {
 126                 /* GIC */ {
 127                         .address = 0x50041000,
 128                         .pin_base = 32,
 129                         .pin_bitmap = {
 130                                 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
 131                         },
 132                 },
 133         },
 134 };