configs/bananapi.c

   1 /*
   2  * Jailhouse, a Linux-based partitioning hypervisor
   3  *
   4  * Test configuration for Banana Pi board (A20 dual-core Cortex-A7, 1G RAM)
   5  *
   6  * Copyright (c) Siemens AG, 2014
   7  *
   8  * Authors:
   9  *  Jan Kiszka <jan.kiszka@siemens.com>
  10  *
  11  * This work is licensed under the terms of the GNU GPL, version 2.  See
  12  * the COPYING file in the top-level directory.
  13  */
  14
  15 #include <linux/types.h>
  16 #include <jailhouse/cell-config.h>
  17
  18 #define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
  19
  20 struct {
  21         struct jailhouse_system header;
  22         __u64 cpus[1];
  23         struct jailhouse_memory mem_regions[16];
  24         struct jailhouse_irqchip irqchips[1];
  25 } __attribute__((packed)) config = {
  26         .header = {
  27                 .signature = JAILHOUSE_SYSTEM_SIGNATURE,
  28                 .hypervisor_memory = {
  29                         .phys_start = 0x7c000000,
  30                         .size = 0x4000000,
  31                 },
  32                 .debug_console = {
  33                         .phys_start = 0x01c28000,
  34                         .size = 0x1000,
  35                         .flags = JAILHOUSE_MEM_IO,
  36                 },
  37                 .root_cell = {
  38                         .name = "Banana-Pi",
  39
  40                         .cpu_set_size = sizeof(config.cpus),
  41                         .num_memory_regions = ARRAY_SIZE(config.mem_regions),
  42                         .num_irqchips = 1,
  43                 },
  44         },
  45
  46         .cpus = {
  47                 0x3,
  48         },
  49
  50         .mem_regions = {
  51                 /* SPI */ {
  52                         .phys_start = 0x01c05000,
  53                         .virt_start = 0x01c05000,
  54                         .size = 0x00001000,
  55                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  56                                 JAILHOUSE_MEM_IO,
  57                 },
  58                 /* MMC */ {
  59                         .phys_start = 0x01c0f000,
  60                         .virt_start = 0x01c0f000,
  61                         .size = 0x00001000,
  62                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  63                                 JAILHOUSE_MEM_IO,
  64                 },
  65                 /* USB + PMU1 */ {
  66                         .phys_start = 0x01c14000,
  67                         .virt_start = 0x01c14000,
  68                         .size = 0x00001000,
  69                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  70                                 JAILHOUSE_MEM_IO,
  71                 },
  72                 /* SATA */ {
  73                         .phys_start = 0x01c18000,
  74                         .virt_start = 0x01c18000,
  75                         .size = 0x00001000,
  76                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  77                                 JAILHOUSE_MEM_IO,
  78                 },
  79                 /* USB + PMU2 */ {
  80                         .phys_start = 0x01c1c000,
  81                         .virt_start = 0x01c1c000,
  82                         .size = 0x00001000,
  83                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  84                                 JAILHOUSE_MEM_IO,
  85                 },
  86                 /* CCU */ {
  87                         .phys_start = 0x01c20000,
  88                         .virt_start = 0x01c20000,
  89                         .size = 0x400,
  90                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  91                                 JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
  92                 },
  93                 /* Ints */ {
  94                         .phys_start = 0x01c20400,
  95                         .virt_start = 0x01c20400,
  96                         .size = 0x400,
  97                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
  98                                 JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
  99                 },
 100                 /* GPIO: ports A-G */ {
 101                         .phys_start = 0x01c20800,
 102                         .virt_start = 0x01c20800,
 103                         .size = 0xfc,
 104                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 105                                 JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
 106                 },
 107                 /* GPIO: port H */ {
 108                         .phys_start = 0x01c208fc,
 109                         .virt_start = 0x01c208fc,
 110                         .size = 0x24,
 111                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 112                                 JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
 113                 },
 114                 /* GPIO: port I */ {
 115                         .phys_start = 0x01c20920,
 116                         .virt_start = 0x01c20920,
 117                         .size = 0x24,
 118                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 119                                 JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
 120                 },
 121                 /* GPIO: intr config */ {
 122                         .phys_start = 0x01c20a00,
 123                         .virt_start = 0x01c20a00,
 124                         .size = 0x1c,
 125                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 126                                 JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
 127                 },
 128                 /* Timer */ {
 129                         .phys_start = 0x01c20c00,
 130                         .virt_start = 0x01c20c00,
 131                         .size = 0x400,
 132                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 133                                 JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
 134                 },
 135                 /* UART0-3 */ {
 136                         .phys_start = 0x01c28000,
 137                         .virt_start = 0x01c28000,
 138                         .size = 0x1000,
 139                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 140                                 JAILHOUSE_MEM_IO,
 141                 },
 142                 /* GMAC */ {
 143                         .phys_start = 0x01c50000,
 144                         .virt_start = 0x01c50000,
 145                         .size = 0x00010000,
 146                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 147                                 JAILHOUSE_MEM_IO,
 148                 },
 149                 /* HSTIMER */ {
 150                         .phys_start = 0x01c60000,
 151                         .virt_start = 0x01c60000,
 152                         .size = 0x00001000,
 153                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 154                                 JAILHOUSE_MEM_IO,
 155                 },
 156                 /* RAM */ {
 157                         .phys_start = 0x40000000,
 158                         .virt_start = 0x40000000,
 159                         .size = 0x3c000000,
 160                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
 161                                 JAILHOUSE_MEM_EXECUTE,
 162                 },
 163         },
 164         .irqchips = {
 165                 /* GIC */ {
 166                         .address = 0x01c81000,
 167                         .pin_base = 32,
 168                         .pin_bitmap = {
 169                                 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
 170                         },
 171                 },
 172         },
 173
 174 };