tools/root-cell-config.c.tmpl

   1 /*
   2  * Jailhouse, a Linux-based partitioning hypervisor
   3  *
   4  * Copyright (c) Siemens AG, 2014
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2.  See
   7  * the COPYING file in the top-level directory.
   8  *
   9  * Configuration for ${product[0]} ${product[1]}
  10  * created with '${argstr}'
  11  *
  12  * NOTE: This config expects the following to be appended to your kernel cmdline
  13  *       "memmap=${hex(ourmem[1])}$${hex(ourmem[0])}"
  14  */
  15
  16 #include <linux/types.h>
  17 #include <jailhouse/cell-config.h>
  18
  19 #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
  20
  21 struct {
  22         struct jailhouse_system header;
  23         __u64 cpus[${int((cpucount + 63) / 64)}];
  24         struct jailhouse_memory mem_regions[${len(regions)}];
  25         struct jailhouse_irqchip irqchips[${len(irqchips)}];
  26         __u8 pio_bitmap[0x2000];
  27         struct jailhouse_pci_device pci_devices[${len(pcidevices)}];
  28         struct jailhouse_pci_capability pci_caps[${len(pcicaps)}];
  29 } __attribute__((packed)) config = {
  30         .header = {
  31                 .hypervisor_memory = {
  32                         .phys_start = ${hex(hvmem[0])},
  33                         .size = ${hex(hvmem[1])},
  34                 },
  35                 .platform_info.x86 = {
  36                         .mmconfig_base = ${hex(mmconfig.base)},
  37                         .mmconfig_end_bus = ${hex(mmconfig.end_bus)},
  38                         .pm_timer_address = ${hex(pm_timer_base)},
  39                         % if iommu_units:
  40                         .iommu_base = {
  41                                 % for d in iommu_units:
  42                                 ${hex(d)},
  43                                 % endfor
  44                         },
  45                         % endif
  46                 },
  47                 .device_limit = 128,
  48                 .interrupt_limit = 256,
  49                 .root_cell = {
  50                         .name = "RootCell",
  51                         .cpu_set_size = sizeof(config.cpus),
  52                         .num_memory_regions = ARRAY_SIZE(config.mem_regions),
  53                         .num_irqchips = ARRAY_SIZE(config.irqchips),
  54                         .pio_bitmap_size = ARRAY_SIZE(config.pio_bitmap),
  55                         .num_pci_devices = ARRAY_SIZE(config.pci_devices),
  56                         .num_pci_caps = ARRAY_SIZE(config.pci_caps),
  57                 },
  58         },
  59
  60         .cpus = {
  61                 % for n in range(int(cpucount / 64)):
  62                 0xffffffffffffffff,
  63                 % endfor
  64                 % if (cpucount % 64):
  65                 ${'0x%016x,' % ((1 << (cpucount % 64)) - 1)}
  66                 % endif
  67         },
  68
  69         .mem_regions = {
  70                 % for r in regions:
  71                 /* ${str(r)} */
  72                 % for c in r.comments:
  73                 /* ${c} */
  74                 % endfor
  75                 {
  76                         .phys_start = ${hex(r.start).strip('L')},
  77                         .virt_start = ${hex(r.start).strip('L')},
  78                         .size = ${hex(r.size()).strip('L')},
  79                         .flags = ${r.flagstr('\t\t')},
  80                 },
  81                 % endfor
  82         },
  83
  84         .irqchips = {
  85                 % for i in irqchips:
  86                 /* ${str(i)} */
  87                 {
  88                         .address = ${hex(i.address)},
  89                         .id = ${hex(i.irqchip_id())},
  90                         .pin_bitmap = 0xffffff,
  91                 },
  92                 % endfor
  93         },
  94
  95         .pio_bitmap = {
  96                 [     0/8 ...   0x3f/8] = -1,
  97                 [  0x40/8 ...   0x47/8] = 0xf0, /* PIT */
  98                 [  0x48/8 ...   0x5f/8] = -1,
  99                 [  0x60/8 ...   0x67/8] = 0xec, /* HACK: NMI status/control */
 100                 [  0x68/8 ...   0x6f/8] = -1,
 101                 [  0x70/8 ...   0x77/8] = 0xfc, /* RTC */
 102                 [  0x78/8 ...  0x3af/8] = -1,
 103                 [ 0x3b0/8 ...  0x3df/8] = 0x00, /* VGA */
 104                 [ 0x3e0/8 ...  0xcff/8] = -1,
 105                 [ 0xd00/8 ... 0xffff/8] = 0, /* HACK: PCI bus */
 106         },
 107
 108         .pci_devices = {
 109                 % for d in pcidevices:
 110                 /* ${str(d)} */
 111                 {
 112                         .type = ${d.type},
 113                         .iommu = ${d.iommu},
 114                         .domain = ${hex(d.domain)},
 115                         .bdf = ${hex(d.bdf())},
 116                         .caps_start = ${d.caps_start},
 117                         .num_caps = ${d.num_caps},
 118                         .num_msi_vectors = ${d.num_msi_vectors},
 119                         .msi_64bits = ${d.msi_64bits},
 120                         .num_msix_vectors = ${d.num_msix_vectors},
 121                         .msix_region_size = ${hex(d.msix_region_size)},
 122                         .msix_address = ${hex(d.msix_address).strip('L')},
 123                 },
 124                 % endfor
 125         },
 126
 127         .pci_caps = {
 128                 % for c in pcicaps:
 129                 % for comment in c.comments:
 130                 /* ${comment} */
 131                 % endfor
 132                 {
 133                         .id = ${hex(c.id)},
 134                         .start = ${hex(c.start)},
 135                         .len = ${c.len},
 136                         .flags = ${c.flags},
 137                 },
 138                 % endfor
 139         },
 140 };