]> rtime.felk.cvut.cz Git - jailhouse.git/blob - configs/bananapi.c
fix of a bad merge.
[jailhouse.git] / configs / bananapi.c
1 /*
2  * Jailhouse, a Linux-based partitioning hypervisor
3  *
4  * Test configuration for Banana Pi board (A20 dual-core Cortex-A7, 1G RAM)
5  *
6  * Copyright (c) Siemens AG, 2014
7  *
8  * Authors:
9  *  Jan Kiszka <jan.kiszka@siemens.com>
10  *
11  * This work is licensed under the terms of the GNU GPL, version 2.  See
12  * the COPYING file in the top-level directory.
13  */
14
15 #include <linux/types.h>
16 #include <jailhouse/cell-config.h>
17
18 #define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
19
20 struct {
21         struct jailhouse_system header;
22         __u64 cpus[1];
23         struct jailhouse_memory mem_regions[10];
24         struct jailhouse_irqchip irqchips[1];
25 } __attribute__((packed)) config = {
26         .header = {
27                 .signature = JAILHOUSE_SYSTEM_SIGNATURE,
28                 .hypervisor_memory = {
29                         .phys_start = 0x7c000000,
30                         .size = 0x4000000,
31                 },
32                 .debug_uart = {
33                         .phys_start = 0x01c28000,
34                         .size = 0x1000,
35                         .flags = JAILHOUSE_MEM_IO,
36                 },
37                 .root_cell = {
38                         .name = "Banana-Pi",
39
40                         .cpu_set_size = sizeof(config.cpus),
41                         .num_memory_regions = ARRAY_SIZE(config.mem_regions),
42                         .num_irqchips = 1,
43                 },
44         },
45
46         .cpus = {
47                 0x3,
48         },
49
50         .mem_regions = {
51                 /* SPI */ {
52                         .phys_start = 0x01c05000,
53                         .virt_start = 0x01c05000,
54                         .size = 0x00001000,
55                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
56                                 JAILHOUSE_MEM_IO,
57                 },
58                 /* MMC */ {
59                         .phys_start = 0x01c0f000,
60                         .virt_start = 0x01c0f000,
61                         .size = 0x00001000,
62                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
63                                 JAILHOUSE_MEM_IO,
64                 },
65                 /* USB + PMU1 */ {
66                         .phys_start = 0x01c14000,
67                         .virt_start = 0x01c14000,
68                         .size = 0x00001000,
69                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
70                                 JAILHOUSE_MEM_IO,
71                 },
72                 /* SATA */ {
73                         .phys_start = 0x01c18000,
74                         .virt_start = 0x01c18000,
75                         .size = 0x00001000,
76                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
77                                 JAILHOUSE_MEM_IO,
78                 },
79                 /* USB + PMU2 */ {
80                         .phys_start = 0x01c1c000,
81                         .virt_start = 0x01c1c000,
82                         .size = 0x00001000,
83                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
84                                 JAILHOUSE_MEM_IO,
85                 },
86                 /* CCU, Ints, GPIO, Timer */ {
87                         .phys_start = 0x01c20000,
88                         .virt_start = 0x01c20000,
89                         .size = 0x1000,
90                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
91                                 JAILHOUSE_MEM_IO,
92                 },
93                 /* UART0-3 */ {
94                         .phys_start = 0x01c28000,
95                         .virt_start = 0x01c28000,
96                         .size = 0x1000,
97                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
98                                 JAILHOUSE_MEM_IO,
99                 },
100                 /* GMAC */ {
101                         .phys_start = 0x01c50000,
102                         .virt_start = 0x01c50000,
103                         .size = 0x00010000,
104                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
105                                 JAILHOUSE_MEM_IO,
106                 },
107                 /* HSTIMER */ {
108                         .phys_start = 0x01c60000,
109                         .virt_start = 0x01c60000,
110                         .size = 0x00001000,
111                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
112                                 JAILHOUSE_MEM_IO,
113                 },
114                 /* RAM */ {
115                         .phys_start = 0x40000000,
116                         .virt_start = 0x40000000,
117                         .size = 0x3c000000,
118                         .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
119                                 JAILHOUSE_MEM_EXECUTE,
120                 },
121         },
122         .irqchips = {
123                 /* GIC */ {
124                         .address = 0x2f000000,
125                         .pin_bitmap = 0xffffffffffffffff,
126                 },
127         },
128
129 };