]> rtime.felk.cvut.cz Git - hercules2020/nv-tegra/linux-4.4.git/log
hercules2020/nv-tegra/linux-4.4.git
7 years agoarch:arm64:config:Enable ISC and RTCPU defconfig
Aniket Bahadarpurkar [Tue, 4 Apr 2017 08:55:50 +0000 (14:25 +0530)]
arch:arm64:config:Enable ISC and RTCPU defconfig

This change adds CONFIG_VIDEO_ISC and CONFIG_TEGRA_CAMERA_RTCPU
to early boot defconfig. It enables to run capture from sys
partition using rtcpu

boot.img size increased by 101760 bytes

Bug 200288209

Change-Id: Ib731d16e0e037ccf4fd45629e0b72aef77f20b3d
Signed-off-by: Aniket Bahadarpurkar <aniketb@nvidia.com>
Reviewed-on: http://git-master/r/1454707
(cherry picked from commit 3f0b3c707f6e1c5aa9c400dcdf165434b98feeb5)
Reviewed-on: http://git-master/r/1470084
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Ranjith Kannikara <rkannikara@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
7 years agosound: tegra-alt: register ape-adma ISO_CLIENT only for t18x
Shreshtha SAHU [Mon, 17 Apr 2017 11:23:32 +0000 (16:53 +0530)]
sound: tegra-alt: register ape-adma ISO_CLIENT only for t18x

Bug 200285287

Change-Id: I93a4cac1b5824db6c74fd833e83987c5c82cbbc9
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/1476380
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
7 years agoASoC: tegra-alt: add dma buffer size parse
Ahung Cheng [Tue, 18 Apr 2017 09:01:51 +0000 (17:01 +0800)]
ASoC: tegra-alt: add dma buffer size parse

Add dma-buffer-size parsing in device tree for pcm
driver to allocate required size for each pcm node

Bug 200299289

Change-Id: Ia579c66413912dd0ef7fda34cd47887eec3599f7
Signed-off-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-on: http://git-master/r/1478988
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
7 years agoDon't show empty tag stats for unprivileged uids
Mohamad Ayyash [Fri, 10 Mar 2017 07:20:31 +0000 (15:20 +0800)]
Don't show empty tag stats for unprivileged uids

BUG: 27577101
BUG: 27532522
(cherry picked from commit d85e322ff3bc8d7aa872ad12df6427dd236e540a)

Bug 1806975

Signed-off-by: Mohamad Ayyash <mkayyash@google.com>
Change-Id: I4451e6c3a1ccf0293a8ea4ffdf1822c8486ed605
Reviewed-on: http://git-master/r/1456874
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bobby Wang (SW-TEGRA) <bobwang@nvidia.com>
Reviewed-on: http://git-master/r/1478040
Reviewed-by: David Pearce <dpearce@nvidia.com>
Reviewed-by: Hayden Du <haydend@nvidia.com>
7 years agoufs: tegra: Enable and Disable mphy_force_ls_mode.
Naveen Kumar Arepalli [Tue, 2 May 2017 06:23:31 +0000 (11:53 +0530)]
ufs: tegra: Enable and Disable mphy_force_ls_mode.

-Enable and Disable mphy_force_ls_mode to keep clocks
in default state.

Bug 200278112

Change-Id: Icc7a61d39976f48873694a5d61eec62a14271ee2
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/1478096
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
7 years agodrivers: tegra: aotag: use dev_info for info
Shreshtha SAHU [Wed, 10 May 2017 04:04:54 +0000 (09:34 +0530)]
drivers: tegra: aotag: use dev_info for info

"Bound to TZ" and Probe messages are made info.

Bug 200300191

Change-Id: Ic13190d704d67683b2a4b7441a27e341bac50b85
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/1478746
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
7 years agoarm64: configs: Enable EDP to LVDS config
Gaurav Singh [Tue, 9 May 2017 16:42:37 +0000 (22:12 +0530)]
arm64: configs: Enable EDP to LVDS config

Enable config TEGRA_EDP2LVDS_PS8625 to enable
EDP to lvds bridge. PS8625 is i2c slave chip
which has EDP to LVDS support. For L4T, the
display head will be treated as EDP, this chip
takes care of converting edp to lvds signals.

boot.img size is increased by 256 bytes

Bug 200278783

Change-Id: I6b805cc7cecd773a48c8ee6fad862bd52f97740a
Signed-off-by: Gaurav Singh <gaursingh@nvidia.com>
Reviewed-on: http://git-master/r/1477280
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
7 years agoASoC: tegra-alt: Avoid reg access after shutdown
Mohan Kumar [Thu, 4 May 2017 06:45:02 +0000 (12:15 +0530)]
ASoC: tegra-alt: Avoid reg access after shutdown

Below are the hypothetical scenarios
- Drivers are in suspend state while reboot and PCM Open call from
  userspace is received after driver shutdown [APE is power gated
  already]
- PM domain handling doesn't ensure proper functionality after driver
  shutdown is called

The change handles with the below fix
- ALSA PCM Open API first executes runtime resume of each driver.
  So need to prevent any reg access in runtime resume of drivers.
- ALSA PCM Open executes ADMAIF startup after runtime resume of
  each driver. If ADMAIF startup returns failure based on shutdown,
  PCM Open operation will fail, this will break PCM Open path and
  will ensure no further ALSA APIs/Callbacks are called.

Bug 200289815

Change-Id: Ia03e035569375f37ae4b0faa1a4593ce121d2354
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: http://git-master/r/1475208
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
7 years agomedia: i2c: IMX185: Disable HSYNC output
Frank Chen [Mon, 1 May 2017 17:58:21 +0000 (10:58 -0700)]
media: i2c: IMX185: Disable HSYNC output

Disable HSYNC output by default, if frame sync
with other sensor is not needed. This will keep
XHS signal high and not generating interrupts.

Bug 200252886

Change-Id: Ibf97f6edf361f286b67c4cf61d4afc7a38ed8d18
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/1473063
(cherry picked from commit 1b9993919340dc3d2657ff6d4bd4a04f5ef8ed3e)
Reviewed-on: http://git-master/r/1474075
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Esen Chen <esenc@nvidia.com>
Reviewed-by: Saurabh Maniktala <smaniktala@nvidia.com>
7 years agodrivers: tegra: Fix build issues
Bhanu Murthy V [Thu, 4 May 2017 22:20:57 +0000 (15:20 -0700)]
drivers: tegra: Fix build issues

Remove vi4.h references in camera framework

Bug 200305322

Change-Id: I5e48551b272783b36e6ce1fa846c4e6c04480dcf
Signed-off-by: Bhanu Murthy V <bmurthyv@nvidia.com>
Reviewed-on: http://git-master/r/1476591
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Hayden Du <haydend@nvidia.com>
7 years agotegra: platform: camera: fix channel open error
David Wang [Fri, 5 May 2017 19:59:11 +0000 (12:59 -0700)]
tegra: platform: camera: fix channel open error

Channel open error path calls close with out power on,
causing unbalanced power off call. Fixed by only closing
file handle.

Bug 200295163

Change-Id: I9c70aeea8a2220006ba3f958532ea0dac5ae71cb
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/1475849
(cherry picked from commit d40ca4c535c8fadf77fb966977cac83ec671f121)
Reviewed-on: http://git-master/r/1476553
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
7 years agovideo: add DT node documentation for bridge chips
Deepak Bhosale [Thu, 27 Apr 2017 22:45:04 +0000 (15:45 -0700)]
video: add DT node documentation for bridge chips

- Documentation is added for following chips
  - SN65DSI86: DSI to eDP bridge
  - SN65DSI85: DSI to LVDS bridge
  - MAX9291:   HDMI to GMSL bridge
  - DS90UB948: FPDLINK to LVDS bridge
  - DS90UH949: HDMI to FPDLINK bridge

Bug 200295087
JIRA EVLR-1240

Change-Id: Icae438030b2b047c76d24bb5bf716d375054147d
Signed-off-by: Deepak Bhosale <dbhosale@nvidia.com>
Reviewed-on: http://git-master/r/1471662
(cherry picked from commit d9cd3f00609d2a1858395b884e079a9938324f55)
Reviewed-on: http://git-master/r/1476439
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
7 years agodrivers: nvadsp: dump current thread and last irq
Nitin Kumbhar [Thu, 4 May 2017 15:20:27 +0000 (20:50 +0530)]
drivers: nvadsp: dump current thread and last irq

Dump name (first 4 chars) of current thread and irq
number of last interrupt handled from hwmbox reg 4 and 7
respectively.

Bug 200295526

Change-Id: I4b53521cbfece2177e3cf6ed80b559b58e1d1c0a
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/1475487
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Uday Gupta <udayg@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
7 years agodrivers: nvadsp: dump msgs for logs from suspend
Nitin Kumbhar [Thu, 4 May 2017 11:35:11 +0000 (17:05 +0530)]
drivers: nvadsp: dump msgs for logs from suspend

Add messages for states logged during ADSP suspend and
resume path.

Bug 200295526

Change-Id: I2b039744e6abfd8d30b6b78ec4f9c4acda7a13aa
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/1475428
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
7 years agoASoC: ad193x: Add support for more sampling rates
Jon Hunter [Thu, 27 Apr 2017 16:11:18 +0000 (17:11 +0100)]
ASoC: ad193x: Add support for more sampling rates

Currently, the AD193x codec only supports 48kHz sampling rates. The
orca-viper platform needs to support 44.1kHz, 48kHz and 96kHz. Update
the driver to add support for the various sample rates supported by the
codec. Please note that it is also necessary to update the list of
sysclk frequencies that is required to support these sample rates.

Finally add some more error checking for detecting any supported audio
configurations.

Bug 200286098

Change-Id: I10fa5f628f3d5db0c11550aae51324fcc44dfad0
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: http://git-master/r/1472225
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
7 years agoAsoc: tegra-alt: Allow machines to specify the fs-to-mclk ratio
Jon Hunter [Thu, 27 Apr 2017 16:09:44 +0000 (17:09 +0100)]
Asoc: tegra-alt: Allow machines to specify the fs-to-mclk ratio

For Tegra186 the Tegra utilities assumes that the codec MCLK frequency
is always 256x the sample-rate (fs). For the AD193x codecs this is not
always the case and for example, to support a 96kHz sampling rate, the
MCLK must be 128x the sample-rate. Therefore, add a new parameter,
'mclk_scale' to the Tegra clock data that specifies the scaling factor
that is used to calculate the MCLK frequency from the sample rate,
where the default is 256. This allows machine drivers to override this
default scale factor as necessary to support various sample rates.

Bug 200286098

Change-Id: Icba3116d80c3695a5575bfcd7cf202a724bd65d8
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: http://git-master/r/1472224
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
7 years agoplatform: tegra: nvadsp: add adma reg dump
Nitin Kumbhar [Wed, 19 Apr 2017 11:22:43 +0000 (16:52 +0530)]
platform: tegra: nvadsp: add adma reg dump

Add ADMA regs as part of dump_adsp_sys() which is called
on irrecoverable errors on ADSP.

Bug 200295526

Change-Id: Iacb315d6b188d1b98085e59a86c74212246308da
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/1466422
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Uday Gupta <udayg@nvidia.com>
7 years agoASoC: tegra-alt: support to dump adma register
Mohan Kumar [Wed, 19 Apr 2017 09:38:26 +0000 (15:08 +0530)]
ASoC: tegra-alt: support to dump adma register

Add support to dump all adma ch registers during hung trigger.

Bug 200295526

Change-Id: Ia59fe4d20fbee6471023084b7a779f0d70cdc5d5
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: http://git-master/r/1466451
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
7 years agonvadsp: dump adsp state from hwmbox reg
Nitin Kumbhar [Fri, 30 Sep 2016 09:15:55 +0000 (14:45 +0530)]
nvadsp: dump adsp state from hwmbox reg

The state of ADSP is logged by writing to a mailbox
register. Adding support to kernel driver to dump ADSP
state when crash happens.

Jira EMA-404
Bug 1901511
Bug 1893324
Bug 200239577

Change-Id: Ia2beb84a7d5bc871f7062bd6a661333af0b0e24d
Signed-off-by: Hariharan Sivaraman <hariharans@nvidia.com>
Reviewed-on: http://git-master/r/1229864
(cherry picked from commit 0027e7a51f6134b4a7b332c17f7c7c26ac727ebc)
Reviewed-on: http://git-master/r/1475093
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agoASoC: ad193x: Correct the bit-shift for the serial format field
Jon Hunter [Fri, 28 Apr 2017 11:07:46 +0000 (12:07 +0100)]
ASoC: ad193x: Correct the bit-shift for the serial format field

The bit-shift for the serial format field is incorrect for the 'AUX'
configuration and so correct this bit-shift.

Change-Id: Ie284e4612583d3fca80073d7d30cb07eb3b48bef
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: http://git-master/r/1472226
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
7 years agoRevert "media:camera: Add mipical_nonblock api"
David Wang [Tue, 2 May 2017 20:41:41 +0000 (13:41 -0700)]
Revert "media:camera: Add mipical_nonblock api"

This reverts commit 47c497fdfb99e0878e88d978f93f635b9b3e0921.

Bug 1916412

(cherry picked from commit ced78973182fde570f5112c2c20078b4d776ad50)
Change-Id: I3808292a3970a44f02c352b2cbce6a7e9d902e5a
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/1473869
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
7 years agoRevert "media:camera: call non-block mipical api"
David Wang [Tue, 2 May 2017 20:40:13 +0000 (13:40 -0700)]
Revert "media:camera: call non-block mipical api"

This reverts commit 6c462a6821dc0eb48e89260157487ea6e082a5ea.

Bug 1916412

(cherry picked from commit 7a5183a0952977ef902019a840d7d738f3af9838)
Change-Id: I938acc94dc9ca4ebb917a8c7d71017f760528314
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/1473868
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
7 years agoxhci: check for implementation of callback function pointer
Petlozu Pravareshwar [Thu, 27 Apr 2017 08:30:56 +0000 (14:00 +0530)]
xhci: check for implementation of callback function pointer

Check if the callback function pointer is_u0_ts1_detect_disabled()
is implemented before actually calling it. This is a tegra-xhci
specific function and will not be implemented by other xhci
controllers.

Bug 200298290
Bug 200227028

Change-Id: I88fa35408855013771b97c5d84800dddba7b8f50
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/1471153
(cherry picked from commit b096e2901ec715e67b64edb70479af25a6758d2b)
Reviewed-on: http://git-master/r/1474189
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: BH Hsieh <bhsieh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
7 years agoxhci: tegra: support XHCI "soft retry"
Petlozu Pravareshwar [Tue, 28 Mar 2017 14:10:52 +0000 (19:40 +0530)]
xhci: tegra: support XHCI "soft retry"

This commit implements a TEGRA210 XHCI specific programming sequence
which needs to be done along with "soft retry".

Also wait for U0 when is going to assert clame_en_early, timeout in
300us.

Bug 200162414
Bug 200227028

Change-Id: I68c6dc7fbeb645236b771ce954ee2837ee9d148c
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/1326818
(cherry picked from commit a482100bdbd2509321f4d5113afa3ae346a39981)
Reviewed-on: http://git-master/r/1474188
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: BH Hsieh <bhsieh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
7 years agoxhci-hcd: support soft retry on SS transfer error
Petlozu Pravareshwar [Tue, 28 Mar 2017 14:02:35 +0000 (19:32 +0530)]
xhci-hcd: support soft retry on SS transfer error

This commit implements XHCI "soft retry" for SuperSpeed endpoints which
encounters transfer errors.
When transfer error happens on a SuperSpeed endpoint, XHCI driver will
1. queue a "reset endpoint" command with TSP=1 (Transfer State Preserve)

2. invoke a HCD driver specific callback "->endpoint_soft_retry()" to let
HCD driver has a chance to configure its hardware

3. ring door bell for the endpoint upon seeing the command completion.

bug 200162414
bug 200227028

Change-Id: Idad81a1ce32c95fd9ac9784630a7b8464bde3e7e
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/1326817
(cherry picked from commit 4b5fca1880d888fa3811999e1c0547876e32fa29)
Reviewed-on: http://git-master/r/1474187
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: BH Hsieh <bhsieh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
7 years agopinctrl: t21x: add receiver detector API
Petlozu Pravareshwar [Tue, 28 Mar 2017 13:45:37 +0000 (19:15 +0530)]
pinctrl: t21x: add receiver detector API

Support clamp_en_early and receiver detector controls.

Bug 200162414
Bug 200179626
bug 200162414
bug 200227028

Change-Id: Id07bb94dcdf25b35b66a8da194fb34fe33ebc191
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/1325277
(cherry picked from commit fdeae53a4911b8c2160e858538e318638e21a050)
Reviewed-on: http://git-master/r/1474186
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: BH Hsieh <bhsieh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
7 years agonet: tegra: EQOS DT bindings document.
Dave Lim [Fri, 28 Aug 2015 20:08:30 +0000 (13:08 -0700)]
net: tegra: EQOS DT bindings document.

Bug 1653977

Change-Id: I752e9f9b66f77cd584b456ae99b7387d009c20ae
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Signed-off-by: Dave Lim <dlim@nvidia.com>
Reviewed-on: http://git-master/r/791196
Reviewed-on: http://git-master/r/791498
Reviewed-on: http://git-master/r/1322794

arm64: dts: eqos: add queue_prio field

It will be used to program Tx and Rx queue priority.

Bug 1631352

Change-Id: I10a58c2e67fdb099517154a1b4539060b596db00
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/817128
(cherry picked from commit 0edf0a66326f87fb696bce1cf991bdbeebabc827)
Reviewed-on: http://git-master/r/820143
Reviewed-on: http://git-master/r/1322796

net: eqos: Add single queue and jumbo frame support

Bug: 1735001

Change-Id: Ib15b1aaff719fce85aee4944f08ab4c555283e06
Signed-off-by: Dave Lim <dlim@nvidia.com>
Reviewed-on: http://git-master/r/1022783
Reviewed-on: http://git-master/r/1322817

arm64: dts: eqos: add phy-mode DT binding

Bug 200276432

Change-Id: Ibc3c719de775b0ea15e1c5b3480d5403c2c917cc
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: http://git-master/r/1322818
Reviewed-on: http://git-master/r/1473357
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Tested-by: Narayan Reddy <narayanr@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Cyril Raju <craju@nvidia.com>
Tested-by: Cyril Raju <craju@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
7 years agoebp: add virt blk and ext4 drivers
Wahed Syed [Wed, 5 Apr 2017 02:04:30 +0000 (21:04 -0500)]
ebp: add virt blk and ext4 drivers

This gerrit adds tegra virutal block driver
and ext4 file system support in EBP kernel defconfig

Kernel Image Size: Uncompressed kernel image size increased by about 400KB
Kernel Boot Time: No increase was noticed in kernel boot time.

Bug 200271254

Change-Id: I93e93b9c6e6b541852eba84fecb2858a3aa3bdcc
Signed-off-by: Wahed Syed <wsyed@nvidia.com>
Reviewed-on: http://git-master/r/1455312
(cherry picked from commit 95a6d006f75fbf841c5c977c05344a620f426072)
Reviewed-on: http://git-master/r/1472587
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
7 years agoiommu/tegra: smmu: move out trace from for-loop
Ahung Cheng [Tue, 11 Apr 2017 10:17:44 +0000 (18:17 +0800)]
iommu/tegra: smmu: move out trace from for-loop

The trace_smmu_set_pte in for-loop stores trace log
for every single page which adds huge overhead when
unmap page. It's not necessary and shall be moved out.

bug 1896296

Change-Id: Ica546a445320a4b091d4da6834dcf8e691e3c5f7
Signed-off-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-on: http://git-master/r/1460456
Reviewed-on: http://git-master/r/1461180
(cherry picked from commit 058513315f8a5489ea65d38773f4346d93ef1280)
Reviewed-on: http://git-master/r/1472098
(cherry picked from commit 06608f1ec0c6200273c4df847faf8780d9494545)
Reviewed-on: http://git-master/r/1472099
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
7 years agonet: phy: broadcom: enable APD mode
Bhadram Varka [Fri, 17 Mar 2017 15:53:30 +0000 (21:23 +0530)]
net: phy: broadcom: enable APD mode

BCM89610 can be placed in Auto Power Down mode when
signal from the copper link partner is not present.
This change is to enable the APD mode for BCM89610.

Bug 200289866

Change-Id: Iaaac08f0d1aa5b03cc4ff0d9d036bf59d1c9f7a6
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: http://git-master/r/1469964
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Cyril Raju <craju@nvidia.com>
Tested-by: Cyril Raju <craju@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
7 years agotty: serial8250: save/dump the port statistics
Shardar Shariff Md [Tue, 2 May 2017 07:50:54 +0000 (13:20 +0530)]
tty: serial8250: save/dump the port statistics

Save the port statistics before handling serial
interrupt and dump the current port stats when
too much work is done in serial irq handler to
know which interrupt is causing this.

Based on commit:
31cf754a tty: serial8250: save/dump the port statistics

Bug 200303755

Change-Id: Iff5e0b03bb1a78d9242923b6eb6334acaf7830b6
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/1473454
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
7 years agoplatform: Do not detach from PM domains on shutdown
Rafael J. Wysocki [Mon, 11 Jan 2016 23:12:19 +0000 (00:12 +0100)]
platform: Do not detach from PM domains on shutdown

Shutdown is carried out when the driver is still bound to the
device, so it is incorrect to detach it from a PM domain (if any)
at this point.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 2d30bb0b3889adf09b342722b2ce596c0763bc93)
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Change-Id: I46966cbe92ef4340b0861408de26b2db323f24da
Reviewed-on: http://git-master/r/1472191
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Tested-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agoaran: enable high speed uart in ebp defconfig
Wahed Syed [Wed, 5 Apr 2017 03:19:47 +0000 (22:19 -0500)]
aran: enable high speed uart in ebp defconfig

This gerrit enables tegra high speed uart driver
in early boot kernel defconfig

Bug 200271254

Change-Id: I45cc631ab3b9c8454a936b42b935f0970218871d
Signed-off-by: Wahed Syed <wsyed@nvidia.com>
Reviewed-on: http://git-master/r/1455398
(cherry picked from commit f5b7eebec9e5407dd244da64afb3638ae39cabcf)
Reviewed-on: http://git-master/r/1472586
GVS: Gerrit_Virtual_Submit
Reviewed-by: Luis Dib <ldib@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
7 years agomisc: tegra-profiler: workaround for clks
Igor Nabirushkin [Thu, 27 Apr 2017 23:00:05 +0000 (03:00 +0400)]
misc: tegra-profiler: workaround for clks

Fix crash in profiler when using gpu and emc clocks.
As a quick workaround, do not use these clocks since it leads
to crash on some devices.

Bug 1918185

Change-Id: Ia425c5a9d31c47eb2d4f4fd3d195fdcad5b642bf
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/1471672
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexey Kravets <akravets@nvidia.com>
Reviewed-by: Dmitry Antipov <dantipov@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Andrey Trachenko <atrachenko@nvidia.com>
7 years agopcie: host: tegra: fix PCIe powergate
Vidya Sagar [Thu, 13 Apr 2017 07:26:26 +0000 (12:56 +0530)]
pcie: host: tegra: fix PCIe powergate

adds a check to see if PCIe partition is already powered up
and tries to un-powergate it only if it is not done already
Also plain powergate/un-powergate APIs are used instead of the
ones with clk_on and clk_off as PCIe clocks are resets are
explicitly handled by PCIe host controller driver

Bug 200286725
Bug 200288867

Change-Id: I04852a253d903b3f9bbc1b1d49faf23cf0789929
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/1462101
(cherry picked from commit 24707f4286e5037a89eed157da39158637c2744f)
Reviewed-on: http://git-master/r/1470942
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
7 years agomedia:platform:tegra initialize mipi mutex
Aparna Das [Tue, 25 Apr 2017 23:38:18 +0000 (16:38 -0700)]
media:platform:tegra initialize mipi mutex

Tegra mipi mutex is locked in tegra_mipi_calibration
function prior to calling vmipi calibration function.
Initialize mipi mutex even for virtualized configuration.

Bug 1910508

Change-Id: Ic33b6cf1585c1e2e955d71ce914b500740cf1c2d
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: http://git-master/r/1465100
(cherry picked from commit cc4295063c7507fa9359e64ec580fbee913b1672)
Reviewed-on: http://git-master/r/1469969
Reviewed-by: Wenjia Zhou <wenjiaz@nvidia.com>
Tested-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
7 years agodma-buf: fix slowness issue in dmabuf_can_defer_unmap API
Sri Krishna chowdary [Mon, 17 Apr 2017 07:07:43 +0000 (12:37 +0530)]
dma-buf: fix slowness issue in dmabuf_can_defer_unmap API

The slowness was rootcaused to be from devres_find. Since,
devres_find does a simple linear search in all resources
associated with a device, it is quite possible that the
list gets huge and so the search takes a huge time.

Instead, add a new bit-field no_dmabuf_defer_unmap to the
device struct and use it to find out if a device can defer
unmap or not. By default, all devices can defer unmap.
So, initialize the field to 0.

bug 1905191

Change-Id: Ide57bc73ae1b35dfc5b03161478415c7e5c90da4
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/1463689
(cherry picked from commit 670d83c34f2f0acaa575f15d5a42cf764dc68056)
Reviewed-on: http://git-master/r/1471034
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
7 years agodrivers: Fix register read for sensors
Wenjia Zhou [Mon, 24 Apr 2017 01:36:45 +0000 (18:36 -0700)]
drivers: Fix register read for sensors

Fix data type required for the core register
read api. Passing 8 bit pointer corrupts the stack
and pushes kernel to panic.

Bug 1856401

Change-Id: I5b3039e5306e8579c1d9efccfd1efb5de912bfe0
Signed-off-by: Bhanu Murthy V <bmurthyv@nvidia.com>
Signed-off-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-on: http://git-master/r/1467786
(cherry picked from commit 8e6e47d72fd0cd464678566c2be2e6891583f20d)
Reviewed-on: http://git-master/r/1468154
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
7 years agocamera: Don't create video node if no camera found
Wenjia Zhou [Thu, 20 Apr 2017 00:14:24 +0000 (17:14 -0700)]
camera: Don't create video node if no camera found

Skip video node registration if there is no camera
presented in the system.

Fail to do so will leave unwanted video nodes in the
system and can cause issues later.

Bug 200290786

Change-Id: Ib5a8a3386b3f9a2486793419e247cbe4b669a422
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/1330920
(cherry picked from commit 8f6cda5b10016c7a46986eb8e96ddfb78d7ecc62)
Reviewed-on: http://git-master/r/1468153
Reviewed-by: Wenjia Zhou <wenjiaz@nvidia.com>
Tested-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
7 years agoi2c: tegra: reset the controller before going to suspend
Shardar Shariff Md [Mon, 24 Apr 2017 12:31:46 +0000 (18:01 +0530)]
i2c: tegra: reset the controller before going to suspend

Reset the controller before going to suspend to allow bpmp firmware
i2c driver to perform i2c trasactions in normal(default) mode after
resume, as the kernel i2c driver is by default doing transactions
in packet mode.

Bug 200289077

Change-Id: I407b616e2a5e558dd03cafe95507d2a8438e20a2
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/1468551
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
7 years agothermal: pwm fan: remove continuous info spew
Hyong Bin Kim [Mon, 10 Apr 2017 05:32:49 +0000 (14:32 +0900)]
thermal: pwm fan: remove continuous info spew

Replace "Enabled/Disable vdd-fan" dev_info spew to dev_dbg.

Bug 200289947

Change-Id: Ia61c2daaa3546e233b0c851d1c85b6013a37d6d2
Reviewed-on: http://git-master/r/1460165
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hyong Bin Kim <hyongbink@nvidia.com>
Tested-by: Hyong Bin Kim <hyongbink@nvidia.com>
Reviewed-by: Vijay Mishra <vijaym@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
7 years agomedia: camera_common: add some v4l2 fmt fields
Ahung Cheng [Thu, 30 Mar 2017 08:37:53 +0000 (16:37 +0800)]
media: camera_common: add some v4l2 fmt fields

Add xfer_func, ycbcr_enc and quantization in camera
common driver

bug 1884404

Change-Id: I0eab9810640f43eb98ad473f5e7ba036310e67f4
Signed-off-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-on: http://git-master/r/1329630
Reviewed-on: http://git-master/r/1331330
(cherry picked from commit e561694c14235c41b50fc1b5856bc2922b6e2e37)
Reviewed-on: http://git-master/r/1465474
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
7 years agoclk: tegra: Re-factor T210 PLLX registration
Alex Frid [Fri, 7 Apr 2017 03:27:11 +0000 (20:27 -0700)]
clk: tegra: Re-factor T210 PLLX registration

Registered T210 PLLX through T210 specific interface to make sure T210
calculate rate callback is invoked (not callback common for pre-T210
SoCs). Converted T210 PLLX registration interface into wrapper of PLLC
registration to avoid unnecessary duplication of the functionality.

Bug 200267979

Change-Id: I0a6166ce003dbd2ef0c8b160b88cfbae8d51f5c2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1458348
(cherry picked from commit 431f862cfd70b9bfc5ca3762f53e3b25c1222a29)
Reviewed-on: http://git-master/r/1463564
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
7 years agoclk: tegra: Fix T210 PLL bypass settings
Alex Frid [Wed, 5 Apr 2017 03:43:50 +0000 (20:43 -0700)]
clk: tegra: Fix T210 PLL bypass settings

- Added TEGRA_PLL_BYPASS flag to PLLRE and PLLC4 registration
- Removed TEGRA_PLL_BYPASS flag from PLLMB registration

Bug 200267979

Change-Id: Ie304800a3aff86999954ccca2dc2b92e87174404
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1456403
(cherry picked from commit 818e33f2cc58c1b3924570fa096e124a9d909cf0)
Reviewed-on: http://git-master/r/1463563
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
7 years agoclk: tegra: Update T210 PLLSS (D2/DP) registration
Alex Frid [Wed, 5 Apr 2017 03:37:45 +0000 (20:37 -0700)]
clk: tegra: Update T210 PLLSS (D2/DP) registration

Removed from T210 PLLSS registration code sections that
- attempt to set PLL minimum rate (unnecessary, and dangerous if PLL
  is already enabled on boot)
- apply pre-T210 defaults settings
- check IDDQ setting (duplicated with T210 PLLSS check defaults)

Replaced setting of reference clock with check that default oscillator
selection is not changed, and failed registration otherwise.

Reordered registration, so that PLL initialization is called after
VCOmin adjustment.

Bug 200267979

Change-Id: I3f42dee41325e1b9b00e053e53d5e428441e1c5c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1456401
(cherry picked from commit 6c6edd2c46324f4069460a0b5d0b96bbf4afd1cf)
Reviewed-on: http://git-master/r/1463562
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
7 years agoclk: tegra: Update T210 CSI/DSI PLLD controls
Alex Frid [Wed, 5 Apr 2017 01:42:07 +0000 (18:42 -0700)]
clk: tegra: Update T210 CSI/DSI PLLD controls

- Applied common PLLD lock to out-of-bound CSI source selection
  interfaces.
- Moved registration of pf PLLD DSI branch to PLL initialization (from
  peripheral initialization).

Bug 200267979

Change-Id: If11fdf773709b1252727b4b047a85d459b92407c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1456399
(cherry picked from commit 631c35ba408ed5145c023535a76070d73fc2112e)
Reviewed-on: http://git-master/r/1463561
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
7 years agouphy: t210: enable xudc & M.2 PCIe simultaneously
BH Hsieh [Thu, 20 Apr 2017 05:06:10 +0000 (13:06 +0800)]
uphy: t210: enable xudc & M.2 PCIe simultaneously

This change enables XUDC on T210 USB2.0 only OTG port
without occupy one UPHY lane hence PCIe x1 on M.2 and
XUSB device mode could be supported simultaneously.

Bug 200283187

Change-Id: Icbc3f7f79a7358675afcd7cd5347641e83344aaa
Signed-off-by: BH Hsieh <bhsieh@nvidia.com>
Reviewed-on: http://git-master/r/1466439
(cherry picked from commit 3ff386074c7a70936acb783d0c2bdf4aef3e22b9)
Reviewed-on: http://git-master/r/1468983
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: ChihMin Cheng <ccheng@nvidia.com>
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agoplatform: tegra: denver_mca: clear mca errors for denver
Krishna Reddy [Wed, 25 Jan 2017 23:09:42 +0000 (15:09 -0800)]
platform: tegra: denver_mca: clear mca errors for denver

Log MCA Erorrs for Denver and clear the same.

Bug 200144702

Change-Id: Iea60fc1fdac029e62a96e3d9de30d0278f85a5da
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/1294262
(cherry picked from commit 11b097af8f61dd032620344f9f7025d89c436452)
Reviewed-on: http://git-master/r/1468553
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agonet: wireless: bcmdhd: fix bcmdhd module remove & insmod
Manikanta [Mon, 13 Feb 2017 10:46:58 +0000 (16:16 +0530)]
net: wireless: bcmdhd: fix bcmdhd module remove & insmod

Issue: During module remove mmc host is powered down
and it is not powered up while loading bcmdhd driver again.
This is causing mmc command timeouts and insmod failure.

Fix: power up mmc host during bcmdhd driver loading.

bug 1855363

Change-Id: Iac8e9d940fa319e63683cef3e0653c0ada4a9a1b
Signed-off-by: Manikanta <mmaddireddy@nvidia.com>
Reviewed-on: http://git-master/r/1303766
(cherry picked from commit 12ea500eeca5405d798cf96665a8b5c9c26b90ef)
Reviewed-on: http://git-master/r/1467475
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
7 years agoconfig: t186: Update minimal defconfig
Vishnu Reddy Mandalapu [Sat, 15 Apr 2017 20:57:16 +0000 (13:57 -0700)]
config: t186: Update minimal defconfig

-- Enable DSI and DSI2EDP in defconfig
-- This facilitates to enable 3 displays on EBP partition
-- Enable Fixed/Dummy, PMIC regulators for EBP partition.

boot.img size increased by 6417 bytes

Jira VFND-3970
Bug 200296937

Change-Id: I68c04726f21d8cd53e2bd1b5bde19c3a2261de56
Signed-off-by: Vishnu Reddy Mandalapu <vmandalapu@nvidia.com>
Reviewed-on: http://git-master/r/1463366
(cherry picked from commit fccefb6a247a9a59baf37442bd84ac52759f5006)
Reviewed-on: http://git-master/r/1467046
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
7 years agodma-buf: Check if sg_table exists before unmap
Sri Krishna chowdary [Wed, 19 Apr 2017 08:56:20 +0000 (14:26 +0530)]
dma-buf: Check if sg_table exists before unmap

Call unmap_dma_buf on release only if the buffer was previously
mapped. sg_table is NULL when no map was ever called on
the buffer and it is -ENOMEM when map fails.

bug 200293898

Change-Id: I1db881e8440bd49535c89cf71aaa6dfca5f0925d
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/1468198
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Kim <bok@nvidia.com>
Tested-by: Bo Kim <bok@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agommc: tegra: fix build error when CONFIG_DEBUG_FS=n
Jake Park [Wed, 5 Apr 2017 10:19:46 +0000 (19:19 +0900)]
mmc: tegra: fix build error when CONFIG_DEBUG_FS=n

Bug 1885240

Change-Id: Ib0a1af16de930fa8772903f44776c39532a4990f
Signed-off-by: Jake Park <jakep@nvidia.com>
Reviewed-on: http://git-master/r/1455835
(cherry picked from commit f27fbfd3a8422dfb2736987491446492e020a14b)
Reviewed-on: http://git-master/r/1461825
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
7 years agomedia: i2c: Disable i2c bulk write for IMX274
Frank Chen [Fri, 21 Apr 2017 00:48:26 +0000 (17:48 -0700)]
media: i2c: Disable i2c bulk write for IMX274

Disable i2c bulk write for IMX274 due to instablity
issues.

Bug 200299891

Change-Id: I63ada3ed175a59fd1e0562384e91401cf128c5c2
Signed-off-by: Frank Chen <frankc@nvidia.com>
Reviewed-on: http://git-master/r/1467140
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bhanu Murthy V <bmurthyv@nvidia.com>
Reviewed-by: David Wang (SW-TEGRA) <davidw@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agopwm: tegra: Set maximum clock source frequency to 48MHz for T210
Laxman Dewangan [Fri, 21 Apr 2017 14:50:59 +0000 (20:20 +0530)]
pwm: tegra: Set maximum clock source frequency to 48MHz for T210

Tegra210 PWM can work properly of clock of 48Hz to IP clock.
Set 48MHz for Tegra210 as maximum allowed frequency.

Change-Id: I888603fb1aaa603fdba974de6109f37cab8aef10
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1467615
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agopcie: host: tegra: disable L1SS in CLKREQ absence
Vidya Sagar [Tue, 18 Apr 2017 07:33:55 +0000 (13:03 +0530)]
pcie: host: tegra: disable L1SS in CLKREQ absence

configures root port to not advertise its L1SS capability
if there is no CLKREQ routing from end point to root port
which is indicated through disable-clock-request entry in
root port DT

Bug 200297767

Change-Id: Ib249406242e3cf007cde368a47064fd53cbfa2df
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/1464516
(cherry picked from commit 5d0dc94f59f2d9007f7dff0ceecb4229f9f584e2)
Reviewed-on: http://git-master/r/1467441
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agoxhci: tegra: Add PMQOS calls to request CPU frequency
Petlozu Pravareshwar [Thu, 9 Mar 2017 11:44:24 +0000 (17:14 +0530)]
xhci: tegra: Add PMQOS calls to request CPU frequency

Add PMQOS calls to request CPU frequency when Bulk
or Isoch transfers are in progress. This is to
improve USB host performance.

PMQOS request will only gets triggered when urb
transfer length is more than BOOST_TRIGGER_SIZE.

Bug 200287189

Change-Id: If9ab7bb62eb2436759fbd873c0b1ab4586a58928
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: http://git-master/r/1317853
(cherry picked from commit 96d07d7a5a098e6d8dd492d55544298d1326d3a8)
Reviewed-on: http://git-master/r/1465607
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
7 years agoarm64: t18x: Enable CONFIG_BLK_DEV_LOOP
Ian Chang [Thu, 4 Aug 2016 06:38:45 +0000 (14:38 +0800)]
arm64: t18x: Enable CONFIG_BLK_DEV_LOOP

bug 200128690

Change-Id: I071e282df06dfbda167e4bed3936e9649f1910e1
Signed-off-by: Ian Chang <ianc@nvidia.com>
Reviewed-on: http://git-master/r/1197318
Reviewed-on: http://git-master/r/1466570
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agoclk: tegra: move dfll_scale_dvco_rate under ifdef
dmitry pervushin [Wed, 29 Mar 2017 15:52:06 +0000 (17:52 +0200)]
clk: tegra: move dfll_scale_dvco_rate under ifdef

This function is used only if debugfs is enabled

Bug 200255172

Change-Id: Id095a540c64311c8db15c932f9a2cb30a6c649f0
Signed-off-by: dmitry pervushin <dpervushin@nvidia.com>
(cherry picked from commit 11685c1a33219881772a85ba3d7b1c992cec3212)
Reviewed-on: http://git-master/r/1331592
(cherry picked from commit 0e7cc5ee6adad46446b37226803c0901c2a4a5ec)
Reviewed-on: http://git-master/r/1460796
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
7 years agoALSA: hda/tegra: use AZX_DCAPS_PM_RUNTIME flag for android
Ravindra Lokhande [Wed, 15 Feb 2017 09:15:25 +0000 (14:45 +0530)]
ALSA: hda/tegra: use AZX_DCAPS_PM_RUNTIME flag for android

Use AZX_DCAPS_PM_RUNTIME flag for HDA driver only for android.

Bug 1826800

Change-Id: I37c0bfd4848a55aa803c544ee362a4b463183a81
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/1305264
(cherry picked from commit 1f90c791eb0409f75353bb99d4ba7aee76fd804d)
Reviewed-on: http://git-master/r/1465392
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Tested-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
7 years agoALSA: hda: allow pcm_open to be successful
Ravindra Lokhande [Tue, 7 Feb 2017 10:10:59 +0000 (15:40 +0530)]
ALSA: hda: allow pcm_open to be successful

Remove code to check for valid eld which causes pcm_open to fail if
no monitor is connected. Also remove condition which earlier allowed
pcm_open to succeed if atleast pcm capabilities are known from eld.

Bug 1826800

Change-Id: Id5768b61e3a1aa21c4485cb22169e94432daadf6
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/1300462
(cherry picked from commit cf66d3305923aeeac5adb0b955fe9fee0ffba31d)
Reviewed-on: http://git-master/r/1453065
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Tested-by: Shreshtha Sahu <ssahu@nvidia.com>
7 years agousb: gadget: xudc: Request 150 MHz EMC freq
Rohith Seelaboyina [Tue, 28 Mar 2017 09:42:34 +0000 (15:12 +0530)]
usb: gadget: xudc: Request 150 MHz EMC freq

* Request 150 MHz EMC freqnecy when data
  transfers happen in xudc driver.
* This change schedules work to set 150 MHz EMC
  freq through bwmgr(bandwidth manager)
  when USB requests >= 16KB are seen.
* Delayed work is scheduled to trigger after 2 sec
  to restore the EMC frequency to 0 if
  there are no pending transfers

Bug 200266830

Change-Id: I36f1a3d9420e30677836d442001c8e64b4e9cf92
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/1329830
(cherry picked from commit aa4bcaa6c8d175f66c6665543a1c86ef913f9f9b)
Reviewed-on: http://git-master/r/1463592
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rakesh Babu Bodla <rbodla@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
7 years agocrypto: testmgr: Add debug prints
Mallikarjun Kasoju [Tue, 18 Apr 2017 03:55:35 +0000 (09:25 +0530)]
crypto: testmgr: Add debug prints

Add prints for the pass case so that
the test results are clear.

Bug 200298271

Change-Id: I0d717aad55316d65236fee26cc31c9605b585ac0
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-on: http://git-master/r/1464350
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Konduri Praveen <kondurip@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
7 years agoarm64: tegra18: config: enable nvdumper
Yifei Wan [Wed, 1 Mar 2017 05:18:35 +0000 (23:18 -0600)]
arm64: tegra18: config: enable nvdumper

bug 200094773

boot.img size not changed

Change-Id: I0641ccd2486f0dff6adfd2d62f6344c9188e0d13
Signed-off-by: Yifei Wan <ywan@nvidia.com>
Reviewed-on: http://git-master/r/1327258
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
7 years agomedia:camera: call non-block mipical api
Wenjia Zhou [Sat, 15 Apr 2017 04:16:17 +0000 (21:16 -0700)]
media:camera: call non-block mipical api

Use new non-block mipical API

Bug 1867425
Jira CHWI-887

Change-Id: Ibd283f62155cb6eed9c16cbc6955a1cf82f3f243
Signed-off-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-on: http://git-master/r/1330231
Reviewed-on: http://git-master/r/1463259
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bhanu Murthy V <bmurthyv@nvidia.com>
Reviewed-by: David Wang (SW-TEGRA) <davidw@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
7 years agomedia:camera: Add mipical_nonblock api
Wenjia Zhou [Sat, 15 Apr 2017 03:56:50 +0000 (20:56 -0700)]
media:camera: Add mipical_nonblock api

Add private context for each client
 tegra_mipi_context
Add nonblocking mipical API
 tegra_mipical_nonblock
 tegra_mipical_nonblock_check_stat

Usage:
1. Call tegra_mipical_nonblock with handle, along with lanes and timeoutms,
   driver will allocate memory for tegra_mipi_context.
2. After sensor start streaming, call tegra_mipical_nonblock_check_stat with
   the handle.
3. In check_stat, context will be freed.

When client call nonblock api, driver will spawn a thread to run mipical
in background, return to client immediately.
For multiple clients usecase, each thread will grab a mutex before
programming mipical HW.
Client should call nonblock_check_stat to check mipical status.
However nonblock_check_stat can sleep, since it has to wait for kthread to
finish.

Bug 1867425
Jira CHWI-887

Change-Id: I542b613ffb5618039fcf8c78933429d1ffb9075b
Signed-off-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-on: http://git-master/r/1330230
(cherry picked from commit c60d35694c74e64d5c8a427ba4c46aa8213f580e)
Reviewed-on: http://git-master/r/1463257
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bhanu Murthy V <bmurthyv@nvidia.com>
Reviewed-by: David Wang (SW-TEGRA) <davidw@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
7 years agodrivers: vivid: Rename card for vivid driver
Bhanu Murthy V [Sat, 15 Apr 2017 00:06:39 +0000 (17:06 -0700)]
drivers: vivid: Rename card for vivid driver

vivid capture and output devices have same
card name to match from userspace.
Use of v4l2 device name as card name helps
with the tegra userspace flow.

Bug 1898472

Change-Id: If4a629b8cf8faba2bcee4d24d9edc1f8e5920912
Signed-off-by: Bhanu Murthy V <bmurthyv@nvidia.com>
Reviewed-on: http://git-master/r/1463211
Reviewed-on: http://git-master/r/1464134
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hu He <hhe@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
7 years agoi2c: tegra: use slow_clock only when timeout feature is enabled
Shardar Shariff Md [Wed, 5 Apr 2017 09:00:38 +0000 (14:30 +0530)]
i2c: tegra: use slow_clock only when timeout feature is enabled

- Use slow_clock only when timeout feature is enabled
- Convert dev_err to dev_dbg for i2c slow missing entries print
as this is valid and not an error.

Bug 1889364

Change-Id: Ib7bb3817d1dc10e990408749bac837bcef670214
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/1455643
(cherry picked from commit 9102cfadb14373531b0e85e0aa37b646c060af05)
Reviewed-on: http://git-master/r/1463870
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
7 years agothermal: tegra: add pllx offsetting debugfs nodes
Srikar Srimath Tirumala [Thu, 6 Apr 2017 23:31:31 +0000 (16:31 -0700)]
thermal: tegra: add pllx offsetting debugfs nodes

Bug 200233003

Change-Id: Ib3a67651f9f2d85b2a920683c67a2c684371c52e
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1457464
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit 2d062896b80b1a4b707cbbf283c353533c74ff12)
Reviewed-on: http://git-master/r/1462736
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
7 years agothermal: tegra: add thermtrip debugfs nodes
Srikar Srimath Tirumala [Thu, 6 Apr 2017 01:12:36 +0000 (18:12 -0700)]
thermal: tegra: add thermtrip debugfs nodes

Bug 200233003

Change-Id: I88152ca4a4c352909ac782874fb081acfbb608f1
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1456556
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit d7e1aee761e8f8d6ec0b9a5dedb1756dc63c295d)
Reviewed-on: http://git-master/r/1462735
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
7 years agothermal: tegra: support hw and sw shutdown
Srikar Srimath Tirumala [Wed, 5 Apr 2017 17:29:06 +0000 (10:29 -0700)]
thermal: tegra: support hw and sw shutdown

Currently the critical trip points in thermal framework are the only
way to specify a temperature at which HW should shutdown. This is
insufficient for certain platforms which would want an orderly
software shutdown in addition to HW shutdown.

This change allows soctherm DT to specify thermtrip temperatures so
that critical trip points framework can be used for doing software
shutdown.

Bug 200233003

Change-Id: I62cac336b87a6a4cce3c1a6f2d2cb3edcb8102b3
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1456368
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit 043c82eeae796b2bea922af998c9639042fea800)
Reviewed-on: http://git-master/r/1462734
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
7 years agothermal: tegra: fix hw-pllx-offsetting parsing
Srikar Srimath Tirumala [Wed, 5 Apr 2017 00:49:33 +0000 (17:49 -0700)]
thermal: tegra: fix hw-pllx-offsetting parsing

Do not parse beyond the number of elements specified by DT.

Bug 200233003

Change-Id: I182a3ba6ff214d54756ba7ab56f6b9400d7cff9f
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1456367
Reviewed-by: Navneet Kumar <navneetk@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit dc44cb62f92e996c18b969bed357e321c3573683)
Reviewed-on: http://git-master/r/1462732
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
7 years agonet: wireless: bcmdhd*: exclude unused files from build
Manikanta [Mon, 10 Apr 2017 09:26:16 +0000 (14:56 +0530)]
net: wireless: bcmdhd*: exclude unused files from build

Issue: couple of files are not used in WiFi driver, these
are reducing the code coverage percentage.

Fix: Exclude these files from build

bug 200266797

Change-Id: Iade0624fba4b674e9f9aca8451b8db6b532425aa
Signed-off-by: Manikanta <mmaddireddy@nvidia.com>
Reviewed-on: http://git-master/r/1458991
(cherry picked from commit 4226f049d63c73fd84af4fd8d5c9305901c8bef0)
Reviewed-on: http://git-master/r/1463334
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agonvdumper: update the configuration
Liang Cheng [Fri, 31 Mar 2017 20:59:33 +0000 (15:59 -0500)]
nvdumper: update the configuration

1./ add several field offsets in tegra_sku_info
so that mem_parser can parse related information.

2./ update the offset of ``dentry'' in path.

Bug 1799266

Change-Id: Ic1fe8e5d6e62c8c2acd0ffb34fdf3017b883b8a7
Signed-off-by: Liang Cheng <licheng@nvidia.com>
Reviewed-on: http://git-master/r/1453384
(cherry picked from commit 2a141178050d6297c2add4d0cff3ae0a3bf4057f)
Reviewed-on: http://git-master/r/1462369
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yifei Wan <ywan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agomedia:platform:tegra: WAR: avoid reading float
Wenjia Zhou [Wed, 12 Apr 2017 23:30:30 +0000 (16:30 -0700)]
media:platform:tegra: WAR: avoid reading float

If gain_factor or framerate_factor does not exist in DT,
stop parsing DT and return immediately with 0.
None of sensor DT has xxx_factor in place. This is to
avoid excessive error message in kernel.

Bug 200297559

Change-Id: I556824371b7bb4bd5b2e42a1bf3cad9929cdc0d0
Signed-off-by: Wenjia Zhou <wenjiaz@nvidia.com>
Reviewed-on: http://git-master/r/1459941
(cherry picked from commit a5e3bf82d50d893f5f6f994c6b65b1cdb45e803e)
Reviewed-on: http://git-master/r/1461776
GVS: Gerrit_Virtual_Submit
Reviewed-by: Michelle Soult <msoult@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
7 years agousb: otg-fsm: suppress a_wait_bcon timeout message
Henry Lin [Wed, 5 Apr 2017 03:52:47 +0000 (11:52 +0800)]
usb: otg-fsm: suppress a_wait_bcon timeout message

a_wait_bcon timeout will happen if ID pin is detected but no B-device is
connected. Changed a_wait_bcon timeout message to debug level to avoid
spew prints for this kind of normal use case.

Bug 200289841

Change-Id: I9987a9d260c4e270f435060ac305f9961ab0e42d
Signed-off-by: Henry Lin <henryl@nvidia.com>
Reviewed-on: http://git-master/r/1455408
(cherry picked from commit c59e2704e22c3c29db0dc4c39e98ee506cfd3cda)
Reviewed-on: http://git-master/r/1460223
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijay Mishra <vijaym@nvidia.com>
Tested-by: Vijay Mishra <vijaym@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
7 years agothermal: tegra: add hw throttle debugfs nodes
Srikar Srimath Tirumala [Fri, 31 Mar 2017 01:50:36 +0000 (18:50 -0700)]
thermal: tegra: add hw throttle debugfs nodes

Bug 200233003

Change-Id: Iaeee34eb3cd2a7a7235e7b281c79640638ad0c2d
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1453304
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit f9f70f746279c60fee1673137d4fb81186805ae8)
Reviewed-on: http://git-master/r/1461614
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agothermal: tegra: enable OC hw throttle
Srikar Srimath Tirumala [Fri, 31 Mar 2017 00:34:40 +0000 (17:34 -0700)]
thermal: tegra: enable OC hw throttle

Parse Over Current settings from DT and program them to generate
interrupts. Also enable hw throttling whenever there are OC events.
Log the OC events as debug messages.

Bug 200233003

Change-Id: I80658956b2ed01e554c9eefc9324c5594e1298f9
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1453303
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit f98c3bd706a68c6233478663d8dd45efaef90216)
Reviewed-on: http://git-master/r/1461605
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agommc: cmdq: Diasble CQ intr before CQ mode enable
R Raj Kumar [Sun, 2 Apr 2017 10:22:02 +0000 (15:52 +0530)]
mmc: cmdq: Diasble CQ intr before CQ mode enable

-To avoid previous CQ interrupts it is good to disable the
CQ interrupt status before enabling the CQ interrupt.
-Wait till all cmdq requests are processed before
disabling cqe mode.
-Cherry-picked from http://git-master/r/1454002 and
added safe exit approach when set blk size operation
failed in cqe mode.
-Fix coverity issues ID 433707 & ID 433708

Bug 200295127

Change-Id: Ie5786a4efdb271b44e0a9352b2ebd6e321defc4b
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/1461403
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agouphy: xhci: tegra: t210: enable vbus after HCRST
BH Hsieh [Fri, 24 Mar 2017 06:41:55 +0000 (14:41 +0800)]
uphy: xhci: tegra: t210: enable vbus after HCRST

Realtek R8152 is observed violating spec and failed
to turn on termination after exiting Polling.Active
due to 12 ms timeout.

To avoid this issue, enable VBUS after HCRST instead
of before loading xusb firmware hence no reset SSPI
would interrupt Polling.RxEQ/Polling.Active state.

bug 200272921

Change-Id: I555acda4fd238d0b89b94d8a823c2150629361ec
Signed-off-by: BH Hsieh <bhsieh@nvidia.com>
Reviewed-on: http://git-master/r/1313776
(cherry picked from commit f48e0a8f2426932b653d0ffd337a6571050736f4)
Reviewed-on: http://git-master/r/1453256
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Tested-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agopwm: tegra: add support to set parent clok
R Raj Kumar [Tue, 7 Mar 2017 08:37:47 +0000 (14:07 +0530)]
pwm: tegra: add support to set parent clok

Add support to configure parent clock source for PWM
controller. The parent clock information is provided from
DT.

This helps in getting maximum clock source frequency if
proper parent is not selected by bootloader.

Bug 200267484

Change-Id: I961cf2a8c71f4b756198ea641c2dc33ddf35ac96
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/1461444
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
7 years agopwm: tegra: Support maximum clock source frequency
Laxman Dewangan [Wed, 12 Apr 2017 05:49:36 +0000 (11:19 +0530)]
pwm: tegra: Support maximum clock source frequency

Nvidia Tegra PWM controller is taped out for the different
IP frequency across the SOCs.

For Tegra210, the maximum limit is 38.4MHz. For Tegra186 it is
102MHz.

Add support to limit the maximum PWM clock source frequency to
the IP maximum clock source limit.

bug 200267484

Change-Id: I3bba6266647c5f2a985a65ec63f8ee954a050745
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/1461443
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agopwm: tegra: Get clock rate in init or when set it
Laxman Dewangan [Tue, 11 Apr 2017 13:16:15 +0000 (18:46 +0530)]
pwm: tegra: Get clock rate in init or when set it

Instead of calling the clk_get_rate() in pwm_config()
every time, remember the current clock rate. The clock
rate is read during probe or when setting new rate.

This will avoid unnecessarily call of clk_get_rate()
from PWM config.

Change-Id: Ia2e51769301330e1cfedb563aa4142c2e7b3c366
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/1461442
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agopwm: tegra: Rewrite clock enable/disable usage
Laxman Dewangan [Sat, 1 Apr 2017 07:54:28 +0000 (13:24 +0530)]
pwm: tegra: Rewrite clock enable/disable usage

In DVFS use case, the PWM configurations are required to have the
non-sleeping clock ops and for this, call the clock enable/disable
or clock prepare_enable/clk_disable_unprepare() accordingly.

Use the function pointers in the PWM tegra info structure to call
APIs instead of checking the flag and calling it. This simplify
the code.

Change-Id: I228f03c0e0e8ac9daaba642bc07a2c628b3395b9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1453585
(cherry picked from commit 4f2618faa3fa661675014ecdf8e7266ace91a18c)
Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/1461463
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit

7 years agotegra-virt-alt: Add SAD support
Dipesh Gandhi [Fri, 10 Mar 2017 10:28:20 +0000 (15:58 +0530)]
tegra-virt-alt: Add SAD support

Has both SAD and SUBFRAME support

Bug 200289676
Jira EMA-388

Change-Id: I293b5ed269255990c6ff04696d465f42a772a139
Signed-off-by: Uday Gupta <udayg@nvidia.com>
Reviewed-on: http://git-master/r/1328685
(cherry picked from commit 9a09f0f3904909cea34d46eb72baa123e051a497)
Reviewed-on: http://git-master/r/1325166
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hariharan Sivaraman <hariharans@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Nitin Pai <npai@nvidia.com>
7 years agomemory: tegra: add mr4 polling
Antti P Miettinen [Tue, 28 Feb 2017 13:04:38 +0000 (15:04 +0200)]
memory: tegra: add mr4 polling

Based on work by Alex Waterman <alexw@nvidia.com>

Bug 1868134

Change-Id: I00ceac68960fdce18572923c105a11b450fd0fc7
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/1312604
(cherry picked from commit cbe3f67a92a9a62d4df2b6a9dcafbb6420644d23)
Reviewed-on: http://git-master/r/1459037
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
7 years agoCAN: Enable CAN support on quill
Sandipan Patra [Fri, 31 Mar 2017 04:38:34 +0000 (10:08 +0530)]
CAN: Enable CAN support on quill

MTTCAN software enabled as a kernel module.
Quill has 2 internal CAN controllers(CAN0 and
CAN1). These are Bosch specific IPs. This can
be enabled on tegra using MTTCAN module. Each controller
needs an individual CAN transceivers to be presented as
a CAN node on the network.
These nodes can be communicated inside a CAN network as
well as between CAN networks also.

boot.img size not changed.

Bug 200294118

Change-Id: I49ab46379e7fb2ee2788cb450e43ba9c3e091e62
Signed-off-by: Sandipan Patra <spatra@nvidia.com>
Reviewed-on: http://git-master/r/1452761
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
(cherry picked from commit 602f1c87699c486128f06451bfb2624dda086a97)
Reviewed-on: http://git-master/r/1455642
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bibek Basu <bbasu@nvidia.com>
7 years agothermal: tegra: tj-therm: return probe deferral
sreenivasulu velpula [Fri, 24 Mar 2017 11:37:40 +0000 (17:07 +0530)]
thermal: tegra: tj-therm: return probe deferral

If thermal sensor driver used by tj-therm is not initialized
at the time of tj-therm probe, then return eprobe_defer.

Bug 200248952
Bug 200294922

Change-Id: I5962df2acd49ac837dbad1e7eeca3c6b3d149505
Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com>
Reviewed-on: http://git-master/r/1327628
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-by: Vipin Kumar <vipink@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
7 years agothermal: tegra: Update CONFIG_TEGRA_SOCTHERM check
sreenivasulu velpula [Tue, 21 Mar 2017 18:19:42 +0000 (23:49 +0530)]
thermal: tegra: Update CONFIG_TEGRA_SOCTHERM check

Use CONFIG_TEGRA_SOCTHERM only for building soctherm and not for other
modules in /drivers/thermal/tegra as they may not depend on soctherm.

Bug 200248952
Bug 200294922

Change-Id: Ib3d2742c426443c1f7dd2b0dadc8743fda4ba330
Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com>
Reviewed-on: http://git-master/r/1323277
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-by: Vipin Kumar <vipink@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
7 years agopcie: host: tegra: fix remove/shutdown hook
Vidya Sagar [Fri, 10 Feb 2017 12:16:09 +0000 (17:46 +0530)]
pcie: host: tegra: fix remove/shutdown hook

PCIe platform device resources are freed if there
are no end point devices enumerated, hence, it is not
required to attempt to do it once again during shutdown
process. This patch takes care of that.

Bug 200278486

Change-Id: Ie7ee07ef96f5a8f26be664086ab2efe78110987a
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/1303015
(cherry picked from commit 4989968f6dde5656e47e11383622ce360cae4688)
Reviewed-on: http://git-master/r/1316263
(cherry picked from commit ee16c6068afcec0df7bd80cc71589eff080669e8)
Reviewed-on: http://git-master/r/1459712
GVS: Gerrit_Virtual_Submit
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
7 years agopcie: host: tegra: add shutdown hook
Vidya Sagar [Wed, 8 Feb 2017 08:48:53 +0000 (14:18 +0530)]
pcie: host: tegra: add shutdown hook

adds shutdown hook to undo all the things
that were done during probe to leave hardware
in a sane state before shutting down the system

Bug 200268782

Change-Id: I2dd197128a0d107d42247aef23e6911667a18019
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/1301271
(cherry picked from commit 749daacffd1f618bc4121853e145797fef27a3b1)
Reviewed-on: http://git-master/r/1316262
(cherry picked from commit b5fd77bf3dcb04625c4ba741eed888e538e362cc)
Reviewed-on: http://git-master/r/1459710
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
7 years agosoc/tegra: sysedp: Fix registering of consumers via sysfs
Jon Hunter [Thu, 23 Mar 2017 16:21:38 +0000 (16:21 +0000)]
soc/tegra: sysedp: Fix registering of consumers via sysfs

SYSEDP consumers can be registered via the sysfs node
'/sys/power/system_edp/consumer_register' by writing a string with
the following format:

'consumer_name state0, state1, …, stateN'

Currently, this is not working because the function strcspn() which
parses the string that is written is only looking for the first
newline character and not newline and space characters. This is
causing the entire string to treated as the name, which might be
bigger than the max permitted, and there to be no states. Fix this
by searching the string for either the first space or newline.

Bug 1811732

Change-Id: I13832f7dbb02f013ecb3c1c06a0b094b3e0aa202
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: http://git-master/r/1326976
(cherry picked from commit cc45e8f58c49ed5806a8a1132b6522ec4cef52bf)
Reviewed-on: http://git-master/r/1456975
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
7 years agoARM64: config: t186: Enable support for M3420 audio
Jon Hunter [Fri, 31 Mar 2017 07:59:56 +0000 (08:59 +0100)]
ARM64: config: t186: Enable support for M3420 audio

Enable support for audio on Orca Viper (M3420) platform.

boot.img size is increased by 1280 bytes.

Bug 200286098

Change-Id: I7cf387e90f0a92c6f1556444568f6b410acd3922
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: http://git-master/r/1457889
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
7 years agoASoC: ad193x: Add support for setting the DAC DAI format
Jon Hunter [Thu, 6 Apr 2017 12:30:23 +0000 (13:30 +0100)]
ASoC: ad193x: Add support for setting the DAC DAI format

By default the ad193x DAC is configured for TDM mode and is not
reconfigured based upon the actual mode being used by the machine.
Update the ad913x driver to configure the DAC DAI format based upon
the actual mode being used.

It is odd that the ADC is configured for TDM mode for I2S and not the
'STEREO' mode, but as we are not using the ADC leave this as-is for
now.

Bug 200286098

Change-Id: Ie9e6039b841d57c4f059da95180694f82e5135b9
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: http://git-master/r/1457888
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
7 years agoRevert "kernel-4.4: input: Validate event code index"
Shawn Joo [Fri, 31 Mar 2017 07:35:12 +0000 (16:35 +0900)]
Revert "kernel-4.4: input: Validate event code index"

it causes a regression on input event handling since
some events are filtered out.
This reverts commit 8cff5e7625e37f922540db55c724d402fd4fb682.

Bug 200293664

Change-Id: I616a2b909ba429c4ef9dc345f0ae20632382776c
Reviewed-on: http://git-master/r/1452945
(cherry picked from commit fda6574379606ab79b2aac54736e46c463a8d59e)
Reviewed-on: http://git-master/r/1457699
Tested-by: Jimit Raja <rajaj@nvidia.com>
Reviewed-by: Jubeom Kim <jubeomk@nvidia.com>
Tested-by: Shawn Joo <sjoo@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agodrivers: media: update pca9570 IR setting
Esen Chen [Thu, 6 Apr 2017 02:23:41 +0000 (10:23 +0800)]
drivers: media: update pca9570 IR setting

IMX185 HW module polarity reversed from v1.1.

Bug 200293265

Change-Id: I4bd1ad5b423d34c9c56fa1fcef68bbd6040c62b9
Signed-off-by: Esen Chen <esenc@nvidia.com>
Reviewed-on: http://git-master/r/1456903
(cherry picked from commit a2822f73edb2e09152648759b7bdacf393615da2)
Reviewed-on: http://git-master/r/1456580
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agosched, cpufreq: Update frequency relative to policy->max
Sai Gurrappadi [Mon, 13 Feb 2017 17:46:38 +0000 (09:46 -0800)]
sched, cpufreq: Update frequency relative to policy->max

Frequency invariant load is currently calculated relative to policy->max
i.e :

    freq_invariant_util = util * (policy->cur / policy->max);

Which means that when selecting a frequency, schedutil should also try to
calculate the new target frequency relative to policy->max and not
cpuinfo_max_freq.

Bug 1877558
Bug 200222325

Change-Id: Ice66f1fa52b23a4c1a3837b8f320c3d40acf6c15
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/1458136
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agofirmware: tegra: print errors on true timeout only
Timo Alho [Mon, 20 Mar 2017 11:14:21 +0000 (13:14 +0200)]
firmware: tegra: print errors on true timeout only

Commit "firmware: tegra: check for ack even on timeout"
(b618b8ed648b8d68c531c403937a511c7215da83) introduced warning prints
when communication with bpmp possibly times out. However, on many
cases the communication itself has been succesful but error is printed
as CPU has not been able to process interrupts within the timeout
period. This is causing bpmp WARN_ON() showing up as generic error
message whenever there is bug that causes interrupts to be disabled
for long period. Hence, change the logic to print error only when
there has been a true communication error with BPMP.

Bug 200275675

Change-Id: I4e4c8dd85f0d001dece0e2d43073e82fa774e875
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/1324264
(cherry picked from commit f75aefd9a748487ec663e045198d6d354d5aa25e)
Reviewed-on: http://git-master/r/1457653
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
7 years agothermal: tegra: add support for GPU hw-throttle
Srikar Srimath Tirumala [Thu, 16 Mar 2017 23:40:22 +0000 (16:40 -0700)]
thermal: tegra: add support for GPU hw-throttle

Add support to trigger pulse skippers on the GPU when a HOT trip
point is triggered. The pulse skippers can be signalled to throttle
at lo, medium and high depths\levels.

Also allow the throttle depth to be configured through DT and
introduce a new DT binding for the same.

Bug 200233003

Change-Id: I775135aadfa1343688ae5253113025dd9ca56cf4
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1458106
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
7 years agoclk: tegra: Fix determine rate for fixed rate PLLs
Alex Frid [Mon, 3 Apr 2017 23:29:18 +0000 (16:29 -0700)]
clk: tegra: Fix determine rate for fixed rate PLLs

Returned rate and error code were confused in determine rate operation
for fixed rate PLLs. This confusion is fixed by this commit.

Bug 200267979

Change-Id: Ie116d1e298a9afa4dfaf017ad8c4f9d7a78ff5af
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1454428
(cherry picked from commit 5f2c7697b521725beb1677e90a5f57fc872e272e)
Reviewed-on: http://git-master/r/1456536
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
7 years agoclk: tegra: Mask broken PLLP_OUT dividers model
Alex Frid [Sat, 1 Apr 2017 00:49:55 +0000 (17:49 -0700)]
clk: tegra: Mask broken PLLP_OUT dividers model

By default all PLLP_OUT 2ndary dividers are under h/w control with
fixed factor ratios that do not match settings in the registers.
The set rate operation on dividers would set s/w override bit that
switches divider under s/w control. However, get rate operation does
not check override bit state, and always use register value as divider
ratio. Hence, before the 1st set rate operation get rate returns
incorrect rate.

This commit masked broken get rate operation by setting divider default
rates during clock initialization (actual fix for get rate can be done
later).

Bug 200267979

Change-Id: I1554b49575a9b95b285e327bb4b89ccab6db9f47
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1453526
(cherry picked from commit 8a49c37d4904bda46bcd120729d2f7f270cd1648)
Reviewed-on: http://git-master/r/1456535
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>