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[hercules2020/nv-tegra/linux-4.4.git] / drivers / clk /
2017-05-18 Alex Fridclk: tegra: Fix shared bus connector rate update
2017-04-25 Alex Fridclk: tegra: Re-factor T210 PLLX registration
2017-04-25 Alex Fridclk: tegra: Fix T210 PLL bypass settings
2017-04-25 Alex Fridclk: tegra: Update T210 PLLSS (D2/DP) registration
2017-04-25 Alex Fridclk: tegra: Update T210 CSI/DSI PLLD controls
2017-04-20 dmitry pervushinclk: tegra: move dfll_scale_dvco_rate under ifdef
2017-04-07 Alex Fridclk: tegra: Fix determine rate for fixed rate PLLs
2017-04-07 Alex Fridclk: tegra: Mask broken PLLP_OUT dividers model
2017-04-07 Alex Fridclk: tegra: Don't calibrate floors in suspend
2017-04-04 Alex Fridclk: tegra: Fix T210 PLLRE registration
2017-04-04 Alex Fridclk: tegra: Increase T210 UTMIPLL power on delay
2017-04-04 Alex Fridclk: tegra: Fix T210 PLLU initialization
2017-04-04 Alex Fridclk: tegra: Fix T210 PLLA frequency table
2017-04-04 Alex Fridclk: tegra: Fix T210 PLLA VCO limit
2017-03-30 Alex Fridclk: tegra: Consolidate T210 HPLL registration
2017-03-30 Alex Fridclk: tegra: Fix T210 divider maps
2017-03-30 Alex Fridclk: tegra: Fix T210 PLLC3 PTO id
2017-03-30 Alex Fridclk: tegra: Configure DFLL idle override
2017-03-28 Alex Fridclk: tegra: Add DFLL one-shot calibration
2017-03-24 Stephen Warrenclk: tegra: write correct value to PLLE_AUX register
2017-03-24 Alex Fridclk: tegra: Update DFLL tunning implementation
2017-03-17 Alex Fridclk: tegra: Re-design DFLL PWM voltage control
2017-03-09 Alex Fridclk: tegra: Fix DFLL force voltage calculations
2017-03-08 Chun Xuclk: tegra-cec: set pclk default refcount to 1
2017-03-03 Alex Fridclk: tegra: Round down shared bus caps
2017-03-03 Alex Fridclk: tegra: Round up SCLK divider
2017-03-02 Alex Fridclk: soc: tegra: Add aclk DVFS tables
2017-03-02 Alex Fridclk: soc: tegra: Fix cbus round rate when no dvfs
2017-03-02 Alex Fridclk: tegra: Fix super-clock operations
2017-03-02 Alex Fridclk: tegra: Clean T210 clock table
2017-03-02 Alex Fridclk: tegra: Update shared users clock attributes
2017-03-02 Laxman Dewanganclk: max77686: Add support for MAX77620 clocks
2017-03-02 Laxman Dewanganclk: max77686: Combine Maxim max77686 and max77802...
2017-03-02 Stephen Boydclk: max77{686,802}: Remove CLK_IS_ROOT
2017-02-22 Venkat Reddy Tallaclk: include fs header file in clk driver
2017-02-21 Alex Fridclk: tegra: Add T210 UCM2 DFLL thermal caps table
2017-02-21 Alex Fridclk: tegra: Protect recalculation of DFLL limits
2017-02-17 Stephen Boydclk: Return errors from clk providers in __of_clk_get_f...
2017-02-17 Stephen Boydclk: Add clk_hw OF clk providers
2017-02-17 Alex Fridclk: tegra: Propagate clk_out_x rate to parent
2017-02-15 Alex Fridclk: soc: tegra: Fix GPU thermal DVFS corner cases
2017-02-15 Alex Fridclk: Expand scope of CLK_SET_RATE_NOCACHE
2017-02-14 Alex Fridclk: tegra: Fix DFLL thermal floor profile
2017-02-14 Frank Chenclk: tegra: remove duplicate con_id for ISPB
2017-02-14 Shawn Jooclk: fix build error when CONFIG_DEBUG_FS is unset
2017-02-10 Peter De Schrijverclk: tegra: pll round shouldn't exceed DVS round
2017-02-10 Peter De Schrijverclk: fix debugfs warnings
2017-02-10 Peter De Schrijverclk: aggregate return codes of notify chains
2017-02-10 Peter De Schrijverclk: tegra: cleanup use of flags for shared clocks
2017-02-10 Peter De Schrijverclk: tegra: set TEGRA_SHARED_BUS_RETENTION flags
2017-02-10 Peter De Schrijverclk: tegra: prepared ops for no gate periph clks
2017-02-10 Peter De Schrijverclk: tegra: prepare/unprepare for shared connect clks
2017-02-10 Peter De Schrijverclk: tegra: use SHARED_LIMIT
2017-02-10 Ajay Nandakumarclk: tegra: correct Tegra210 special reset count
2017-02-09 Alex Fridclk: tegra: Fix transitions to/from DFLL
2017-02-09 Alex Fridclk: Add parent change notifications
2017-02-08 Joseph Loclk: tegra: initialize PLL_D2 to a sane rate on Tegra210
2017-02-08 Alex Fridclk: tegra: Add BWMGR shared EMC user
2017-02-07 Alex Fridclk: tegra: Set CLK_SET_RATE_NOCACHE flag
2017-02-07 Alex Fridclk: Allow provider to force set rate nocache
2017-02-07 Alex Fridclk: tegra: Clean get parent interface error check
2017-02-01 Alex Fridclk: tegra: Re-factor shared bus debugfs nodes
2017-02-01 Alex Fridclk: tegra: Add gbus round_pass_thru control
2017-02-01 Alex Fridclk: tegra: Update gbus functionality
2017-01-31 Peter De Schrijverclk: tegra: correct Tegra210 ADSP reset
2017-01-31 Peter De Schrijverclk: tegra: honor TEGRA_SHARED_BUS_RETENTION flag
2017-01-31 Srikar Srimath Tir... clk: tegra: add clkdev for gm20b.gbus
2017-01-31 Srikar Srimath Tir... clk: tegra: apply DVFS constraints on gbus
2017-01-31 Srikar Srimath Tir... clk: tegra: fix gm20b.gbus user mode
2017-01-31 Srikar Srimath Tir... clk: tegra: add ops for gbus
2017-01-27 Alex Fridclk: tegra: Fix system bus initialization
2017-01-27 Alex Fridclk: tegra: Update EMC shared master maximum rate
2017-01-27 Alex Fridclk: tegra: Restore cbus maximum rate
2017-01-27 Alex Fridclk: tegra: Fix possible rate output for abus
2017-01-27 Alex Fridclk: Add requested rate to clock dump output
2017-01-26 Alex Fridclk: tegra: Add shared bus possible rates
2017-01-26 Alex Fridclk: tegra: Fix VCO min calculations
2017-01-26 Alex Fridclk: tegra: Swap CBUS DVFS and PLL rounding
2017-01-25 Peter De Schrijverclk: tegra: add pto_cycles debugfs file
2017-01-25 Peter De Schrijverclk: tegra: add profiles dfll debugfs file
2017-01-25 Peter De Schrijverclk: tegra: add DFLL flags debugfs file
2017-01-25 Peter De Schrijverclk: tegra: add DFLL Vmin calibration
2017-01-25 Peter De Schrijverclk: tegra: change dfll locking to spinlocks
2017-01-25 Peter De Schrijverclk: tegra: add tune_high_mv dfll debugfs file
2017-01-24 Peter De Schrijverclk: tegra: add ADSP and ADSP NEON clks
2017-01-24 BH Hsiehuphy: don't update pll reg after enabling PLL HW
2017-01-24 BH Hsiehpinctrl:uphy: separate PLLE HW control
2017-01-23 Alex Fridclk: tegra: Fix shared bus operations for bridges
2017-01-23 Alex Fridclk: tegra: Return actual rate from shared users
2017-01-23 Alex Fridclk: tegra: Add subtree change notifications
2017-01-23 Alex Fridclk: Add requested rate to clock summary output
2017-01-23 Jon Hunterclk: tegra: Fix compilation when dvfs is not enabled
2017-01-21 Shardar Shariff Mdclk: tegra: include seq_file.h
2017-01-20 Alex Fridclk: tegra: Fix system bus request propagation
2017-01-20 Alex Fridclk: tegra: Fix and optimize system bus set rate
2017-01-20 Alex Fridclk: tegra: Re-design skipper operations
2017-01-20 Alex Fridclk: tegra: Update system bus min/max rates
2017-01-20 Alex Fridclk: tegra: Fix system bus round table build
2017-01-20 Alex Fridclk: tegra: Remove clk_cascade_master_set_rate
2017-01-20 Alex Fridclk: tegra: Fix fractional divider round operation
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