TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4 is corrected to 0x0
(as per latest POR)
Bug
200134942
Bug
200078772
Change-Id: I628c2d3e18615df476b67761553762a23f1fe47e
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
(cherry picked from commit
eb36521b1c8d91a7760f684d43e65101762d8655)
Reviewed-on: http://git-master/r/802835
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
GVS: Gerrit_Virtual_Submit
}
regcache_cache_only(dmic->regmap, true);
+ /* Below patch is as per latest POR value */
+ regmap_write(dmic->regmap,
+ TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4, 0x00000000);
+
if (of_property_read_u32(np, "nvidia,ahub-dmic-id",
&pdev->dev.id) < 0) {
dev_err(&pdev->dev,