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platform: tegra: mc: T210 LA update
authorKen Chang <kenc@nvidia.com>
Fri, 17 Apr 2015 08:42:26 +0000 (16:42 +0800)
committerIshan Mittal <imittal@nvidia.com>
Mon, 18 May 2015 06:02:49 +0000 (11:32 +0530)
PCX(PCIe) MCCIF buffer size was calculated based on 400MHz emcclk
thus la_ref_clk_mhz shall be set to 400. Otherwise, it will lead
to a larger value of LA and degrade the performance.

Bug 200096223

Change-Id: Ic9c23ad1556583b884600ee4b1505e8b1b4d887b
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/732659
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
drivers/platform/tegra/mc/tegra21x_la.c patch | blob | history

diff --git a/drivers/platform/tegra/mc/tegra21x_la.c b/drivers/platform/tegra/mc/tegra21x_la.c
index 46e34ee815c4384fa78b90365a4d03bee130b4a4..d5a9d0c1d23f554d6edd11b6d9fdd8a70b26fec8 100644 (file)
--- a/drivers/platform/tegra/mc/tegra21x_la.c
+++ b/drivers/platform/tegra/mc/tegra21x_la.c
@@ -48,7 +48,7 @@
 
 static struct la_client_info t21x_la_info_array[] = {
        LA(0, 0, AFI_0,         23 : 16, AFIW,          false, 128, 800),
-       LA(0, 0, AFI_0,         7  : 0,  AFIR,          false, 59,  800),
+       LA(0, 0, AFI_0,         7  : 0,  AFIR,          false, 59,  400),
        LA(0, 0, AVPC_0,        7  : 0,  AVPC_ARM7R,    false, 4,   0),
        LA(0, 0, AVPC_0,        23 : 16, AVPC_ARM7W,    false, 128, 800),
        LA(0, 0, DC_0,          7  : 0,  DISPLAY_0A,    true,  80,  0),