clk: tegra: only build PLL resume for Tegra210

Change-Id: I40a5c16378f28047345e5ca7a1ada03d6feb9c66
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/1267684
GVS: Gerrit_Virtual_Submit
Reviewed-by: Timo Alho <talho@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index f0c5aac402e66b191e99896cdfc2d34bcd787856..04eb83329cf5206ee03e446be9f946f7a9eb63fb 100644 (file)
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -2537,7 +2537,7 @@ static void clk_pll_iddq_disable(struct clk_hw *hw)
                spin_unlock_irqrestore(pll->lock, flags);
 }
 
-#ifdef CONFIG_PM_SLEEP
+#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARCH_TEGRA_210_SOC)
 void tegra_clk_pll_resume(struct clk *c, unsigned long rate)
 {
        struct clk *parent = clk_get_parent(c);