clk: tegra: Move DFLL thermal boundaries defines

DFLL thermal boundaries are just placeholders that are never set as
trip-points in thermal zone. Boundaries values are irrelevant as long
as they are below/above all others, actually set trip-points. They can
be set low/high enough to be applied for each SoC, and they are not
needed for thermal DT nodes. Therefore moved boundaries definitions
from per-SoC DT bindings headers to common DFLL header.

Bug 1993768
Bug 1990253

Change-Id: I5c5244e687564eb900bd70b39e13cca6f06f5caa
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1570427
(cherry picked from commit 345415f2e72d0f488d3e6da06d42a59448c62a5c)
Reviewed-on: https://git-master.nvidia.com/r/1572666
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
(cherry picked from commit fac4f0873214ebe91e81c64f513e1e0e8b0d78c9)

diff --git a/drivers/clk/tegra/clk-dfll.c b/drivers/clk/tegra/clk-dfll.c
index f3545ace15ae5f9e9360151aeb4d21b16b9eb8ab..73215f847e9f038cba479b2c27737bf7d8791457 100644 (file)
--- a/drivers/clk/tegra/clk-dfll.c
+++ b/drivers/clk/tegra/clk-dfll.c
@@ -37,7 +37,6 @@
  *
  */
 
-#include <dt-bindings/thermal/tegra210-dfll-trips.h>
 #include <linux/clk.h>
 #include <linux/clk-provider.h>
 #include <linux/clkdev.h>
@@ -3741,7 +3740,7 @@ static int profiles_show(struct seq_file *s, void *data)
        seq_printf(s, "THERM CAPS:%s\n", size ? "" : " NONE");
        for (i = 0; i < size; i++) {
                tv = td->soc->thermal_cap_table[i];
-               if (tv.temp == TEGRA210_DFLL_THERMAL_CAP_NOCAP / 1000)
+               if (tv.temp == DFLL_THERMAL_CAP_NOCAP / 1000)
                        continue;
                v = find_mv_out_floor(td, tv.millivolts);
                seq_printf(s, "%3dC.. %5dmV\n",

diff --git a/drivers/clk/tegra/clk-dfll.h b/drivers/clk/tegra/clk-dfll.h
index b193fb57cee0a9257b31b07a4118b248624a7611..2f76e11ec2e967f914bd47f1a0844c2990751a82 100644 (file)
--- a/drivers/clk/tegra/clk-dfll.h
+++ b/drivers/clk/tegra/clk-dfll.h
@@ -63,6 +63,14 @@ struct tegra_dfll_soc_data {
        const char *cvb_version;
 };
 
+
+/*
+ * These thermal boundaries are not set in thermal zone as trip-points, but
+ * must be below/above all other actually set DFLL thermal trip-points.
+ */
+#define DFLL_THERMAL_CAP_NOCAP         0
+#define DFLL_THERMAL_FLOOR_NOFLOOR     125000
+
 int tegra_dfll_register(struct platform_device *pdev,
                        struct tegra_dfll_soc_data *soc);
 int tegra_dfll_unregister(struct platform_device *pdev);

diff --git a/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c b/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c
index 65236b49e642eaf2a110cc8edf68b27410aee52e..168e916170232040f1b51b578482bd0e9714fa55 100644 (file)
--- a/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c
+++ b/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c
@@ -646,17 +646,17 @@ struct cvb_table tegra210b01_cpu_cvb_tables[] = {
 
 static struct thermal_tv tegra210_thermal_floor_table[] = {
        {TEGRA210_DFLL_THERMAL_FLOOR_0 / 1000, 950},
-       {TEGRA210_DFLL_THERMAL_FLOOR_4 / 1000,   0},
+       {DFLL_THERMAL_FLOOR_NOFLOOR / 1000,    0},
 };
 
 static const struct thermal_tv tegra210_thermal_cap_table[] = {
-       {TEGRA210_DFLL_THERMAL_CAP_NOCAP / 1000, INT_MAX},
+       {DFLL_THERMAL_CAP_NOCAP / 1000,      INT_MAX},
        {TEGRA210_DFLL_THERMAL_CAP_0 / 1000, 1170},
        {TEGRA210_DFLL_THERMAL_CAP_1 / 1000, 1132},
 };
 
 static const struct thermal_tv tegra210_thermal_cap_ucm2_table[] = {
-       {TEGRA210_DFLL_THERMAL_CAP_NOCAP / 1000, INT_MAX},
+       {DFLL_THERMAL_CAP_NOCAP / 1000,      INT_MAX},
        {TEGRA210_DFLL_THERMAL_CAP_0 / 1000, 1162},
        {TEGRA210_DFLL_THERMAL_CAP_1 / 1000, 1090},
 };
@@ -676,11 +676,11 @@ static const struct thermal_table tegra210_cpu_thermal_table = {
 
 static struct thermal_tv tegra210b01_thermal_floor_table[] = {
        {TEGRA210B01_DFLL_THERMAL_FLOOR_0 / 1000, 800},
-       {TEGRA210B01_DFLL_THERMAL_FLOOR_NOFLOOR / 1000,   0},
+       {DFLL_THERMAL_FLOOR_NOFLOOR / 1000,       0},
 };
 
 static const struct thermal_tv tegra210b01_thermal_cap_table[] = {
-       {TEGRA210B01_DFLL_THERMAL_CAP_NOCAP / 1000, INT_MAX},
+       {DFLL_THERMAL_CAP_NOCAP / 1000,         INT_MAX},
        {TEGRA210B01_DFLL_THERMAL_CAP_0 / 1000, 1060},
        {TEGRA210B01_DFLL_THERMAL_CAP_1 / 1000, 1010},
 };

diff --git a/include/dt-bindings/thermal/tegra210-dfll-trips.h b/include/dt-bindings/thermal/tegra210-dfll-trips.h
index bb396644452589e2e30809f389c152b8993ff296..2ea0204ac46f228b047aa477deae5ede9648f81e 100644 (file)
--- a/include/dt-bindings/thermal/tegra210-dfll-trips.h
+++ b/include/dt-bindings/thermal/tegra210-dfll-trips.h
@@ -10,7 +10,6 @@
 #define TEGRA210_DFLL_THERMAL_FLOOR_3  70000
 #define TEGRA210_DFLL_THERMAL_FLOOR_4  120000
 
-#define TEGRA210_DFLL_THERMAL_CAP_NOCAP        0
 #define TEGRA210_DFLL_THERMAL_CAP_0    66000
 #define TEGRA210_DFLL_THERMAL_CAP_1    86000
 

diff --git a/include/dt-bindings/thermal/tegra210-trips.h b/include/dt-bindings/thermal/tegra210-trips.h
index 5cb6827e4be3b0b23883f54f01253981499c606d..7c269ec68ee5fc5ba88c3d6f06970b1505b748a5 100644 (file)
--- a/include/dt-bindings/thermal/tegra210-trips.h
+++ b/include/dt-bindings/thermal/tegra210-trips.h
@@ -11,7 +11,6 @@
 #define TEGRA210_DFLL_THERMAL_FLOOR_3  70000
 #define TEGRA210_DFLL_THERMAL_FLOOR_4  120000
 
-#define TEGRA210_DFLL_THERMAL_CAP_NOCAP        0
 #define TEGRA210_DFLL_THERMAL_CAP_0    66000
 #define TEGRA210_DFLL_THERMAL_CAP_1    86000
 

diff --git a/include/dt-bindings/thermal/tegra210b01-trips.h b/include/dt-bindings/thermal/tegra210b01-trips.h
index b826b29c620456f8cfff031b188c6cfc1f24669e..dbb7badb846ae07e2104c3632d8f9d49ab10dbbe 100644 (file)
--- a/include/dt-bindings/thermal/tegra210b01-trips.h
+++ b/include/dt-bindings/thermal/tegra210b01-trips.h
@@ -6,9 +6,7 @@
 
 /* DFLL trips, in millicelsius */
 #define TEGRA210B01_DFLL_THERMAL_FLOOR_0       20000
-#define TEGRA210B01_DFLL_THERMAL_FLOOR_NOFLOOR 120000
 
-#define TEGRA210B01_DFLL_THERMAL_CAP_NOCAP     0
 #define TEGRA210B01_DFLL_THERMAL_CAP_0         66000
 #define TEGRA210B01_DFLL_THERMAL_CAP_1         86000