pinctrl: tegra: Add support to configure pin on GPIO mode.

On T186, gpio/sfio mode of pin is configured through pinctrl
register. Add support to configure the pin in gpio mode if
pin is requested as gpio.

Change-Id: I069c2205d0905eafaa1e9410a8a8df581275f572
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/717342
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index addf76272e9d8e31ed27c155f1d0de66430c8661..56033bc1713e6632a7c1215324598ad12aa38dcf 100644 (file)
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -944,4 +944,5 @@ config GPIO_TMPM32X
          Toshiba MCU. There is only UART channel as a communication
          interface between Tegra and MCU chip.
 
++trysource "../kernel-t18x/drivers/gpio/Kconfig"
 endif

diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c
index 7f046b249eb951a7d6dec8d5da699e3d0f615e89..3dcf6095e01fba5226e69e4e23a1b40c9db7c500 100644 (file)
--- a/drivers/pinctrl/pinctrl-tegra.c
+++ b/drivers/pinctrl/pinctrl-tegra.c
@@ -495,6 +495,10 @@ static int tegra_pinctrl_gpio_set_direction (struct pinctrl_dev *pctldev,
        else
                ret = tegra_pinconfig_group_set(pctldev, group,
                                        TEGRA_PINCONF_PARAM_TRISTATE, 0);
+
+       if (pmx->soc->is_gpio_reg_support)
+               ret = tegra_pinconfig_group_set(pctldev, group,
+                                       TEGRA_PINCONF_PARAM_GPIO_MODE, 0);
        return ret;
 }
 
@@ -511,7 +515,7 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
                             const struct tegra_pingroup *g,
                             enum tegra_pinconf_param param,
                             bool report_err,
-                            s8 *bank, s16 *reg, s8 *bit, s8 *width)
+                            s8 *bank, s32 *reg, s8 *bit, s8 *width)
 {
        switch (param) {
        case TEGRA_PINCONF_PARAM_PULL:
@@ -620,6 +624,12 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
                *bit = g->drvtype_bit;
                *width = g->drvtype_width;
                break;
+       case TEGRA_PINCONF_PARAM_GPIO_MODE:
+               *bank = g->gpio_bank;
+               *reg = g->gpio_reg;
+               *bit = g->gpio_bit;
+               *width = 1;
+               break;
        default:
                dev_err(pmx->dev, "Invalid config param %04x\n", param);
                return -ENOTSUPP;
@@ -660,7 +670,7 @@ static int tegra_pinconf_group_get(struct pinctrl_dev *pctldev,
        const struct tegra_pingroup *g;
        int ret;
        s8 bank, bit, width;
-       s16 reg;
+       s32 reg;
        u32 val, mask;
        unsigned long flags;
 
@@ -695,7 +705,7 @@ static int tegra_pinconf_group_set(struct pinctrl_dev *pctldev,
        const struct tegra_pingroup *g;
        int ret = 0, i;
        s8 bank, bit, width;
-       s16 reg;
+       s32 reg;
        u32 val, mask;
        unsigned long flags;
 
@@ -782,7 +792,7 @@ static void tegra_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
        const struct tegra_pingroup *g;
        int i, ret;
        s8 bank, bit, width;
-       s16 reg;
+       s32 reg;
        u32 val;
        int function;
        const char *name;

diff --git a/drivers/pinctrl/pinctrl-tegra.h b/drivers/pinctrl/pinctrl-tegra.h
index 44528608eb791e37b08941a0f614ff4824704b78..f8ca219a568985ebc2220886fc73ed519dc4218a 100644 (file)
--- a/drivers/pinctrl/pinctrl-tegra.h
+++ b/drivers/pinctrl/pinctrl-tegra.h
@@ -94,20 +94,21 @@ struct tegra_pingroup {
        const unsigned *pins;
        unsigned npins;
        unsigned funcs[4];
-       s16 mux_reg;
-       s16 pupd_reg;
-       s16 tri_reg;
-       s16 einput_reg;
-       s16 odrain_reg;
-       s16 lock_reg;
-       s16 parked_reg;
-       s16 ioreset_reg;
-       s16 rcv_sel_reg;
-       s16 e_io_hv_reg;
-       s16 hsm_reg;
-       s16 schmitt_reg;
-       s16 drv_reg;
-       s16 drvtype_reg;
+       s32 mux_reg;
+       s32 pupd_reg;
+       s32 tri_reg;
+       s32 einput_reg;
+       s32 odrain_reg;
+       s32 lock_reg;
+       s32 parked_reg;
+       s32 ioreset_reg;
+       s32 rcv_sel_reg;
+       s32 e_io_hv_reg;
+       s32 hsm_reg;
+       s32 schmitt_reg;
+       s32 drv_reg;
+       s32 drvtype_reg;
+       s32 gpio_reg;
        int mux_bank;
        int pupd_bank;
        int tri_bank;
@@ -120,6 +121,7 @@ struct tegra_pingroup {
        int parked_bank;
        int drv_bank;
        int drvtype_bank;
+       int gpio_bank;
        int mux_bit;
        int pupd_bit;
        int tri_bit;
@@ -137,12 +139,14 @@ struct tegra_pingroup {
        int drvup_bit;
        int slwr_bit;
        int slwf_bit;
+       int gpio_bit;
        int drvtype_bit;
        int drvdn_width;
        int drvup_width;
        int slwr_width;
        int slwf_width;
        int drvtype_width;
+       int gpio_width;
 };
 
 /**
@@ -157,6 +161,7 @@ struct tegra_pingroup {
  * @nfunctions:        The numbmer of entries in @functions.
  * @groups:    An array describing all pin groups the pin SoC supports.
  * @ngroups:   The numbmer of entries in @groups.
+ * @is_gpio_reg_support: GPIO/SFIO selection support in pinmux register.
  * @config_data: List of configuration data which is SoC specific.
  * @nconfig_data: Number of config data.
  */
@@ -168,6 +173,7 @@ struct tegra_pinctrl_soc_data {
        unsigned nfunctions;
        const struct tegra_pingroup *groups;
        unsigned ngroups;
+       bool is_gpio_reg_support;
        int (*suspend)(u32 *pg_data);
        void (*resume)(u32 *pg_data);
        int (*gpio_request_enable)(unsigned pin);

diff --git a/include/linux/pinctrl/pinconf-tegra.h b/include/linux/pinctrl/pinconf-tegra.h
index 0432b0b83518312764a5f9b04c4aa12c1f594461..e9715d62e65a574001dd0fbec40bd329d500e6da 100644 (file)
--- a/include/linux/pinctrl/pinconf-tegra.h
+++ b/include/linux/pinctrl/pinconf-tegra.h
@@ -49,6 +49,8 @@ enum tegra_pinconf_param {
        TEGRA_PINCONF_PARAM_SLEW_RATE_RISING,
        /* argument: Integer, range is HW-dependant */
        TEGRA_PINCONF_PARAM_DRIVE_TYPE,
+       /* Set pin to GPIO mode */
+       TEGRA_PINCONF_PARAM_GPIO_MODE,
 };
 
 /*