clock: tegra21: delete pll_m_out1

pll_m_out1 is gone in t210. delete it so to not trigger decode
error in ASIM.

it's unclear what clock can be used as sclk_high, so keep it
the same as sclk_low for the time being.

Change-Id: I879e898e7b4e5be172d06f73c289cf5c0da19b65
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/338467
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

diff --git a/arch/arm64/mach-tegra/tegra21_init.c b/arch/arm64/mach-tegra/tegra21_init.c
index e8e8894468f0f680605e3b13a5b1aa279d27e652..ebd30253e1120438ba6e27f14377e3a0f1e0f689 100644 (file)
--- a/arch/arm64/mach-tegra/tegra21_init.c
+++ b/arch/arm64/mach-tegra/tegra21_init.c
@@ -45,8 +45,6 @@ static __initdata struct tegra_clk_init_table tegra21x_clk_init_table[] = {
                TEGRA_CLK_INIT_PLATFORM_SI },
        { "pll_p_out3", "pll_p",        0,              true,
                TEGRA_CLK_INIT_PLATFORM_SI },
-       { "pll_m_out1", "pll_m",        275000000,      false,
-               TEGRA_CLK_INIT_PLATFORM_SI },
        { "pll_p_out2", "pll_p",        102000000,      false,
                TEGRA_CLK_INIT_PLATFORM_SI },
        { "sclk",       "pll_p_out2",   102000000,      true,
@@ -70,8 +68,6 @@ static __initdata struct tegra_clk_init_table tegra21x_clk_init_table[] = {
        { "pll_p_out5", "pll_p",        102000000,      true,
                TEGRA_CLK_INIT_PLATFORM_SI },
 #ifdef CONFIG_TEGRA_PRE_SILICON_SUPPORT
-       { "pll_m_out1", "pll_m",        275000000,      true,
-               TEGRA_CLK_INIT_PLATFORM_NON_SI },
        { "pll_p_out2", "pll_p",        108000000,      false,
                TEGRA_CLK_INIT_PLATFORM_NON_SI },
        { "sclk",       "pll_p_out2",   108000000,      true,