crypto: tegra-se: Enable RO entropy source for DRBG

Bug 1194672 , Bug 1213276

Change-Id: I2a1d033b5da8782b802f9dbac0461a596942b968
Signed-off-by: Shravani Dingari <shravanid@nvidia.com>
Reviewed-on: http://git-master/r/204402
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

diff --git a/drivers/crypto/tegra-se.c b/drivers/crypto/tegra-se.c
index f7b361798ae7376877a82472016d1968ed7fa3b7..d56f047a6ec96a99b9eb45806959cda8ee9db840 100644 (file)
--- a/drivers/crypto/tegra-se.c
+++ b/drivers/crypto/tegra-se.c
@@ -4,7 +4,7 @@
  *
  * Support for Tegra Security Engine hardware crypto algorithms.
  *
- * Copyright (c) 2011-2012, NVIDIA Corporation. All Rights Reserved.
+ * Copyright (c) 2011-2013, NVIDIA Corporation. All Rights Reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -199,6 +199,7 @@ static struct workqueue_struct *se_work_q;
 #define PMC_SCRATCH43_REG_OFFSET 0x22c
 #define GET_MSB(x)  ((x) >> (8*sizeof(x)-1))
 static int force_reseed_count;
+static int drbg_ro_entropy_src_enabled;
 static void tegra_se_leftshift_onebit(u8 *in_buf, u32 size, u8 *org_msb)
 {
        u8 carry;
@@ -1322,6 +1323,23 @@ static int tegra_se_rng_drbg_init(struct crypto_tfm *tfm)
                return -ENOMEM;
        }
 
+       /* take access to the hw */
+       mutex_lock(&se_hw_lock);
+       pm_runtime_get_sync(se_dev->dev);
+
+       if (!drbg_ro_entropy_src_enabled
+               && (tegra_get_chipid() != TEGRA_CHIPID_TEGRA3)
+               && (tegra_get_chipid() != TEGRA_CHIPID_TEGRA11)) {
+               se_writel(se_dev,
+                       SE_RNG_SRC_CONFIG_RO_ENT_SRC(DRBG_RO_ENT_SRC_ENABLE)
+               |SE_RNG_SRC_CONFIG_RO_ENT_SRC_LOCK(DRBG_RO_ENT_SRC_LOCK_ENABLE),
+                       SE_RNG_SRC_CONFIG_REG_OFFSET);
+               drbg_ro_entropy_src_enabled = 1;
+       }
+
+       pm_runtime_put(se_dev->dev);
+       mutex_unlock(&se_hw_lock);
+
        return 0;
 }
 
@@ -2731,6 +2749,16 @@ static int tegra_se_remove(struct platform_device *pdev)
 #if defined(CONFIG_PM)
 static int tegra_se_resume(struct device *dev)
 {
+       struct tegra_se_dev *se_dev = sg_tegra_se_dev;
+       if ((tegra_get_chipid() != TEGRA_CHIPID_TEGRA3)
+               && (tegra_get_chipid() != TEGRA_CHIPID_TEGRA11)) {
+               se_writel(se_dev,
+                       SE_RNG_SRC_CONFIG_RO_ENT_SRC(DRBG_RO_ENT_SRC_ENABLE)
+               |SE_RNG_SRC_CONFIG_RO_ENT_SRC_LOCK(DRBG_RO_ENT_SRC_LOCK_ENABLE),
+                       SE_RNG_SRC_CONFIG_REG_OFFSET);
+               drbg_ro_entropy_src_enabled = 1;
+       }
+
        return 0;
 }
 

diff --git a/drivers/crypto/tegra-se.h b/drivers/crypto/tegra-se.h
index 88df933b4b6a8984a9f1e2bf5c704b2a4ba224ce..b2245120eeae7c6ce57e23847573e72e219a4d5b 100644 (file)
--- a/drivers/crypto/tegra-se.h
+++ b/drivers/crypto/tegra-se.h
@@ -1,7 +1,7 @@
 /*
  * Driver for Tegra Security Engine
  *
- * Copyright (c) 2011, NVIDIA Corporation.
+ * Copyright (c) 2011-2013, NVIDIA Corporation.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -74,6 +74,16 @@
 #define DRBG_MODE_FORCE_RESEED         2
 #define SE_RNG_CONFIG_MODE(x)          (x << DRBG_MODE_SHIFT)
 
+#define SE_RNG_SRC_CONFIG_REG_OFFSET   0x344
+#define DRBG_RO_ENT_SRC_SHIFT  1
+#define DRBG_RO_ENT_SRC_ENABLE 1
+#define DRBG_RO_ENT_SRC_DISABLE        0
+#define SE_RNG_SRC_CONFIG_RO_ENT_SRC(x)        (x << DRBG_RO_ENT_SRC_SHIFT)
+#define DRBG_RO_ENT_SRC_LOCK_SHIFT     0
+#define DRBG_RO_ENT_SRC_LOCK_ENABLE    1
+#define DRBG_RO_ENT_SRC_LOCK_DISABLE   0
+#define SE_RNG_SRC_CONFIG_RO_ENT_SRC_LOCK(x) (x << DRBG_RO_ENT_SRC_LOCK_SHIFT)
+
 #define DRBG_SRC_SHIFT 2
 #define DRBG_SRC_NONE  0
 #define DRBG_SRC_ENTROPY       1