clk: tegra: move CVB calculations to soc/tegra

The CVB calculations are related to DVFS and will be used by the Tegra210
DVFS code, so it makes more sense to move the functions to soc/tegra and
export them for use by the DFLL code.

Change-Id: Ib3b1b256e911baf76edddb0d90d47facaecb1d3a
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/1258030
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

diff --git a/drivers/clk/tegra/Makefile b/drivers/clk/tegra/Makefile
index 7c31a934be905d0ffdda3fc052ae886d7281a4c2..4fa2ba3492b098be8a92471a2c8eb82b1e1730b3 100644 (file)
--- a/drivers/clk/tegra/Makefile
+++ b/drivers/clk/tegra/Makefile
@@ -23,7 +23,6 @@ obj-$(CONFIG_ARCH_TEGRA_114_SOC)      += clk-tegra114.o
 obj-$(CONFIG_ARCH_TEGRA_124_SOC)       += clk-tegra124.o
 obj-$(CONFIG_TEGRA_CLK_DFLL)           += clk-tegra124-dfll-fcpu.o
 obj-$(CONFIG_ARCH_TEGRA_132_SOC)       += clk-tegra124.o
-obj-y                                  += cvb.o
 obj-$(CONFIG_ARCH_TEGRA_210_SOC)       += clk-tegra210.o
 obj-$(CONFIG_ARCH_TEGRA_210_SOC)       += clk-emc-t210.o
 obj-y                                  += clk-cbus-shared.o

diff --git a/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c b/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c
index 6b3316c26dab20b32aa8502b89605055bfc26ae1..965c366c46152c494e51fafced135e16d5038ac3 100644 (file)
--- a/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c
+++ b/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c
@@ -23,11 +23,11 @@
 #include <linux/module.h>
 #include <linux/of_device.h>
 #include <linux/platform_device.h>
+#include <soc/tegra/cvb.h>
 #include <soc/tegra/fuse.h>
 
 #include "clk.h"
 #include "clk-dfll.h"
-#include "cvb.h"
 
 struct dfll_fcpu_data {
        const unsigned long *cpu_max_freq_table;

diff --git a/drivers/soc/tegra/Makefile b/drivers/soc/tegra/Makefile
index d70912dddbbeae7aab1419037ba613e60fa2f633..ac9e7478a06f218c63d0f991f00d0518f41bf68c 100644 (file)
--- a/drivers/soc/tegra/Makefile
+++ b/drivers/soc/tegra/Makefile
@@ -5,6 +5,6 @@ obj-y += flowctrl.o
 obj-y += pmc.o
 
 obj-$(CONFIG_ARCH_TEGRA_210_SOC)       += pm-tegra210.o
-obj-$(CONFIG_TEGRA_DVFS)       += tegra-dvfs.o
+obj-$(CONFIG_TEGRA_DVFS)       += tegra-dvfs.o cvb.o
 obj-$(CONFIG_TEGRA_210_DVFS)   += tegra210-dvfs.o
 

diff --git a/drivers/clk/tegra/cvb.c b/drivers/soc/tegra/cvb.c
similarity index 78%
rename from drivers/clk/tegra/cvb.c
rename to drivers/soc/tegra/cvb.c
index a3be16690bab4c97428fe67cadf31778ce3d76d0..75bd9b102e9aa1f29b014afcd0c6198c4c6812d2 100644 (file)
--- a/drivers/clk/tegra/cvb.c
+++ b/drivers/soc/tegra/cvb.c
@@ -16,12 +16,11 @@
 #include <linux/err.h>
 #include <linux/kernel.h>
 #include <linux/pm_opp.h>
-
-#include "cvb.h"
+#include <soc/tegra/cvb.h>
 
 /* cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) */
-static inline int get_cvb_voltage(int speedo, int s_scale,
-                                 const struct cvb_coefficients *cvb)
+int tegra_get_cvb_voltage(int speedo, int s_scale,
+                         const struct cvb_coefficients *cvb)
 {
        int mv;
 
@@ -31,8 +30,21 @@ static inline int get_cvb_voltage(int speedo, int s_scale,
        return mv;
 }
 
-static int round_cvb_voltage(int mv, int v_scale,
-                            const struct rail_alignment *align)
+/* cvb_t_mv =
+   ((c3 * speedo / s_scale + c4 + c5 * T / t_scale) * T / t_scale) / v_scale */
+int tegra_get_cvb_t_voltage(int speedo, int s_scale, int t, int t_scale,
+                           struct cvb_coefficients *cvb)
+{
+       /* apply speedo & temperature scales: output mv = cvb_t_mv * v_scale */
+       int mv;
+       mv = DIV_ROUND_CLOSEST(cvb->c3 * speedo, s_scale) + cvb->c4 +
+               DIV_ROUND_CLOSEST(cvb->c5 * t, t_scale);
+       mv = DIV_ROUND_CLOSEST(mv * t, t_scale);
+       return mv;
+}
+
+int tegra_round_cvb_voltage(int mv, int v_scale,
+                           const struct rail_alignment *align)
 {
        /* combined: apply voltage scale and round to cvb alignment step */
        int uv;
@@ -49,7 +61,7 @@ enum {
        UP
 };
 
-static int round_voltage(int mv, const struct rail_alignment *align, int up)
+int tegra_round_voltage(int mv, const struct rail_alignment *align, int up)
 {
        if (align->step_uv) {
                int uv;
@@ -70,17 +82,17 @@ static int build_opp_table(const struct cvb_table *d,
        int i, ret, dfll_mv, min_mv, max_mv;
        const struct cvb_table_freq_entry *table = NULL;
 
-       min_mv = round_voltage(d->min_millivolts, align, UP);
-       max_mv = round_voltage(d->max_millivolts, align, DOWN);
+       min_mv = tegra_round_voltage(d->min_millivolts, align, UP);
+       max_mv = tegra_round_voltage(d->max_millivolts, align, DOWN);
 
        for (i = 0; i < MAX_DVFS_FREQS; i++) {
                table = &d->cvb_table[i];
                if (!table->freq || (table->freq > max_freq))
                        break;
 
-               dfll_mv = get_cvb_voltage(
+               dfll_mv = tegra_get_cvb_voltage(
                        speedo_value, d->speedo_scale, &table->coefficients);
-               dfll_mv = round_cvb_voltage(dfll_mv, d->voltage_scale, align);
+               dfll_mv = tegra_round_cvb_voltage(dfll_mv, d->voltage_scale, align);
                dfll_mv = clamp(dfll_mv, min_mv, max_mv);
 
                ret = dev_pm_opp_add(opp_dev, table->freq, dfll_mv * 1000);

diff --git a/drivers/clk/tegra/cvb.h b/include/soc/tegra/cvb.h
similarity index 77%
rename from drivers/clk/tegra/cvb.h
rename to include/soc/tegra/cvb.h
index 4964c49652dbd07e034e276acbf28ac389c42f25..066ceea51def6a4b7da811dc36c3a70d301c1e73 100644 (file)
--- a/drivers/clk/tegra/cvb.h
+++ b/include/soc/tegra/cvb.h
@@ -30,6 +30,9 @@ struct cvb_coefficients {
        int c0;
        int c1;
        int c2;
+       int c3;
+       int c4;
+       int c5;
 };
 
 struct cvb_table_freq_entry {
@@ -66,4 +69,12 @@ const struct cvb_table *tegra_cvb_build_opp_table(
                unsigned long max_rate,
                struct device *opp_dev);
 
+int tegra_get_cvb_voltage(int speedo, int s_scale,
+                         const struct cvb_coefficients *cvb);
+int tegra_round_cvb_voltage(int mv, int v_scale,
+                           const struct rail_alignment *align);
+int tegra_round_voltage(int mv, const struct rail_alignment *align, int up);
+int tegra_get_cvb_t_voltage(int speedo, int s_scale, int t, int t_scale,
+                           struct cvb_coefficients *cvb);
+
 #endif