xhci-tegra: remove powergate WAR for T210 K44

remove powergate WAR for T210 K44 since
powergate driver is working after enabling
CONFIG_TEGRA_POWERGATE

bug 200085578
bug 200220197
bug 200220865
bug 200186949

Change-Id: I5b31a55b8da9bf70a323890a7d0b89a181603297
Signed-off-by: BH Hsieh <bhsieh@nvidia.com>
Reviewed-on: http://git-master/r/1217747
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-by: Jui Chang Kuo <jckuo@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
index eccda4ffba71186acc203fd61ae56be28cf6332e..fe2808c25989fda8bcf3b8256d33aefcd3318a8d 100644 (file)
--- a/drivers/usb/host/xhci-tegra.c
+++ b/drivers/usb/host/xhci-tegra.c
@@ -2065,8 +2065,7 @@ skip_clocks:
                        tegra->usb3_otg_port_base_1 - 1);
        } else
                dev_info(&pdev->dev, "No USB3 port has OTG_CAP\n");
-/* WAR for T210 on K44 since powergate driver is not yet ready */
-#ifndef CONFIG_ARCH_TEGRA_21x_SOC
+
        if (tegra_platform_is_silicon()) {
                ret = tegra_unpowergate_partition_with_clk_on(tegra->pgid_ss);
                if (ret) {
@@ -2080,7 +2079,7 @@ skip_clocks:
                        goto powergate_ss;
                }
        }
-#endif
+
        tegra_xhci_cfg(tegra);
 
        ret = tegra_xhci_phy_enable(tegra);