misc: tegra-fuse: Simplify HW access for chip id

ASIM address ranges now come from device tree, there is no need
to statically map resources in i/o table init. This also removes
the need to map APB misc. register address space in fuse driver
, because that address space is still mapped in i/o table init,
so the simple macro IO_ADDRESS can be used instead.

The obsolete t18x specific chip id access code is removed.

Change-Id: I538e80a85b03c562d6a5d930918e4ac45d001d03
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/721969
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peng Du <pdu@nvidia.com>
Reviewed-by: Hoang Pham <hopham@nvidia.com>

diff --git a/drivers/misc/tegra-fuse/tegra_fuse.c b/drivers/misc/tegra-fuse/tegra_fuse.c
index 1c3e67cd823d6b0d6696cd13615e2f78fb884767..8105c3cd3dd6a26d7e1925b5272ea469f70182b9 100644 (file)
--- a/drivers/misc/tegra-fuse/tegra_fuse.c
+++ b/drivers/misc/tegra-fuse/tegra_fuse.c
@@ -581,51 +581,8 @@ __weak void tegra_get_tegraid_from_hw(void)
        char prime;
 #endif
 
-#ifndef CONFIG_ARM64
        cid = tegra_read_chipid();
        nlist = tegra_read_apb_misc_reg(0x860);
-#elif defined(CONFIG_ARCH_TEGRA_13x_SOC) || defined(CONFIG_ARCH_TEGRA_21x_SOC)
-       void __iomem *chip_id;
-       void __iomem *netlist;
-
-       /*
-        * tegra_get_tegraid_from_hw can be called really early on when
-        * final kernel page tables haven't been set up. Thus, APB_MISC
-        * aperature must be mapped into kernel VA before tegra_id can
-        * be accessed here. Coincidentally, Tegra UART and ChipId reside
-        * in the same memory section (1MB), and UART has been mapped
-        * prior to this.
-        *
-        * On ARM, this is okay b/c Tegra code tells ARM what VA to map.
-        * However, ARM64 internally uses EARLYCON_IOBASE as base VA.
-        * To workaround this, we have to derive the base VA manually
-        * ad-hoc and modify the chip_id and netlist address accordingly
-        * for ARM64. Such handling is only needed until Tegra static
-        * mapping is done in mach-tegra/io.c.
-        */
-       void __iomem *early_base;
-       extern bool iotable_init_done;
-       if (!iotable_init_done) {
-               early_base = early_ioremap(TEGRA_APB_MISC_BASE, TEGRA_APB_MISC_SIZE);
-               BUG_ON(!early_base);
-               /* Map in APB_BASE in case earlyprintk is not enabled */
-               chip_id = early_base + 0x804;
-               netlist = early_base + 0x860;
-               cid = readl(chip_id);
-               nlist = readl(netlist);
-               early_iounmap(early_base, TEGRA_APB_MISC_SIZE);
-       } else {
-               cid = tegra_read_apb_misc_reg(0x804);
-               nlist = tegra_read_apb_misc_reg(0x860);
-       }
-#else
-       void __iomem *apb_misc = ioremap(
-               TEGRA_APB_MISC_BASE, TEGRA_APB_MISC_SIZE);
-       BUG_ON(!apb_misc);
-       cid = readl(apb_misc + 0x804);
-       nlist = readl(apb_misc + 0x860);
-       iounmap(apb_misc);
-#endif
 
 #if defined(CONFIG_ARCH_TEGRA_21x_SOC)
        tegra_fuse_cfg_reg_visible();

diff --git a/drivers/platform/tegra/io.c b/drivers/platform/tegra/io.c
index 9fc3ce81bd22400ec31e790d1fe215f3d43872ec..b8dafcde50bf9fb85fb3b1d3d571a03c0034ba73 100644 (file)
--- a/drivers/platform/tegra/io.c
+++ b/drivers/platform/tegra/io.c
@@ -7,7 +7,7 @@
  *     Colin Cross <ccross@google.com>
  *     Erik Gilling <konkers@google.com>
  *
- * Copyright (C) 2010-2014, NVIDIA Corporation. All rights reserved.
+ * Copyright (C) 2010-2015, NVIDIA Corporation. All rights reserved.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -37,8 +37,6 @@
 #define MT_DEVICE MT_DEVICE_nGnRE
 #endif
 
-bool iotable_init_done = false;
-
 static struct map_desc tegra_io_desc[] __initdata = {
        {
                .virtual = (unsigned long)IO_PPSB_VIRT,
@@ -120,29 +118,8 @@ static struct map_desc tegra_io_desc[] __initdata = {
 #endif
 };
 
-static struct map_desc tegra_io_desc_linsim[] __initdata = {
-       {
-               .virtual = (unsigned long)IO_SMC_VIRT,
-               .pfn = __phys_to_pfn(IO_SMC_PHYS),
-               .length = IO_SMC_SIZE,
-               .type = MT_DEVICE,
-       },
-       {
-               .virtual = (unsigned long)IO_SIM_ESCAPE_VIRT,
-               .pfn = __phys_to_pfn(IO_SIM_ESCAPE_PHYS),
-               .length = IO_SIM_ESCAPE_SIZE,
-               .type = MT_DEVICE,
-       },
-};
-
 void __init tegra_map_common_io(void)
 {
        debug_ll_io_init();
        iotable_init(tegra_io_desc, ARRAY_SIZE(tegra_io_desc));
-
-       if (tegra_platform_is_linsim())
-               iotable_init(tegra_io_desc_linsim,
-                       ARRAY_SIZE(tegra_io_desc_linsim));
-
-       iotable_init_done = true;
 }