};
sdhci@700b0600 {
+ vddio_sdmmc-supply = <&max77620_sd3>;
+ vddio_sd_slot-supply = <&vdd_3v3>;
uhs-mask = <0x60>;
built-in;
status = "okay";
sdhci@700b0400 {
uhs-mask = <0x1c>;
+ mmc-ocr-mask = <3>;
+ cd-gpios = <&gpio TEGRA_GPIO_PZ2 0>;
+ vddio_sdmmc-supply = <&max77620_ldo2>;
+ nvidia,update-pinctrl-settings;
+ pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable";
+ pinctrl-0 = <&sdmmc3_schmitt_enable_state>;
+ pinctrl-1 = <&sdmmc3_schmitt_disable_state>;
+ pinctrl-2 = <&sdmmc3_clk_schmitt_enable_state>;
+ pinctrl-3 = <&sdmmc3_clk_schmitt_disable_state>;
status = "disabled";
};
sdhci@700b0200 {
+ nvidia,is-ddr-tap-delay;
+ nvidia,ddr-tap-delay = <0>;
+ vddio_sdmmc-supply = <&max77620_sd3>;
+ vddio_sd_slot-supply = <&vdd_3v3>;
uhs-mask = <0x1C>;
bus-width = <4>;
status = "okay";
};
sdhci@700b0000 {
+ default-drive-type = <1>;
+ vddio_sdmmc-supply = <&max77620_ldo2>;
+ vddio_sd_slot-supply = <&en_vdd_sd>;
uhs-mask = <0x1c>;
+ nvidia,update-pinctrl-settings;
+ pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable";
+ pinctrl-0 = <&sdmmc1_schmitt_enable_state>;
+ pinctrl-1 = <&sdmmc1_schmitt_disable_state>;
+ pinctrl-2 = <&sdmmc1_clk_schmitt_enable_state>;
+ pinctrl-3 = <&sdmmc1_clk_schmitt_disable_state>;
status = "okay";
};
};
sdhci@700b0600 {
+ vddio_sdmmc-supply = <&max77620_sd3>;
+ vddio_sd_slot-supply = <&vdd_3v3>;
uhs-mask = <0x60>;
built-in;
power-off-rail;
vddio_sd_slot-supply = <&en_vdd_sd3>;
power-off-rail;
disable-clock-gate;
+ nvidia,update-pinctrl-settings;
+ pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable";
+ pinctrl-0 = <&sdmmc3_schmitt_enable_state>;
+ pinctrl-1 = <&sdmmc3_schmitt_disable_state>;
+ pinctrl-2 = <&sdmmc3_clk_schmitt_enable_state>;
+ pinctrl-3 = <&sdmmc3_clk_schmitt_disable_state>;
status = "disabled";
};
sdhci@700b0200 {
+ nvidia,is-ddr-tap-delay;
+ nvidia,ddr-tap-delay = <0>;
+ vddio_sdmmc-supply = <&max77620_sd3>;
+ vddio_sd_slot-supply = <&vdd_3v3>;
uhs-mask = <0x8>;
bus-width = <4>;
power-off-rail;
uhs-mask = <0x8>;
power-off-rail;
disable-clock-gate;
+ default-drive-type = <1>;
+ vddio_sdmmc-supply = <&max77620_ldo2>;
+ vddio_sd_slot-supply = <&en_vdd_sd>;
+ nvidia,update-pinctrl-settings;
+ pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable";
+ pinctrl-0 = <&sdmmc1_schmitt_enable_state>;
+ pinctrl-1 = <&sdmmc1_schmitt_disable_state>;
+ pinctrl-2 = <&sdmmc1_clk_schmitt_enable_state>;
+ pinctrl-3 = <&sdmmc1_clk_schmitt_disable_state>;
status = "okay";
};
#include "tegra210-platforms/tegra210-foster-e-pinmux-p2530-0930-e00.dtsi"
#include "tegra210-platforms/tegra210-loki-e-comms.dtsi"
#include "tegra210-platforms/tegra210-foster-e-pwm-fan.dtsi"
-#include "tegra210-platforms/tegra210-loki-sdhci.dtsi"
+#include "tegra210-platforms/tegra210-sdhci.dtsi"
#include "tegra210-platforms/tegra210-ers-hdmi-e2190-1100-a00.dtsi"
#include "tegra210-platforms/tegra210-foster-e-thermal-fan-est.dtsi"
#include "tegra210-platforms/tegra210-loki-e-keys-p2530-0032-e00.dtsi"
#include "tegra210-platforms/tegra210-jetson-e-pinmux-p2595-0000-a00.dtsi"
#include "tegra210-platforms/tegra210-comms-p2530-0930.dtsi"
#include "tegra210-platforms/tegra210-pwm-fan-p2530-0930.dtsi"
-#include "tegra210-platforms/tegra210-sdhci-p2530-0930.dtsi"
#include "panel-s-wqxga-10-1.dtsi"
#include "panel-a-wuxga-8-0.dtsi"
#include "tegra210-platforms/tegra210-ers-hdmi-e2190-1100-a00.dtsi"
#include "tegra210-platforms/tegra210-loki-e-sensor-p2530-0032-e00.dtsi"
+#include "tegra210-platforms/tegra210-sdhci.dtsi"
#include "tegra210-platforms/tegra210-thermal-fan-est-p2530-0930.dtsi"
#include "tegra210-platforms/tegra210-keys-p2530-0930.dtsi"
#include "tegra210-platforms/tegra210-powermon-p2530-0930.dtsi"
#include "tegra210-platforms/tegra210-loki-e-pinmux-p2530-0032-e00.dtsi"
#include "tegra210-platforms/tegra210-loki-e-comms.dtsi"
#include "tegra210-platforms/tegra210-loki-e-pwm-fan.dtsi"
-#include "tegra210-platforms/tegra210-loki-sdhci.dtsi"
+#include "tegra210-platforms/tegra210-sdhci.dtsi"
#include "tegra210-platforms/tegra210-ers-hdmi-e2190-1100-a00.dtsi"
#include "tegra210-platforms/tegra210-ers-touch-e1937-1000-a00.dtsi"
#include "tegra210-platforms/tegra210-loki-e-sensor-p2530-0032-e00.dtsi"
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
- */
-
-/ {
- sdhci@700b0600 { /* SDMMC4 for EMMC on loki */
- tap-delay = <4>;
- trim-delay = <8>;
- nvidia,is-ddr-tap-delay;
- nvidia,ddr-tap-delay = <0>;
- mmc-ocr-mask = <0>;
- dqs-trim-delay = <17>;
- max-clk-limit = <266000000>;
- bus-width = <8>;
- calib-3v3-offsets = <0x0505>;
- calib-1v8-offsets = <0x0505>;
- built-in;
- compad-vref-3v3 = <0x7>;
- compad-vref-1v8 = <0x7>;
- nvidia,en-io-trim-volt;
- nvidia,is-emmc;
- nvidia,enable-hs533-mode;
- pll_source = "pll_p", "pll_c4_out1";
- };
-
- sdhci@700b0400 { /* SDMMC3 for 2nd Wifi on loki */
- tap-delay = <1>; /* SDMMC3 no stuff for Full size SD on foster */
- trim-delay = <3>;
- mmc-ocr-mask = <0>;
- max-clk-limit = <204000000>;
- ddr-clk-limit = <48000000>;
- bus-width = <4>;
- calib-3v3-offsets = <0x007D>;
- calib-1v8-offsets = <0x7B7B>;
- compad-vref-3v3 = <0x1>;
- compad-vref-1v8 = <0x2>;
- default-drv-type = <1>;
- nvidia,update-pinctrl-settings;
- pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable";
- pinctrl-0 = <&sdmmc3_schmitt_enable_state>;
- pinctrl-1 = <&sdmmc3_schmitt_disable_state>;
- pinctrl-2 = <&sdmmc3_clk_schmitt_enable_state>;
- pinctrl-3 = <&sdmmc3_clk_schmitt_disable_state>;
- nvidia,en-io-trim-volt;
- nvidia,update-pinctrl-settings;
- nvidia,enable-ext-loopback;
- };
-
- sdhci@700b0200 { /* SDMMC2 for Wifi on loki */
- tap-delay = <4>;
- trim-delay = <8>;
- nvidia,is-ddr-tap-delay;
- nvidia,ddr-tap-delay = <0>;
- mmc-ocr-mask = <0>;
- max-clk-limit = <204000000>;
- bus-width = <4>;
- calib-3v3-offsets = <0x0505>;
- calib-1v8-offsets = <0x0505>;
- compad-vref-3v3 = <0x7>;
- compad-vref-1v8 = <0x7>;
- default-drv-type = <1>;
- nvidia,en-io-trim-volt;
- };
-
- sdhci@700b0000 { /* SDMMC1 for uSD card on loki */
- tap-delay = <4>;
- trim-delay = <2>;
- max-clk-limit = <204000000>;
- ddr-clk-limit = <48000000>;
- bus-width = <4>;
- mmc-ocr-mask = <3>;
- calib-3v3-offsets = <0x007D>;
- calib-1v8-offsets = <0x7B7B>;
- compad-vref-3v3 = <0x1>;
- compad-vref-1v8 = <0x2>;
- cd-gpios = <&gpio TEGRA_GPIO_PZ1 0>;
- nvidia,update-pinctrl-settings;
- pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable";
- pinctrl-0 = <&sdmmc1_schmitt_enable_state>;
- pinctrl-1 = <&sdmmc1_schmitt_disable_state>;
- pinctrl-2 = <&sdmmc1_clk_schmitt_enable_state>;
- pinctrl-3 = <&sdmmc1_clk_schmitt_disable_state>;
- nvidia,en-io-trim-volt;
- nvidia,update-pinctrl-settings;
- nvidia,sd-device;
- uhs-mask = <0x4>;
- };
-};
};
sdhci@700b0600 {
+ max-clk-limit = <266000000>;
uhs-mask = <0x0>;
built-in;
power-off-rail;
disable-clock-gate;
+ nvidia,enable-hs533-mode;
+ pll_source = "pll_p", "pll_c4_out1";
status = "okay";
};
sdhci@700b0400 {
+ mmc-ocr-mask = <0>;
+ default-drv-type = <1>;
uhs-mask = <0x1c>;
power-off-rail;
disable-clock-gate;
+ nvidia,update-pinctrl-settings;
+ pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable";
+ pinctrl-0 = <&sdmmc3_schmitt_enable_state>;
+ pinctrl-1 = <&sdmmc3_schmitt_disable_state>;
+ pinctrl-2 = <&sdmmc3_clk_schmitt_enable_state>;
+ pinctrl-3 = <&sdmmc3_clk_schmitt_disable_state>;
status = "disabled";
};
sdhci@700b0200 {
+ nvidia,is-ddr-tap-delay;
+ nvidia,ddr-tap-delay = <0>;
uhs-mask = <0x8>;
power-off-rail;
disable-clock-gate;
uhs-mask = <0xc>;
power-off-rail;
disable-clock-gate;
+ nvidia,update-pinctrl-settings;
+ pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable";
+ pinctrl-0 = <&sdmmc1_schmitt_enable_state>;
+ pinctrl-1 = <&sdmmc1_schmitt_disable_state>;
+ pinctrl-2 = <&sdmmc1_clk_schmitt_enable_state>;
+ pinctrl-3 = <&sdmmc1_clk_schmitt_disable_state>;
status = "okay";
};
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
- */
-
-/ {
- sdhci@700b0600 {
- tap-delay = <4>;
- trim-delay = <8>;
- nvidia,is-ddr-tap-delay;
- nvidia,ddr-tap-delay = <0>;
- mmc-ocr-mask = <0>;
- dqs-trim-delay = <17>;
- max-clk-limit = <200000000>;
- bus-width = <8>;
- id = <3>;
- calib-3v3-offsets = <0x0505>;
- calib-1v8-offsets = <0x0505>;
- built-in;
- compad-vref-3v3 = <0x7>;
- compad-vref-1v8 = <0x7>;
- nvidia,en-io-trim-volt;
- nvidia,is-emmc;
- };
-
- sdhci@700b0400 {
- tap-delay = <1>;
- trim-delay = <3>;
- mmc-ocr-mask = <0>;
- max-clk-limit = <204000000>;
- ddr-clk-limit = <48000000>;
- bus-width = <4>;
- id = <2>;
- calib-3v3-offsets = <0x007D>;
- calib-1v8-offsets = <0x7B7B>;
- compad-vref-3v3 = <0x1>;
- compad-vref-1v8 = <0x2>;
- default-drv-type = <1>;
- nvidia,en-io-trim-volt;
- };
-
- sdhci@700b0200 {
- tap-delay = <4>;
- trim-delay = <8>;
- mmc-ocr-mask = <0>;
- max-clk-limit = <204000000>;
- bus-width = <4>;
- id = <1>;
- calib-3v3-offsets = <0x0505>;
- calib-1v8-offsets = <0x0505>;
- compad-vref-3v3 = <0x7>;
- compad-vref-1v8 = <0x7>;
- default-drv-type = <1>;
- nvidia,en-io-trim-volt;
- };
-
- sdhci@700b0000 {
- tap-delay = <4>;
- trim-delay = <2>;
- max-clk-limit = <204000000>;
- ddr-clk-limit = <48000000>;
- bus-width = <4>;
- id = <0>;
- mmc-ocr-mask = <3>;
- calib-3v3-offsets = <0x007D>;
- calib-1v8-offsets = <0x7B7B>;
- compad-vref-3v3 = <0x1>;
- compad-vref-1v8 = <0x2>;
- cd-gpios = <&gpio TEGRA_GPIO_PZ1 0>;
- nvidia,en-io-trim-volt;
- nvidia,sd-device;
- };
-};
calib-1v8-offsets = <0x0505>;
compad-vref-3v3 = <0x7>;
compad-vref-1v8 = <0x7>;
- vddio_sdmmc-supply = <&max77620_sd3>;
- vddio_sd_slot-supply = <&vdd_3v3>;
- nvidia,dll-calib-needed;
nvidia,en-io-trim-volt;
nvidia,is-emmc;
pll_source = "pll_p";
sdhci@700b0400 {
tap-delay = <1>;
trim-delay = <3>;
- mmc-ocr-mask = <3>;
max-clk-limit = <204000000>;
ddr-clk-limit = <48000000>;
bus-width = <4>;
calib-1v8-offsets = <0x7B7B>;
compad-vref-3v3 = <0x1>;
compad-vref-1v8 = <0x2>;
- cd-gpios = <&gpio TEGRA_GPIO_PZ2 0>;
- vddio_sdmmc-supply = <&max77620_ldo2>;
- nvidia,update-pinctrl-settings;
- pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable";
- pinctrl-0 = <&sdmmc3_schmitt_enable_state>;
- pinctrl-1 = <&sdmmc3_schmitt_disable_state>;
- pinctrl-2 = <&sdmmc3_clk_schmitt_enable_state>;
- pinctrl-3 = <&sdmmc3_clk_schmitt_disable_state>;
pll_source = "pll_p";
nvidia,en-io-trim-volt;
- nvidia,enable-ext-loopback;
};
sdhci@700b0200 {
tap-delay = <4>;
trim-delay = <8>;
- nvidia,is-ddr-tap-delay;
- nvidia,ddr-tap-delay = <0>;
mmc-ocr-mask = <0>;
max-clk-limit = <204000000>;
ddr-clk-limit = <41000000>;
+ bus-width = <4>;
calib-3v3-offsets = <0x0505>;
calib-1v8-offsets = <0x0505>;
compad-vref-3v3 = <0x7>;
compad-vref-1v8 = <0x7>;
- vddio_sdmmc-supply = <&max77620_sd3>;
- vddio_sd_slot-supply = <&vdd_3v3>;
default-drive-type = <1>;
pll_source = "pll_p";
nvidia,en-io-trim-volt;
max-clk-limit = <204000000>;
ddr-clk-limit = <48000000>;
bus-width = <4>;
- default-drive-type = <1>;
mmc-ocr-mask = <3>;
calib-3v3-offsets = <0x007D>;
calib-1v8-offsets = <0x7B7B>;
compad-vref-3v3 = <0x1>;
compad-vref-1v8 = <0x2>;
cd-gpios = <&gpio TEGRA_GPIO_PZ1 0>;
- vddio_sdmmc-supply = <&max77620_ldo2>;
- vddio_sd_slot-supply = <&en_vdd_sd>;
- nvidia,update-pinctrl-settings;
- pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable";
- pinctrl-0 = <&sdmmc1_schmitt_enable_state>;
- pinctrl-1 = <&sdmmc1_schmitt_disable_state>;
- pinctrl-2 = <&sdmmc1_clk_schmitt_enable_state>;
- pinctrl-3 = <&sdmmc1_clk_schmitt_disable_state>;
pll_source = "pll_p";
nvidia,en-io-trim-volt;
nvidia,sd-device;
projects / hercules2020 / nv-tegra / linux-4.4.git / commitdiff